This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.
Signed-off-by: Pradeep Banavathi <pradeepb@codeaurora.org>
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a crisp
overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWnr6fAAoJEIwa5zzehBx3p+gP+wYLUqXjCYgyu6oJPxJbWghj
gPc4QJmhVlAWTqvE7Ut7RumWzGa7nUEH2QF9tiCLbDAw8727HJXhRHknFwaCsX45
BsvFQaKY99ClfUhoSI9GRa8e2jEArjzEPqkynHW/8FM20qWaj/Z8DDfixG75gR8u
onrMw6kprNGwmyQwqu5zLDXhUBCQIs1xRRSabUjV1P5420dbBaGgtmQrdj7k+JDt
wo9SKiG6d9CSYil3r7BC+0JwzbKNBxRGs2vv1BJOfbZ3Lj+uC0vj1AxoF/p7dOHy
ohuvt7UwwtoUzzFMcMUo7E8qxl9u6bbnPDlUoRF7DVVi5SQoeZd8BOZXOdLRN2OQ
qtgsmziDxtvh7Ydj6i89D69x7+GurAFcP8Aturprc5Zd5lO70PAYBD379IhIZ8y1
MVJltIEeuUZo7BaVBCHWQY9jJRtI3bAU6JdFPrFROsuo810IYd72Wbb1ZCfF7SV7
nBRvV7e71VQxb48c3p8Et5FntHuXfUlhkMrQ7Cb+2ugB/diGgZB9NfrZbP3Azv7f
A5Ey9tNHaOCUxzYDCw80jTa7OwVWNJf2kOT1yikASk3vODKLv4E5YQ2DULnObWG7
iRmLYuuGka4sMs0ZjpV3kaqs+8rWu08x2rEr5X0wfU+DalIzUWA2oDKSgPLJoacV
gXKP039CIxQAiottcppA
=XDLa
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a
crisp overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
ARM: dts: compulab: add new board description
ARM: versatile: add the syscon LEDs to the DT
dts: vt8500: Fix errors in SDHC node for WM8505
ARM: dts: imx6q: clean up unused ipu2grp
ARM: dts: silk: Add compatible property to "partitions" node
ARM: dts: gose: Add compatible property to "partitions" node
ARM: dts: porter: Add compatible property to "partitions" node
ARM: dts: koelsch: Add compatible property to "partitions" node
ARM: dts: lager: Add compatible property to "partitions" node
ARM: dts: bockw: Add compatible property to "partitions" node
ARM: dts: meson8b: Add watchdog node
Documentation: watchdog: Add new bindings for meson8b
ARM: meson: Add status LED for Odroid-C1
ARM: dts: uniphier: fix a typo in comment block
ARM: bcm2835: Add the auxiliary clocks to the device tree.
ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
ARM: realview: set up cache correctly on the PB11MPCore
ARM: dts: Unify G2D device node with other devices on exynos4
...
This branch is the culmination of 5 years of effort to bring the ARMv6
and ARMv7 platforms together such that they can all be enabled and
boot the same kernel. It has been a tremendous amount of cleanup and
refactoring by a huge number of people, and creation of several new
(and major) subsystems to better abstract out all the platform details
in an appropriate manner.
The bulk of this branch is a large patchset from Arnd that brings several
of the more minor and older platforms we have closer to multiplatform
support. Among these are MMP, S3C64xx, Orion5x, mv78xx0 and realview
Much of this is moving around header files from old mach directories,
but there are also some cleanup patches of debug_ll (lowlevel debug
per-platform options) and other parts.
Linus Walleij also has some patchs to clean up the older ARM Realview
platforms by finally introducing DT support, and Rob Herring has some
for ARM Versatile which is now DT-only. Both of these platforms are
now multiplatform.
Finally, a couple of patches from Russell for Dove PMU, and a fix from
Valentin Rothberg for Exynos ADC, which were rebased on top of the
series to avoid conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIUAwUAVqAGcmCrR//JCVInAQLDog/4x9F0PHGmZhexGfFOpi2Od63Jjx55izRU
zRXqRjjFjambOrZuOx8lEGDy/qzqKbsDU8D1P4IUugkDr2bLSXv+NTLZL1kNBIdm
YOlJhw/BmzLYqauOHmBzGhtv1FDUk3rqbgTsP5tTWj5LpSkwjmqui3HBZpi+f3Rr
YOn+NeQSARiw+51D0b106a9RFshQXRGgn5m3xFjLWhJqshb2z2Ew5cogX/zdwrrM
ss1BFomxsvgk6S+snN6v7cEX2iXe3r89qNR5jEW5BgNpQGFsAUeXPr9zzH07L/Qq
O7XLw9jt5MX/X5372zVHPb57WoflLbF9cFaaDUZV3eTqt3lC67BTxOtYIdC2i90k
E5GYlsy88CRwT2EO+ok/6UTryph+hVv7JqHfbKfnISrbraMCK36DtDTpBIpZ9uYF
rRB7ncJZUWBcyoe+qvitSl+2KV54iB1ez2RXsketxM98dDZsfB2M2ImFou1F/Pgg
ALvpifPubi/uDe7xNUsSuaT6/3jAomBuNsxnkYJ3NeiH/+duZbOYGkzK/LlcjZyc
UrA0IpLfwIFsBNzwfpZPZ1lkEu8Y1YZZ+Hv9k65q1wMuBDgrFI5zUeYrPZi4pN9T
Yo1xP9FstVLDouJrpGZo12VIIxR1UBeGqfRI/BZ58LEF3PRq/g2OVFsdQia5gZKr
ddiJKSL1Vw==
=z1AW
-----END PGP SIGNATURE-----
Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform code updates from Arnd Bergmann:
"This branch is the culmination of 5 years of effort to bring the ARMv6
and ARMv7 platforms together such that they can all be enabled and
boot the same kernel. It has been a tremendous amount of cleanup and
refactoring by a huge number of people, and creation of several new
(and major) subsystems to better abstract out all the platform details
in an appropriate manner.
The bulk of this branch is a large patchset from Arnd that brings
several of the more minor and older platforms we have closer to
multiplatform support. Among these are MMP, S3C64xx, Orion5x, mv78xx0
and realview Much of this is moving around header files from old mach
directories, but there are also some cleanup patches of debug_ll
(lowlevel debug per-platform options) and other parts.
Linus Walleij also has some patchs to clean up the older ARM Realview
platforms by finally introducing DT support, and Rob Herring has some
for ARM Versatile which is now DT-only. Both of these platforms are
now multiplatform.
Finally, a couple of patches from Russell for Dove PMU, and a fix from
Valentin Rothberg for Exynos ADC, which were rebased on top of the
series to avoid conflicts"
* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits)
ARM: realview: don't select SMP_ON_UP for UP builds
ARM: s3c: simplify s3c_irqwake_{e,}intallow definition
ARM: s3c64xx: fix pm-debug compilation
iio: exynos-adc: fix irqf_oneshot.cocci warnings
ARM: realview: build realview-dt SMP support only when used
ARM: realview: select apropriate targets
ARM: realview: clean up header files
ARM: realview: make all header files local
ARM: no longer make CPU targets visible separately
ARM: integrator: use explicit core module options
ARM: realview: enable multiplatform
ARM: make default platform work for NOMMU
ARM: debug-ll: move DEBUG_LL_UART_EFM32 to correct Kconfig location
ARM: defconfig: use correct debug_ll settings
ARM: versatile: convert to multi-platform
ARM: versatile: merge mach code into a single file
ARM: versatile: switch to DT only booting and remove legacy code
ARM: versatile: add DT based PCI detection
ARM: pxa: mark ezx structures as __maybe_unused
ARM: pxa: mark raumfeld init functions as __maybe_unused
...
As usual, we queue up a few fixes that don't seem urgent enough to go in
through -rc.
- MAINTAINERS updates to add a list for brcmstb and fix a typo
- A handful of fixes for OMAP 81xx, a recently resurrected platform so these
can't be considered real regressions and thus got queued.
- A couple of other small fixes for scoop, sa1100 and davinci
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWnrNxAAoJEIwa5zzehBx3UwUQAJ0sX5ScDfOjUJFn8ridx4OY
8mcOuR+ij/f2srNUlvBFV4h/j+vOauZ2zlNAjhQtgAJH0PV1pQyTkyLRGoDSwIzI
BDl79IhlMKte3iZ460q3fsVovgF2OwmDVfx0WXC72X6oOv3xt+FPlE4B543Q/v/r
WmL+PvLitaUA44/aK7QwlXg+IVQn2jDP64Uqkal5oVuQCjpeu4tcL99AbCLi4FiZ
XA5wcofKCo/wDeRK0uLWgcrHklVF4QIcvOPRIqvPvFc8V6OldAb22hTOozNa5gSp
QG3S9IFO4OHrcEH6M7XqLaTQv8KXEwzAqFlrciJUBX7rm0cUlzRKwctr1MmLsnKi
UpbHAqUHTLeJaNjKQGEX+vVKBa8PjLN4E05AuSa6TOgDbNgxRu0XUDbLR/9/bgbL
towtcUGTLBYc8itWx+0jhy4ABU0/kZiUbVOdWi5ex76BHI8lnXSvV8dD02iLHmfU
yLskruj/RMubvZxdj/kb7f/Tqn0eyi9TUGS2lqGE3Twj2MUwUaZaPskMEYMQgSZf
U3NWTPCDWvXsBnaO3yENBWUBGA54fy7YfB0gZc7W9Lg+vbnw6j+I4/GX1Eb2toA+
EU9qn6nZ3kI6NAo/2snVsaGLFnAAnsslX6evnFea9mqPMEbrzd9Yg5rUMK7nfsvv
5DpvnsMKnlL80YykQ4yC
=W+es
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull non-urgent ARM SoC fixes from Olof Johansson:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc.
- MAINTAINERS updates to add a list for brcmstb and fix a typo
- A handful of fixes for OMAP 81xx, a recently resurrected platform
so these can't be considered real regressions and thus got queued.
- A couple of other small fixes for scoop, sa1100 and davinci"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP2+: Fix randconfig build warning for dm814_pllss_data
ARM: sa1100/simpad: Be sure to clamp return value
ARM: scoop: Be sure to clamp return value
ARM: davinci: fix a problematic usage of WARN()
ARM: davinci: only select WT cache if cache is enabled
ARM: OMAP2+: Remove useless check for legacy booting for dm814x
ARM: OMAP2+: Enable GPIO for dm814x
ARM: dts: Fix dm814x pinctrl address and mask
ARM: dts: Fix dm8148 control modules ranges
ARM: OMAP2+: Fix timer entries for dm814x
ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
ARM: OMAP2+: Add DPPLS clock manager for dm814x
clk: ti: Add few dm814x clock aliases
ARM: dts: Fix dm814x entries for pllss and prcm
MAINTAINERS: gpio-brcmstb: Remove stray '>'
MAINTAINERS: brcmstb: Include Broadcom internal mailing-list
The asm-generic tree this time contains one series from Nicolas Pitre
that makes the optimized do_div() implementation from the ARM
architecture available to all architectures. This also adds stricter
type checking for callers of do_div, which has uncovered a number
of bugs in existing code, and fixes up the ones we have found.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVqARKWCrR//JCVInAQJrBhAAlwZL0IiVGFfDXWtvQGOm+yC5j4vdIhMf
1scsvRbk3ln1xUk5+NM61NpxbQotro78K5HxFZFhaVGUTbbFXM9w2VZSyI8ZaGAJ
Od6lBUUyLQmzlbHDJ3v/zrZn8Up7qZlRApmXcbUVDtssfnEfKk4xA2RG9JwIMS1c
uZMvnD7N3P9vxDPl+CsYlB2osi6Yks3VQ1tXYe2z6siO+H67zHaF08+ls7fbsd3d
oyKjZqlaQ02MIOr+AdR0h9iKyJJ6SXT0DQlsMyzB6aBWmeBCNLNALNIiukDk9Qc1
VV3sF1MOS3LtfU2TeOx4Na7hcd2iC6WYLb271iApO2Ww7t16n+de3i6AipZxLUJ0
08jiRlisTzUhXDobRSqI3mcQlxrB5UGfyblab2z/MqGGmIGJSPPRdTPRQUgi0ZKg
jksSmsaPwOQp64FhTgECLJthlYX7h6ULjkvJ9h60gZHa4jhGZbGPeMwHPf1uSm95
EvQE971Ssgm4jwhvxZ/kt1ruuZI/fxxG1Qfw+C25QkXZGKye2nB+icLWeMwz+FXG
HLqkmaAjasf5MAV1GiK8U6zoC6bCOLU0Lea83hOwRPZ999v3Nym1giSatNv4/pB+
QmkXRvFi93cdQ643l7xcUEDT2zpk4pogF3xREiBhyaXtqLlT7pPMKsBQOgdWvFuu
Ou0ZbEAwIVo=
=4psa
-----END PGP SIGNATURE-----
Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pull asm-generic updates from Arnd Bergmann:
"The asm-generic tree this time contains one series from Nicolas Pitre
that makes the optimized do_div() implementation from the ARM
architecture available to all architectures.
This also adds stricter type checking for callers of do_div, which has
uncovered a number of bugs in existing code, and fixes up the ones we
have found"
* tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
ARM: asm/div64.h: adjust to generic codde
__div64_32(): make it overridable at compile time
__div64_const32(): abstract out the actual 128-bit cross product code
do_div(): generic optimization for constant divisor on 32-bit machines
div64.h: optimize do_div() for power-of-two constant divisors
mtd/sm_ftl.c: fix wrong do_div() usage
drm/mgag200/mgag200_mode.c: fix wrong do_div() usage
hid-sensor-hub.c: fix wrong do_div() usage
ti/fapll: fix wrong do_div() usage
ti/clkt_dpll: fix wrong do_div() usage
tegra/clk-divider: fix wrong do_div() usage
imx/clk-pllv2: fix wrong do_div() usage
imx/clk-pllv1: fix wrong do_div() usage
nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usage
Presumably the second COMMON_CLK_NXP config option in
drivers/clk/Kconfig appeared after a merge conflict resolution, remove
the wrong record of two.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
This set of changes adds support for the Tegra210 SoC and contains a
couple fixes and cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJWcq0qAAoJEN0jrNd/PrOhxXIP/Rs/Iw27BVfk/ZYA+9SaYlNz
vxqzGqWincnlaArLuhAnUHciAv5kl3HnHEuOyAgFevX/KrnmAb5JMXuw2FaSmzPc
hjI5QqeieEHqp0wFSms/+abTiLX5t36bsY91QM8LfsdDOotrYGwEJcqDVEZkvMF2
j3U4RuXEqt/C0r436lPcxf+flvy70K1cQkywsKupcS4YGl0QiQVeY80tHmIIyrkA
2KLkxH5zgs/6xlcGblqzkFmrQntp5XJVgdlg1e2SZ5MOOme9fQCU0F3VueOX+WZH
FL4C05eaXCaga398Z/UgJru1X8HWUKzrGBX6XXktxeTjt8ruKD8PEjX7SVPYMRI9
Kzb3NE5qC0LEwe/BAX/4scZ6fZFyk+zfiC566YA3rcM1sg5mm4k8PCH3x2ktxXI1
SZYmIrm+9hXXWfvXlKysaIsmGL0hlsRlu6m6g2OEYTUABDMBLnMsTbeC6Li4Gh0Q
kXISNZpMhRaiB1hba3z2J/sVuMQcR33e86IaAX7WFY4ZRTNKfD0oB2zN5lZjPO6o
U9ATB5ApPWn3t0JR88jaApPVELVb5q6ufra2zPesnS25CfS+zSXbskgnZe9UkPAs
XVUprlmsNm+vZbZJpf3eNtW2IS0c0vCAYkafY3KjWcKVKvgKw5Zu8Kdo1TAJTHbP
+xfWr3/iiwN5NNsYZbiH
=/f1y
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.5-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.5-rc1
This set of changes adds support for the Tegra210 SoC and contains a
couple fixes and cleanups.
When the clock DT property is not given, of_clk_get_parent_count()
returns -ENOENT, which then tries to allocate -2 x 4 bytes of memory,
which of course fails, causing the whole driver to fail to create
the clock.
This causes the SolidRun platforms to fail probing the SDHCI1 interface
which is connected to the WiFi.
Fix this by detecting errno codes, skipping the allocation, and fixing
of_clk_gpio_gate_delayed_register_get() to handle a NULL parent_names
array.
Fixes: 80eeb1f0f7 ("clk: add gpio controlled clock multiplexer")
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
To model the muxes downstream of fractional dividers we introduced the
child property, allowing to describe a direct child clock.
The first implementation seems to cause section warnings, as the core
clock-tree is marked as initdata while the data pointed to from the
child element is not.
While there may be some way to also set that missing property in the
inline notation I didn't find it, so to actually fix the issue for now
move the sub-definitions into separate declarations that can have
their own __initdata properties.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
We might make bad memory allocations if we get (e.g.) -ENOSYS from
of_clk_get_parent_count().
Noticed by Coverity.
Fixes: f66541ba02 ("clk: gpio: Get parent clk names in of_gpio_clk_setup()")
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Sergej Sawazki <ce3a@gmx.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
If we fail to allocate parent_name then we are returning but we missed
freeing data which has already been allocated.
Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWgc9VAAoJEME3ZuaGi4PXv+QP/iegxXdOr6Ta0usArPqzzkg3
G1r6gcK/izjtEmGVqQDZjAN8HH9NeEpQnmirAttH7saqLW3+2GxQJkyekgUNruBN
KT9igUtZpUAYD9JWBc2Q9OX6NTFBBn1zOt4d1Ea16u7uHllvvJl4jI4j3GAa8a5+
OBA1nHP0Vg3ODWXhck67V/WojmH5XyTSBDspMimjAc9YShjM3vRc4rIfkGWieVCW
/Hvu+dRJl2DKxrrQ8rHRnOUImQqVLN4V/1lUChhhZrecpFFn+2znKMgzmIVZDKNk
oCW/uAHDR/i9O7GcLRbgzSfDRSwm1zM7DQKsffJmjdun6+46A04R8gPoF94uKKAk
THG0yIsAqPn8wqHGAzNEPQPlCQ1u8iMBesNyrzZ6UqXbTBWXW/z9ueWQFb2TOQ7c
gkr1trbfAjOxeeZ+fbOX7zOy+ghDyphSf6NytH147RIAPtVotNfEzPUFda+k7KyU
CXGiSPVHaKntFhrr25PDk7iHXbMFUfMiGFGzz3sHaYD1FKHMJN0Simp+H1uK1sgA
I5HXwtzkORLaM2HMR5+vfJlptks9PO9oEOioVxZbe9/VLo1/Iuylf09h6xgzJ2W6
jE0rRWogBD6mntcGd+HpBN/4p09IIfHC1KocrryltzIJKvebeaoDvcnZKfBy3Hzd
GDaBtsyg+BNb6LZiRRS6
=LMzD
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Samsung DeviceTree updates and improvements for 4.5" from Krzysztof Kozlowski:
1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.
* tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (21 commits)
ARM: dts: Unify G2D device node with other devices on exynos4
ARM: dts: Add power domain to G2D device on exynos4210
ARM: dts: MDMA1 device belongs to LCD0 power domain on exynos4210
ARM: dts: Remove unneeded GPIO include in exynos4412-odroidu3
ARM: dts: exynos4210-universal_c210: Disable DMA for UARTs
ARM: dts: Use peripheral mode for dwc3_1 on exynos5422-odroidxu3
ARM: dts: Add rotator node on exynos5420
ARM: dts: Add rotator node on exynos5250
ARM: dts: Fix power domain for sysmmu-rotator device on exynos4
ARM: dts: Add rotator nodes on exynos4
ARM: dts: Enable PRNG module on exynos4412-trats2
ARM: dts: Add PRNG module for exynos4
dt-bindings: remove deprecated compatible string from exynos-hdmi
ARM: dts: Remove fimd node from exynos5422-odroidxu3-common
ARM: dts: Mark eMMC as non-removable in exynos5250-snow-common
ARM: dts: Remove broken-cd from eMMC node in exynos5420-peach-pi
ARM: dts: Remove broken-cd from eMMC node in exynos5800-peach-pi
ARM: dts: Mark SDIO as non-removable in exynos5250-snow-common
ARM: dts: Mark SDIO as non-removable in exynos5420-peach-pit
ARM: dts: Mark SDIO as non-removable in exynos5800-peach-pi
...
related to dm814x, just the clocks are a bit different and it has a
different set of integrated devices. And let's get some basic dm814x
and dra62x devices working as many of the devices are like on am33xx::
- pinctrl using the pinctrl defines as for am33xx
- Updated EDMA bindings with support for using exma_xbar
- MMC support for dm814x-evm, t410 and dra62x-j5eco-evm
- USB support for dm814x-evm, t410 and dra62x-j5eco-evm
This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed
branch that has dm814x dts fixes interlaced with SoC related fixes to
keep things booting. The interlaced SoC and dts fixes were needed
because of issues with the device tree defined clocks that just
happened to work on bootloader timings for t410 earlier.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWeewGAAoJEBvUPslcq6Vz+5UQAJDZH9+kELrI1i1ymWg50q2+
HdnswijaQVuX1ZZeyarytvMT00s6bkouaGTLYrPGlifuJuBAAZ3PewZ4FVgIkA4A
V4QAl3+vZ0wU+TjwWLlODXwd20xAeGY5LmhLkaHheP8Dbnd1OLm2BxJlps+zK3WJ
a9Wv0rcwJuJt9dBGdELDcj04SlHd6oOmy+bHeoUi0VBcb+ZJD8+WaWQB1qkvae46
IitA74nDLY0Ejezf3lJ8Bu+I1NKv5tGg//SEJTZQfaSFxGoYbfcHkOKrBP8MAM8U
IQZHxz0izeKaAyra7qrqiHox4GVJpKFVkvHrDlox9GDSUKxP0cRpahLEqjUF1VMm
FYE2dh/JjWFhPaGMVIQIiVQNND6NZlycBc1fcEKuT+2tXjqALQ1qDZwb6S44q5/r
1QL+pBIZVMl5YaTpt/yh7COhpMtKbofamzJkzUTVwx6ao/a1uK2G+K83ZB9wkPkw
YUBL68oD8EN+fSnZMVlFQkwJGgmoMzaFuqLJMjV0RQWTmzHH43Nyg76muMCIiKwf
Xu4ZdNUS7VkHYdjVJXQcXU4igLejj6Q/Qmvw1M+LxsyDH+I4WRgWgYB11T45f0Lf
eafwSkAayq7dBzuXJ4kOuK5sR9LOYA7Le9XRvu9f8KOY2aKWoZiVB2KPCz7BaoNs
BZH5tf0C7D5mXQz8sXik
=W/MF
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "reworked dts changes for ti81xx devices and minimal
dra62x j5ec-evm support" from Tony Lindgren:
Add minimal device tree support for dra62x also known j5eco. It is
related to dm814x, just the clocks are a bit different and it has a
different set of integrated devices. And let's get some basic dm814x
and dra62x devices working as many of the devices are like on am33xx::
- pinctrl using the pinctrl defines as for am33xx
- Updated EDMA bindings with support for using exma_xbar
- MMC support for dm814x-evm, t410 and dra62x-j5eco-evm
- USB support for dm814x-evm, t410 and dra62x-j5eco-evm
This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed
branch that has dm814x dts fixes interlaced with SoC related fixes to
keep things booting. The interlaced SoC and dts fixes were needed
because of issues with the device tree defined clocks that just
happened to work on bootloader timings for t410 earlier.
* tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: dts: Add usb support for j5-eco evm
ARM: dts: Add usb support for hp t410
ARM: dts: Add usb support for dm814x-evm
ARM: dts: Add usb support for dm814x and dra62x
ARM: dts: Enable emmc on hp t410
ARM: dts: Add mmc support for dra62x j5-eco evm
ARM: dts: Add mmc support for dm8148-evm
ARM: dts: Add mmc device entries for dm814x
ARM: dts: Update edma bindings on dm814x to use edma_xbar
ARM: dts: Add pinctrl macros for dm814x
ARM: dts: Add minimal dra62x j5-eco evm support
ARM: dts: Add basic support for dra62x j5-eco SoC
ARM: OMAP2+: Remove useless check for legacy booting for dm814x
ARM: OMAP2+: Enable GPIO for dm814x
ARM: dts: Fix dm814x pinctrl address and mask
ARM: dts: Fix dm8148 control modules ranges
ARM: OMAP2+: Fix timer entries for dm814x
ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting
ARM: OMAP2+: Add DPPLS clock manager for dm814x
clk: ti: Add few dm814x clock aliases
...
Register the pwm clock for bcm2835.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Some bcm2835 clocks used by hardware (like "PWM" or "H264") can have multiple
parent clocks. These clocks divide the rate of a parent which can be selected by
setting the proper bits in the clock control register.
Previously all these parents where handled by a mux clock. But a mux clock
cannot be used because updating clock control register to select parent needs a
password to be xor'd with the parent index.
This patch get rid of mux clock and make these clocks handle their own parent,
allowing them to select the one to use.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Make bcm2835_clock_choose_div to optionally round up the chosen MASH divisor
so that the resulting average rate will not be higher than the requested one.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Add support for all configurable clocks found on NXP LPC32xx SoC.
The list contains several heterogenous groups of clocks:
* system clocks including multiple dividers and muxes,
* x397 PLL, HCLK PLL and USB PLL,
* peripheral clocks inherited from rtc, hclk and pclk,
* USB controller clocks: AHB slave, I2C, OTG, OHCI and device.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
The change adds COMMON_CLK_NXP configuration symbol and enables it for
NXP LPC18XX architecture, this is needed to reuse drivers/clk/nxp
folder for NXP common clock framework drivers other than LPC18XX one.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Clock patches for the Allwinner SoCs:
- H3 clocks
- A10/A20 Video Engine clocks
- DRAM gates
- A80 special CPU clock
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWcyKFAAoJEBx+YmzsjxAgtNMP/jJWzfh8bLB+eCZHGtBm/Y86
em0DaAFWoAYOo0iFGRNkiJ+Gk5lOFx/qLjMbHitfEk00lNs9L2Goyzhko1WnaLQ6
ZmJK1X3bcd5Uyqa3O8RP3zu0NUDin4sU4ZhKT8PuSkPEO69wSlgn+4R3e46jlRVg
+1dbeEs68N10PjIBPqoCDYuP3YJW+nbdJQ03M4M9W6xNVgxtz/FVv1i3W61m3+r2
LInUfr4A/+Mr3hNlGol4PEq8HP4xdfXRnrnSPNKJfysxc+9e2al6hmfiiBlSyhV2
Z6HPG2qaxWMGCBG/q0SOh0I1vL8CgWbw0E04Wu5hzSBBaaS+KIEU6KqMQKFLyw5C
U5V4z0g2ePs8SZD3SB1taB2y3dVtCwtOWvo/teAOKc7zXe/3wPRAWyxg4N5IGX/C
bwHQGrDKuwsXVySAXqPXEojwTToF/TxqsS1RpunjLA2JIb1dvREUP0MMPXgPZJKN
yiZLfeWw4SDonSPagSy/AQuEjih5ekZmT2aIOU4oCAqjpre6gQaolQn1xriL+ACf
qdT4Hcg2hzlkjPB0N9izI7Krcef4oZpzZqls2/M9CnmTeMY4l2z9lZylqto4HnLF
VT3duWXlmh8g9YGiWpMWwtcl0kXxP2mYM959k9KFrtvX7lhN4T2hmJwRnnCRCKre
Zpt/9dotvmyM5Dno0Pee
=Tahe
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clocks-for-4.5' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Allwinner clocks changes for 4.5
Clock patches for the Allwinner SoCs:
- H3 clocks
- A10/A20 Video Engine clocks
- DRAM gates
- A80 special CPU clock
Use the newly introduced possibility to combine the fractional dividers
with their downstream muxes for all fractional dividers on currently
supported RK3036 SoCs.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Some clocks need to be enabled to accept rate changes. This patch adds a
new flag CLK_SET_RATE_UNGATE that lets clk_change_rate enable the clock
before trying to change the rate and disable it again afterwards.
This of course doesn't effect clocks that are already running at that
point, as their refcount will only temporarily increase.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
The clock branches leading to sclk_spdif and sclk_spdif_8ch on RK3288
SoCs only feed those clocks, allow those clocks to change their parents
all the way up the hierarchy.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Use the newly introduced possibility to combine the fractional dividers
with their downstream muxes for all fractional dividers on currently
supported Rockchip SoCs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
The fractional dividers of Rockchip SoCs contain an "auto-gating-feature"
that requires the downstream mux to actually point to the fractional
divider and the fractional divider gate to be enabled, for it to really
accept changes to the divider ratio.
The downstream muxes themselfs are not generic enough to include them
directly into the fractional divider, as they have varying sources of
parent clocks including not only clocks related to the fractional
dividers but other clocks as well.
To solve this, allow our clock branches to specify direct child clock-
branches in the new child property, let the fractional divider register
its downstream mux through this and add a clock notifier that temporarily
switches the mux setting when it notices rate changes to the fractional
divider.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
There are a pair of SPI masters and a mini UART that were last minute
additions. As a result, they didn't get integrated in the same way as
the other gates off of the VPU clock in CPRMAN.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
- New boards support: imx51-ts4800, imx6q-novena, CompuLab imx7d SoM/SBC,
vf610m4-cosmic
- Add ADC device support for imx6ul and imx7d
- Remove config space from PCIe controller ranges property for i.MX6
- Add Vivante GPU nodes for i.MX6
- Add DCU, LCD, and SATA devices for LS1021A
- A series to update Ventana gw5xxx boards getting HDMI and LVDS to work
simultaneously and devices like PWM and SPI added
- Quite a few random cleanups and minor updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWeV5EAAoJEFBXWFqHsHzOk8YH/RrzIcDxVa7E6PiVErJmDluH
ihMgY1mQcgXBcBEVKc0F9gKXZVN7W1xHGTHxVZp83mTxEJArBjFhojFQYReUaALU
sQKot0sD8EWBlcC+fvuLzhHc8jE2Udioi/Ys/kgl8T82Q/LXTCnUmBnsPaVshqod
WQ4i4Hk/QV6FbCEgvJvwEMEth53JYLVlAkuVbXi32eo7iv6u6d/LEdCW88bpV8Gv
OxnGg8BiBV3TdAaAcNX72p5IRy9AYMY2hYIx9MCec+H2ws/jzn7xvfkhLta6luTP
4JMvdToQWkhscIEDK1Q/3PtJVmX1al1PWKLTve3tza6jTTc7Opav8XN1hH3nJls=
=hXxT
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree updates for 4.5:
- New boards support: imx51-ts4800, imx6q-novena, CompuLab imx7d SoM/SBC,
vf610m4-cosmic
- Add ADC device support for imx6ul and imx7d
- Remove config space from PCIe controller ranges property for i.MX6
- Add Vivante GPU nodes for i.MX6
- Add DCU, LCD, and SATA devices for LS1021A
- A series to update Ventana gw5xxx boards getting HDMI and LVDS to work
simultaneously and devices like PWM and SPI added
- Quite a few random cleanups and minor updates
* tag 'imx-dt-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits)
ARM: dts: imx7d: sbc-imx7: add basic board support
ARM: dts: imx7d: cl-som-imx7: add basic module support
ARM: dts: TS-4800: add touchscreen support
ARM: dts: ts-4800: Add LCD support
ARM: dts: imx6q: add Novena board
devicetree: bindings: Add vendor prefix for Kosagi
ARM: dts: TS-4800: use weim IP to map the FPGA
ARM: dts: TS-4800: drop uart rts/cts pin reservations
ARM: dts: imx6: add Vivante GPU nodes
ARM: dts: imx28: add alternate auart4 pinmux
ARM: dts: ls1021a: add sata node to dts
ARM: dts: TS-4800: add basic device tree
of: documentation: add bindings documentation for TS-4800
of: add vendor prefix for Technologic Systems
ARM: dts: imx7d-sdb: add ADC support
ARM: dts: imx7d.dtsi: add ADC support
ARM: dts: vf-colibri: add CAN support
ARM: mxs: dt: cfa10057: fix backlight PWM
ARM: dts: imx6qdl: move GIC to right location in DT
ARM: dts: imx6qdl: add IPU aliases
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Dove PLL dividers, which are used to generate the
clocks for the AXI bus, as well as the GPU and VMeta peripherals.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
drivers/clk/samsung updates (mostly bug fixes):
- instantiation of the cpu clocks and addition of the GSCL
IP parent clocks to the list of available consumer clocks
for exynos542x SoCs;
- MFC IP parent clock fix for exynos542x;
- fix of locking bug in samsung/clk-cpu.c which caused
system crashes with cpufreq enabled;
- minor cleanup for s3c2410.
The i.MX clock updates for 4.5:
- Add is_prepared function callback for pllv3 clock driver
- Use imx_check_clocks() on imx6ul and imx7d clock drivers to save
some code
- Add a core clock for imx7d to support generic cpufreq driver
- Support imx6q clock routing with OSC to anaclk2/2b
- To support more precise pixel clocks on imx5, allow ipu_di_sel clock
selectors to influence the PLLs that they are derived from
- A cleanup on imx25 OSC clock
Rockchip clock changes for 4.5 containing
- a new pll-type used on rk3036 and other Cortex-A7 socs
- new clock-trees for rk3036 and rk3228
- switch rk3288 plls to slow mode on reboot
- a bunch of new clock ids
- some more critical clocks
- wrong register offsets for the rk3368 cpuclks
- allowing more than 2 parents for the cpuclk
This code is unreadable due to the blank line between if and else
blocks.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
As commit 1d33929e2a ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.
The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.
Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.
This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.
For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.
With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.
Fixes: 1d33929e2a ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
The 'fixes' branch contains d5d4fdd86f ("irqchip/versatile-fpga:
Fix PCI IRQ mapping on Versatile PB") that is required for booting
the versatile platform prior to the rework in this branch, but
including both causes a build-time error.
I'm doing an evil merge here to pull in the fixes branch so we have
that commit included but at the same time revert the trivial change.
This gives us a bisectable history.
* fixes: (22 commits)
fsl-ifc: add missing include on ARM64
ls2080a/dts: Add little endian property for GPIO IP block
dt-bindings: define little-endian property for QorIQ GPIO
ARM64: dts: ls2080a: fix eSDHC endianness
ARM: dts: vf610: use reset values for L2 cache latencies
ARM: pxa: use PWM lookup table for all machines
ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1
ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock
ARM: dts: am4372: fix clock source for arm twd and global timers
ARM: at91: fix pinctrl driver selection
ARM: at91/dt: add always-on to 1.8V regulator
ARM: dts: vf610: fix clock definition for SAI2
ARM: imx: clk-vf610: fix SAI clock tree
ARM: ixp4xx: fix read{b,w,l} return types
irqchip/versatile-fpga: Fix PCI IRQ mapping on Versatile PB
ARM: OMAP2+: enable REGULATOR_FIXED_VOLTAGE
ARM: dts: add dm816x missing spi DT dma handles
ARM: dts: add dm816x missing #mbox-cells
cpufreq: s3c24xx: Do not mark s3c2410_plls_add as __init
bus: sunxi-rsb: unlock on error in sunxi_rsb_read()
...
This fixes a bug in tegra_clk_register_pllss() which mistakenly assume
the IDDQ register is the PLL base address.
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This fixes two things.
- Read the correct IDDQ register
- Check the correct IDDQ bit position
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Without this change clk_get_rate would return the final output
rather than the VCO output as it would factor in the pdiv when
it shouldn't. This will cause problems for all dividers in the
subtree of the VCO PLL.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Super clock divider control and clock source mux of Tegra210 has changed
a little against prior SoCs, this patch adds Gen5 logic to address those
differences.
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add some logic for Spread Spectrum control. It is used in conjuncture
with SDM fractional dividers. SSC has to be disabled when we configure
the divider settings.
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
