- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbAX/SAAoJEFBXWFqHsHzOb7UH/01n5GHGeOHm9OgdKHcPyRbx
lRtkBBGJOrOKJc86lvoQeDfaYnw9xP0QJljiK9FonpBTHAK8QJPpeRbnfNT2drG0
07BwLeoIUU6Fo6Qog6ADGmu53mHzFBi1FpjXBB0rtQFeQGY/jOmYsUBWzAAItWua
rRfiY2ya5QN8ZdRdFbP7EV8ZWjN2C/I3BC/K/YdYmMwYwF1unuKjpq68CHz+/Ed7
lofUbWWyod8es38SwLiRpJi5y3tf+a6qoRNTPsNL9/ipbEM7nMHfc+AELQ0Qm9oZ
uGOtDNJ5UkrpBjjBkB8/11lODOfLZ+wjAVul9oKOfgT9uilO9AEhYs/5bMXp2yA=
=/XTx
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.18:
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
* tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: select imx6sll pinctrl when imx6sll enabled
ARM: imx: pcm037: use device properties for at24 eeprom
ARM: imx: pca100: use device properties for at24 eeprom
ARM: imx: pcm043: use device properties for at24 eeprom
ARM: imx: vpr200: drop at24_platform_data
ARM: imx: Update spi_imx platform data to reflect current state
Signed-off-by: Olof Johansson <olof@lixom.net>
Contains a single patch that instantiates a platform device for the CPU
frequency driver.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlr+328THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zod7mD/sEyQNKybb212vaVS2zn0y+wEK0Ubwa
JAIitHOtykjJjFwQ1V6Gxk2McGMEwk9iVuhEkCL3LgswqdTLl7THUCElbSN9dBBW
KM245ejgOaIBIMlxH+2fzLJRZXXpk5zbcE20h7Or4Lq+nyPHkloebKbFGzoOl/aO
Fk8BjzhJmh1OkMgK/zFSHtBSVN8p9jxC7PQIRM29YxLNPmMjU03vMpGiFaXHz3zU
yfdfa/XojdAjqwlUkwt44ZDnDhXv7euNBnSPEjdq4FzAg3sAhnHysHC0XrV3DNmO
xPLDeOL1kFLoqA3oGIAsfggEAhkz59jM1JyOeFE8igggQn1W/offC9T6PHEVxSp3
x8+3xmEAJsQ6mHtdqxi52N38FOmbK+/2V8mfyGuFPSOBgFnQ+1xowBEgFKczDBQM
moqTdurZkiKe8UUSz4BcwycvxjxKvhmCAxDOIbTEuRZlf5RhO7j+z5cXFPlsG+tP
0EnO+lcpe2fu4e4Z8nbqQXeUinjWCy0+4Q+Vk4FN3f6NZz2y/G2ZAVlatWj2jezO
sz1J17HlvfHpK1qSvmYcLKOM8q51RNEV+9kIXBl/wIkpFYxZdVu/7l+Ca3m2ZX47
XBwgdFpdn6gv/T52gLJpI/if5RAVYGc75rr3l/4cLy3EULqPvIue00kYpSYE+K8F
9wRr5yffb+IHew==
=Y7op
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.18-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
ARM: tegra: Core changes for v4.18-rc1
Contains a single patch that instantiates a platform device for the CPU
frequency driver.
* tag 'tegra-for-4.18-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Create platform device for tegra20-cpufreq driver
Signed-off-by: Olof Johansson <olof@lixom.net>
Mainly contains patches to move NAND chipselect to platform data
(currently platform device id is being used). These patches have
been acked by NAND maintainer and because of the driver dependency
an immutable branch has been provided to Boris.
The other patch is to remove an unnecessary postcore_initcall() on
DM644x which is needed for common clock framework conversion.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJa/DYkAAoJEGFBu2jqvgRN3nQP/1IGbkmkCMtBRJcni7Es+x2p
ntxG+NylyyQPMseZNPk3k1MBP9g9+kecpt22p/SDJVgY93+UU90UcUO+WSkqBEiy
E/r+Mzj0EYmyY48dFo5v6dv5ED7lGSqtT0PywA5JCuVJ7Mzs3uHeBlKvhWgdcuSw
McmjXLuyjHybXbpVuDFZ1vSDfmpMO2NskLtpIjIMR8Hk7pNXv+/6FEM5nJiQzSmO
rIMdbEr4+Oqk+y5dWEY4GptSeCIOWiUrjQY3Hi8sLvUc7NVAsOchXcfnDeAI7otJ
NvI2SOgmqiMHmoeWdxAlttt/guhUInWE2HOjGuCs/QEzx5ZXk1xsPAevvcjwtWdz
C4bEK8nMLnXZ6Qd/vXSlQOlGhCBhxCms4pz7VJMeWdG1VXOIU7I7RYScPklA0UfA
SUaHwrdvHOCMy0k3fbiPsv/vxwGvWZxsBDG5QF2geqQufo4lZMS6WgvB83Z5900Q
rw+51Y44G8YpXlZKQrOZ+QzP4PP14FV/BuWeoBy+xXEZZSRghwJrADJcSI/+2KA9
nCcxJgy66wJV4e96e4EXXRbyeVZjGmIp6gyMQsK67bAQ9/Kak4Dtv2VmI7ugbBcl
HAFWfmXgC23+jYKTLQIZOPub8qaBIAx1zkKs+LWWoHW482QoHHLn7j9Dw26RKwST
4smKyrDuM7NoxLZhnwrl
=iWsm
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.18/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
DaVinci SoC support updates for v4.18
Mainly contains patches to move NAND chipselect to platform data
(currently platform device id is being used). These patches have
been acked by NAND maintainer and because of the driver dependency
an immutable branch has been provided to Boris.
The other patch is to remove an unnecessary postcore_initcall() on
DM644x which is needed for common clock framework conversion.
* tag 'davinci-for-v4.18/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: dm644x: remove unnecessary postcore_initcall()
ARM: davinci: aemif: stop using pdev->id as nand chipselect
mtd: rawnand: davinci: stop using pdev->id as chipselect
ARM: davinci: neuros-osd2: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm646x-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: mityomapl138: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm644x-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm365-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm355-leopard: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm355-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: da850-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: da830-evm: specify the chipselect in davinci_nand_pdata
mtd: rawnand: davinci: store the core chipselect number in platform data
Signed-off-by: Olof Johansson <olof@lixom.net>
Tegra20-cpufreq driver require a platform device in order to be loaded,
instantiate a simple platform device for the driver during of the machines
late initialization.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
changes for 4.18, please pull the following:
- Doug updates arch/arm/include/asm/cpuinfo.h such that this header file
can be used by both C and assembly code. This particular change will
also be included in a Sunxi pull request to support A83T SMP support.
- Doug also updates our DEBUG_LL routine to support newer chips such as
7278 which have a version 7 memory map which moves the registers from
physical address 0xf000_0000 down to 0x0800_0000. This requires us to
look up the processor MIDR and determine the base address from the
PERIPHBASE register.
- Florian updates the Brahma-B15 read-ahead cache implementation such
that it works on the Brahma-B53 CPUs, which also have an identical
read-ahead cache implementation, with a different set of offsets. He
also provides the Brahma-B15 MIDR definition such that it can be used by
other pieces of code in the future.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJa9c1BAAoJEIfQlpxEBwcEydEP/0QRDdSmZxpfLKBekgkUZ30t
p7EwYjexdAscxuCJVKW13Tmdzx30XBJA33m+r45FzUzUpYsc/tKZoUC1NBMsyNnw
q3cFE26ghhdoKCFTKVnr03Alo6PaJWFQM1uxx5bIIh/lyFePX64oD77Qtu7HOpgL
w+OmOokkEymqjDyaThu4G3UsgiI2q+PaIlXo1uCOZqfsF2KtgmEmV4iLyOyPrpbn
G7mDAFZ2NkNTBfjpgFkqS5qiG3AijKFTaWB2CwBvkq8o7rx4qO/4cHgRQhdoJ079
Q0hxnMhYIw5ixgCntFZz83XRX4XKRIAwXFrSaMb1iWCdbxMWnFyhV/QBV6NzVUNp
EynUDG2u4ieCajfzeu0Cj6DCLauZqtqxxuthBvOIoYBUllFv3I/PhEJijkk1iYCy
QWe/wtg/0ED4oPltm92oDtUU3TjKyJquWBKjO1loOAnstxG+ZJcIzLiIn6AsyrSj
o2tuPHP6xgQRmAei3M7QrSipsliOfKi3XWuu2+mMUKXW3WyHTc5AqLtmJWKxJJCO
6Ts2gBFp9Ue/8u4WV0fUZ/MS5xyWZjhZQ6bVi7bpu2WFtN7p4YfyER/J0jDeB5lk
Jjr+oPIVALYf8moSpm1l2Omx8gpwM/nd2a0dUyJ03mPDd697kRc/B0AqtSdR2S0H
skn8/rJYpVr5oI4im7Zi
=21hD
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.18/soc' of https://github.com/Broadcom/stblinux into next/soc
This pull request contains Broadcom ARM-based machine/platform files
changes for 4.18, please pull the following:
- Doug updates arch/arm/include/asm/cpuinfo.h such that this header file
can be used by both C and assembly code. This particular change will
also be included in a Sunxi pull request to support A83T SMP support.
- Doug also updates our DEBUG_LL routine to support newer chips such as
7278 which have a version 7 memory map which moves the registers from
physical address 0xf000_0000 down to 0x0800_0000. This requires us to
look up the processor MIDR and determine the base address from the
PERIPHBASE register.
- Florian updates the Brahma-B15 read-ahead cache implementation such
that it works on the Brahma-B53 CPUs, which also have an identical
read-ahead cache implementation, with a different set of offsets. He
also provides the Brahma-B15 MIDR definition such that it can be used by
other pieces of code in the future.
* tag 'arm-soc/for-4.18/soc' of https://github.com/Broadcom/stblinux:
ARM: brcmstb: Add support for the V7 memory map
ARM: add Broadcom Brahma-B15 main ID definition
ARM: add Broadcom Brahma-B53 main ID definition
ARM: Allow this header to be included by assembly files
ARM: B15: Update to support Brahma-B53
Signed-off-by: Olof Johansson <olof@lixom.net>
This series improves the ti-sysc interconnect target module driver to
the point where a most of SoC can be booted with interconnect target
module data configured in device tree instead of legacy platform data.
The related device tree changes need some more work though, and can
wait for v4.19. Also some drivers using nested interconnects like DSS
need more work.
We can now remove the unused pm-noop code that is not doing anything
any longer. And we can now initialize things for PM and display pdata
later to prepare things for using ti-sysc driver.
We also need to add some more quirk handling so we can boot both with
platform data and dts data.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlrsg9QRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNmwxAAzPt1GpHQSw/XhhtK8+DLlqo9fdPQ9C65
Iw+PyvQYy2bTj0y64VkZ4Msmi3SOhfr5zKhIrwBHEG59/LW81oXqnb9JZHPP+YC+
/A6ZufXIt8X+Nd1L6id2OD9ItJoLXk7llBvDckwb/zUgcVib9cA79GvWgexfRWBE
w/bjZfUibddYdhKoCGmvWcZBapDKHMfv8MdN8h0QUyofTIefZZeykRvb1Pmn7Ntl
vz3QfPUq3oyRfG9PMRI7mjHrW7jxEKgjvWANbUg64UQJN7s1tfa8ICpzycc4/X/a
pdetH7G+BPaRdeqDCmGrcGHfO4b5HyD7nkTD3R6yzV+Dw8nWl+aWGJHAsPYRUJkd
o/BroflhqK2ICfEkeK6AWebbicOSlF5P+EEFwp6pHSd/9JiEqR1IkhcCvTdV8CB1
qyUQxD+iKof+rY5f1EicaGq8HXhkV+9aIOoqBH6C0qObEJDUWvVoGIzDdN2vwVAu
C2w9WqdQII3R4g2ZX1SmdEqFO/f6PkAoKiyNt+WGBGBUfYo1sfwpkFAEeGU50moJ
5m9TtLcAbbvgMwy2ttfWcHPn5z3p4Ocf7aN93TZ6RPk6A6R57PzCcYqJ2bXsumeV
5yaP9w4pbFj+FQuu8jA8s/cSwhIP8SwqwFWKCi2JcU3ugEdJfwF555y5bm0R9MDz
7W82aAicw+M=
=jYZ6
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.18/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
ti-sysc driver related changes for omap variants
This series improves the ti-sysc interconnect target module driver to
the point where a most of SoC can be booted with interconnect target
module data configured in device tree instead of legacy platform data.
The related device tree changes need some more work though, and can
wait for v4.19. Also some drivers using nested interconnects like DSS
need more work.
We can now remove the unused pm-noop code that is not doing anything
any longer. And we can now initialize things for PM and display pdata
later to prepare things for using ti-sysc driver.
We also need to add some more quirk handling so we can boot both with
platform data and dts data.
* tag 'omap-for-v4.18/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Show module information for suspend if DEBUG is enabled
bus: ti-sysc: Tag sdio and wdt with legacy mode for suspend
bus: ti-sysc: Detect UARTs for SYSC_QUIRK_LEGACY_IDLE quirk on omap4
bus: ti-sysc: Detect omap4 type timers for quirk
bus: ti-sysc: Add initial support for external resets
bus: ti-sysc: Improve suspend and resume handling
bus: ti-sysc: Tag some modules resource providers for noirq suspend
bus: ti-sysc: Add handling for clkctrl opt clocks
bus: ti-sysc: Make child clock alias handling more generic
bus: ti-sysc: Handle simple-bus for nested children
ARM: OMAP2+: Make display related init into device_initcall
ARM: OMAP2+: Initialize SoC PM later
ARM: OMAP2+: Only probe SDMA via ti-sysc if configured in dts
ARM: OMAP2+: Use signed value for sysc register offsets
ARM: OMAP2+: Allow using ti-sysc for system timers
ARM: OMAP2+: Drop unused pm-noop
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch select DMA, DMAMUX and MDMA support for STM32MP157C machine.
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Drops U8540 and U9540
- Cuts down the Kconfig options due to accumulated simplifications
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJa7CQ4AAoJEEEQszewGV1zCO4P/jk7O7JjOtQ++8jPVCMWLNq1
/EoLCYQ6YApYrW9wrCcPwGSPFkuVf8LcseTGupwJ9JzgSoGxyg8SS7IAJ2JB8EKQ
+pLEOnOMq6bPJwQEv2BFHWfLy6DS4RPjWL2mYn2noclksJ4ASeMCnWjK8VZI8tNU
cXI9BbxAdKgP8ufgZRgUy7l6aGs8eCwMC//hI/F9C5zu5V+m24L2UDL6fBqjFkgn
4KeSqGz7bwaGCYl92KyW5X/w2DtHuTgs27bBvoveKQGJP6i28v6BBUIQW/oaZgRE
ZwsMbGj3Vsm2JWP0NvlWw/b1tgm9V1ByBL3r1w+Q9MitJzDeaasV9PewyOqriBmy
XQESlQo9wmi52zN75XqkuDPYfLG6sLrwPdHmmDUAnNDfH1CRwkKttSJjSoKDuMQA
sNI4tnbKk90Ux7mWvj+pZp9zAGZEBNZuSLE8FlnCpdJHVplvfUWGOlptV0wB2Cfq
i5Pcapkt43QITDQ86BtAe9lAppsixpEfs/nMLDvbi9+c9Sq0EUnpwYma+T/GjNZ3
8A2+DCSiqQEBqeKtSlS/YUv2mOkbZkEwPTwGdFxAt0FuqbQ8ee58nNodJqOhaR5e
vXDb+IKxvQBNyiqBjTMtqZALgImHPGrQOhGY45aYDgEjZM0ABlE5m8P5/yNdZhmP
1QRFHikxbKHpX1y+3hBf
=J8Gm
-----END PGP SIGNATURE-----
Merge tag 'ux500-machine-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
These changes for ux500:
- Drops U8540 and U9540
- Cuts down the Kconfig options due to accumulated simplifications
* tag 'ux500-machine-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Cut down Kconfig options
ARM: ux500: Drop U8540/9540 support
Signed-off-by: Olof Johansson <olof@lixom.net>
As no more user of soc_is_exynos{4,5} we can safely remove them.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Lets remove static mapping of SCU SFR mainly used in CORTEX-A9 SoC based
boards. Instead use mapping from device tree node of SCU.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
[mszyprow: rebased, added fallback to scu_a9_get_base() when no SCU DT
node is available, removed compatibility break warning, fixed non-SMP
build, keep SCU base mapping to avoid issues with calls from CPUidle]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The 7278 device is the first device that includes support for the V7
memory map developed for use in 64-bit architecture brcmstb devices.
This map relocates the register physical offset from 0xF0000000 to
0x0000000008000000.
Since the ARM PERIPHBASE value is also relocated in the V7 memory map
we can use its value to determine whether this device uses the new
V7 memory map and therefore where to look for the SUN_TOP_CTRL
register used to identify the chip family.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit allows a Broadcom Brahma-B53 core to be detected when executing
an arm architecture kernel in aarch32 state.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The constants defined in this file are equally useful in assembly and C
source files. The arm64 architecture version of this file allows
inclusion in both assembly and C source files, so this commit adds
that capability to the arm architecture version so that the constants
don't need to be defined in multiple places.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Commit d50f4630c2 ("arm: dts: Remove p1010-flexcan compatible from imx
series dts") removed the fallback compatible "fsl,p1010-flexcan" from
the imx device trees. As the flexcan cores on i.MX25, i.MX35 and i.MX53
are identical, introduce the first as fallback for the two latter ones.
Fixes: d50f4630c2 ("arm: dts: Remove p1010-flexcan compatible from imx series dts")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: linux-stable <stable@vger.kernel.org> # >= v4.16
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
These systems are not plentiful and do not have any
strict memory constraints. Cut down the configurability
and select what is needed for all of them so they simply boot,
keeping only the UX500_SOC_DB8500 symbol which is used
elsewhere in the kernel for now, but default it to y.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The U8540 was an evolved version of the U8500, but it was never
mass produced or put into products, only reference designs exist.
The upstream support was never completed and it is unlikely that
this will happen so drop the support for now to simplify
maintenance of the U8500.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is not needed since commit fcbb1e02ee ("drivers: thermal:
Remove ARCH_HAS_BANDGAP dependency for samsung") from 2014.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Exynos5440 is not actively developed, there are no development
boards available and probably there are no real products with it.
Remove wide-tree support for Exynos5440.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
dm644x_init_devices() is unnecessarily implemented as a
postcore_initcall().
This does not cause any issues now, but creates issues when
converting to common clock framework where clocks themselves
become platform devices and are initialized later. Because of
this, device clock acquisition and runtime PM on that device
fails.
Move the call to .init_machine() callback along with rest of
platform device's registration.
While at it, convert it to return void since return value is
ignored by caller anyway.
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
All platforms now use the core_chipsel field in platform_data. Stop
using pdev->id in the aemif code.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We can initialize almost everything at normal module_init time with
ti-sysc except for clocks and timers. To prepare for that, let's make
display init into device_initcall as otherwise we'll be calling
of_platform_populate() before the parent has probed.
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There's no need to probe devices until at module_init time and we
currently have at least PM trying to use I2C for PMICs early on.
As only a part of the SoC init_early is SoC specific, we only need to call
the SoC specific PM init function. And we can modify omap2_common_pm_late_init()
so it becomes a late_initcall().
Note that this changes am335x to call omap2_clk_enable_autoidle_all() that
seems to be missing currently.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We still have some SDMA probing using omap_device_build() for the
arch/arm/plat-omap/dma.c part that the dmaengine driver then uses.
So we still need to ensure that omap_device_build() works even if we
probe and manage the dmaengine driver via ti-sysc. And we don't want
to call dev_pm_domain_set() as otherwise we'd also have omap_device
try to manage the hardware in addition to ti-sysc.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We currently don't know if a revision register exists or not. Zero is
often a valid offset for the revision register. As we are still checking
device tree data against platform data, we will get bogus warnings with
correct device tree data because of incomplete platform data.
Let's fix the issue by using signed offsets and tag the revision registers
that don't exist with -ENODEV, and init the missing ones with the correct
revision register offset.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If a system timer is configured with an interrconnect target module in
the dts, the ti,hwmods and module fck are at the interconnect target
level. Then there's a separate fck for the timer child device.
If the child device has a separate functional clock, we need to configure
it directly. For example, timer clk clkctrl clock bit 0 is the module
clock for the interconnect target, and bit 24 being the functional clock
for the timer IP.
For system timers, we already mark them as disabled. Now must also mark
the interconnect target module as disabled to prevent ti-sysc to manage
it instead of the system timer.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM:
- PSCI selection API, a leftover from 4.16 (for stable)
- Kick vcpu on active interrupt affinity change
- Plug a VMID allocation race on oversubscribed systems
- Silence debug messages
- Update Christoffer's email address (linaro -> arm)
x86:
- Expose userspace-relevant bits of a newly added feature
- Fix TLB flushing on VMX with VPID, but without EPT
-----BEGIN PGP SIGNATURE-----
iQEcBAABCAAGBQJa44lQAAoJEED/6hsPKofo1dIH/3n9AZSWvavgL2V3j6agT8Yy
hxF4nHCFEJd5aqDNwbG9QEzivKw88r3o3mdB2XAQESB2MlCYR1jkTONm7yvVJTs/
/P9gj+DEQbCj2AgT//u3BGsAsZDKFhB9JwfmV2Mp4zDIqWFa6oCOGeq/iPVAGDcN
vUpuYeIicuH9SRoxH7de3z+BEXW0O+gCABXQtvA93FKTMz35yFTgmbDVCnvaV0zL
3B+3/4/jdbTRICW8EX6Li43+gEBUMtnVNkdqxLPTuCtDG8iuPUGfgF02gH99/9gj
hliV3Q4VUZKkSABW5AqKPe4+9rbsHCh9eL0LpHFGI9y+6LeUIOXAX4CtohR8gWE=
=W9Vz
-----END PGP SIGNATURE-----
rMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
"ARM:
- PSCI selection API, a leftover from 4.16 (for stable)
- Kick vcpu on active interrupt affinity change
- Plug a VMID allocation race on oversubscribed systems
- Silence debug messages
- Update Christoffer's email address (linaro -> arm)
x86:
- Expose userspace-relevant bits of a newly added feature
- Fix TLB flushing on VMX with VPID, but without EPT"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
x86/headers/UAPI: Move DISABLE_EXITS KVM capability bits to the UAPI
kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use
arm/arm64: KVM: Add PSCI version selection API
KVM: arm/arm64: vgic: Kick new VCPU on interrupt migration
arm64: KVM: Demote SVE and LORegion warnings to debug only
MAINTAINERS: Update e-mail address for Christoffer Dall
KVM: arm/arm64: Close VMID generation race
This updates the Gemini defconfig with a config that will bring
up most of the recently merged and updated devices to some
functional level:
- We enable high resolution timers (the right thing to do)
- Enable CMA for the framebuffer, and the new TVE200
framebuffer driver and the Ilitek ILI9322 driver for
graphics on the D-Link DIR-685. HIGHMEM support comes in
as part of this.
- Enable networking and the new Cortina Gemini ethernet
driver.
- Enable MDIO over GPIO and the Realtek PHY devices used on
several of these systems.
- Enable I2C over GPIO and SPI over GPIO which is used on
several of these devices.
- Enable the Thermal framework, GPIO fan control and LM75 sensor
adding cooling on the D-Link DNS-313 with no userspace
involved even if only the kernel is working, rock solid
thermal for this platform.
- Enable JEDEC flash probing to support the Eon flash chip in
D-Link DNS-313.
- Enable LED disk triggers for the NAS type devices.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
One of the bitbanged SPI hosts had wrongly named GPIO lines due to
sloppiness by yours truly.
Cc: arm@kernel.org
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix a build regression with split object directories reported by Russell
and fix range sizes for omap4 cm2 and prm modules.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlraJXYRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNV5g//Y7bnLVOPGTu73EiB4erJr6OHlZjtzBE/
O/QQ0UwHZvmugzztPAfEvJg+s2O9IT6nloxupJHtmGpE43b7Bz47z7PAqSaI10vT
9CJ9xwmRyobkAPnYc9deQpQwmsg4pOYFjtsFTzWB/88AgadhqjRDzIjwGIM1SDvN
EKxcS+LA33erebbpgiLAIf+4IGvu+meENEHxBYIA/5KLdcYUTw0dVXSkpR301iV6
R4wW5a1nrqac8HORu+CBmehs0VI3YMJw9tMcIrWDm//ZsPVoXGP61kM6lZxlCB0S
FbOMVGO7GmcdrdhY0BaAKa7/KqSXEVBjPtZjZdOlnCDq1YNoUvrpIGn+k5x2jt1d
NI03+FaCVqAVGWQ11UywnM55aAmLDYMkY3kUG6HySJL8zKw8m0xGHVFN8JgLI1JU
ag3JlCbd7WNkAffLgUO+fobta6P0ASaxBXQ+88aOh9Yp6evuHBLVd/maC1+qNp7I
YEVw5HupVpCukPlNmSVpypH9+vfVdRcmrxGZiCoskmwoW+8JnmvPWjsvulFc1nqh
89lnz0XAMzHOTOmaK93s+kiJlZDoKJgrDs9B20Jtunur6El7oChR+f5z/AVmNfMr
zessucoRlQ2u4kYMqw/oDKoyE6bkWXhwFB5vjZaz8kXE5HGWF0HCVTnmBF79H/9B
C8Nx3K9FNyA=
=5SNP
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Pull "Two fixes for v4.17-rc cycle" from Tony Lindgren:
Fix a build regression with split object directories reported by Russell
and fix range sizes for omap4 cm2 and prm modules.
* tag 'omap-for-v4.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix build when using split object directories
ARM: dts: Fix cm2 and prm sizes for omap4
The DTS file for the NAS4220B had the pin config for the
ethernet interface set to the pins in the SL3512 SoC while
this system is using SL3516. Fix it by referencing the
right SL3516 pins instead of the SL3512 pins.
Cc: stable@vger.kernel.org
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Reported-by: Andreas Fiedler <andreas.fiedler@gmx.net>
Reported-by: Roman Yeryomin <roman@advem.lv>
Tested-by: Roman Yeryomin <roman@advem.lv>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
GPL-1.0 is not part of the valid identifier list and as its meaning is GPL
version 1.0 only this would be incompatible with the kernel license.
As this code was included into the kernel, assume its GPL-1.0+
Fixes: 84b2170109 ("ARM: S3C24XX: Add SPDX license identifiers")
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
We should get drvdata from struct device directly. Going via
platform_device is an unneeded step back and forth.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Although we've implemented PSCI 0.1, 0.2 and 1.0, we expose either 0.1
or 1.0 to a guest, defaulting to the latest version of the PSCI
implementation that is compatible with the requested version. This is
no different from doing a firmware upgrade on KVM.
But in order to give a chance to hypothetical badly implemented guests
that would have a fit by discovering something other than PSCI 0.2,
let's provide a new API that allows userspace to pick one particular
version of the API.
This is implemented as a new class of "firmware" registers, where
we expose the PSCI version. This allows the PSCI version to be
save/restored as part of a guest migration, and also set to
any supported version if the guest requires it.
Cc: stable@vger.kernel.org #4.16
Reviewed-by: Christoffer Dall <cdall@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The sleep33xx and sleep43xx files should not depend on a header file
generated in drivers/memory. Remove this dependency and instead allow
both drivers/memory and arch/arm/mach-omap2 to generate all macros
needed in headers local to their own paths.
This fixes an issue where the build fail will when using O= to set a
split object directory and arch/arm/mach-omap2 is built before
drivers/memory with the following error:
.../drivers/memory/emif-asm-offsets.c:1:0: fatal error: can't open
drivers/memory/emif-asm-offsets.s for writing: No such file or directory
compilation terminated.
Fixes: 41d9d44d72 ("ARM: OMAP2+: pm33xx-core: Add platform code needed for PM")
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We want to work towards phasing out the at24_platform_data structure.
There are few users and its contents can be represented using generic
device properties. Using device properties only will allow us to
significantly simplify the at24 configuration code.
Remove the at24_platform_data structure and replace it with an array
of property entries. Specify the exact model instead of the "at24"
wildcard and drop the byte_len/size property, as the model name already
implies the EEPROM's size.
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We want to work towards phasing out the at24_platform_data structure.
There are few users and its contents can be represented using generic
device properties. Using device properties only will allow us to
significantly simplify the at24 configuration code.
Remove the at24_platform_data structure and replace it with an array
of property entries. Specify the exact model instead of the "at24"
wildcard and drop the byte_len/size property, as the model name already
implies the EEPROM's size.
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
