Commit Graph

16 Commits

Author SHA1 Message Date
Alex Deucher
3c94566ce1 drm/radeon/rs780: implement get_current_sclk/mclk
Will be used for exposing current clocks via INFO ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-03-19 12:26:29 -04:00
Michele Curti
01467a9b5e drm/radeon: reduce sparse false positive warnings
include radeon_asic.h header file in the various xxx_dpm.c files
to reduce sparse false positive warnings. Not so great patch
in itself, but reducing warning count from 391 to 258 may help
to see real problems..

Signed-off-by: Michele Curti <michele.curti@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-10-16 18:34:10 -04:00
Alex Deucher
82f79cc54b drm/radeon/dpm: move platform caps fetching to a separate function
It's needed by by both the asic specific functions and the
extended table parser.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-02-18 16:11:30 +01:00
Alex Deucher
e14cd2bbcb drm/radeon/dpm: switch on new late_enable callback
Right now it's called right after enable, but after
reworking the dpm init order, it will get called later
to accomodate loading the smc early, but enabling
thermal interrupts and block powergating later after
the ring tests are complete.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:56:50 -05:00
Alex Deucher
c2ee29d002 drm/radeon/dpm/rs780: fix force_performance state for same sclks
If the low and high sclks within a power state are the same,
there no need to enable sclk scaling.  Enabling sclk scaling
can cause display stability issues on some boards.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-15 20:27:51 -04:00
Alex Deucher
e40210cca9 drm/radeon/dpm/rs780: don't enable sclk scaling if not required
If the low and high sclks are the same, there is no need to
enable sclk scaling.  This causes display stability issues on
certain boards.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=60857

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-15 20:27:50 -04:00
Alex Deucher
ce7b30e025 drm/radeon/dpm/rs780: add some sanity checking to sclk scaling
Since the clock scaling is based on fb divider adjustments,
make sure the other pll parameters are the same.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-15 20:27:49 -04:00
Alex Deucher
c3eaa08827 drm/radeon/dpm/rs780: use drm_mode_vrefresh()
Rather than open coding it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-09-15 20:27:48 -04:00
Alex Deucher
84f3d9f7b4 drm/radeon/dpm: fix fallback for empty UVD clocks
Some older 6xx-7xx boards didn't always fill in the
UVD clocks properly in the UVD power states.  This
leads to the driver trying to set a 0 clock which
results in slow or broken UVD playback.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=69120

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-09-11 11:44:34 -04:00
Anthoine Bourgeois
63580c3e48 drm/radeon/dpm: implement force performance levels for rs780 (v2)
Allows you to limit the selected power levels via sysfs.

Force the feedback divider to select a power level.

v2: fix checking in rs780_force_fbdiv,
    drop a duplicate divider structure in rs780_dpm_force_performance_level,
    Force the voltage level too.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-11 11:44:24 -04:00
Alex Deucher
444bddc4b9 drm/radeon/dpm: add debugfs support for RS780/RS880 (v3)
This allows you to look at the current DPM state via
debugfs.

Due to the way the hardware works on these asics, there's
no way to look up exactly what power state we are in, so
we make the best guess we can based on the current sclk.

v2: Anthoine's version
v3: fix ref div

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-17 16:47:52 -04:00
Alex Deucher
915203c187 drm/radeon/dpm: add support for setting UVD clock on rs780
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:40:12 -04:00
Alex Deucher
a172230f19 drm/radeon/dpm/rs780: properly catch errors in dpm setup
We weren't properly catching errors in dpm_enable()
and dpm_set_power_state().

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:52 -04:00
Alex Deucher
f5d73a809e drm/radeon/dpm/rs780: restructure code
Needed to properly handle dynamic state adjustment.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:11 -04:00
Alex Deucher
4a6369e993 drm/radeon/kms: add dpm support for rv6xx (v3)
This adds dpm support for rv6xx asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching

Set radeon.dpm=1 to enable.

v2: remove duplicate line
v3: fix thermal interrupt check noticed by Jerome

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-06-27 10:50:08 -04:00
Alex Deucher
9d67006e6e drm/radeon/kms: add dpm support for rs780/rs880
This adds dpm support for rs780/rs880 asics.  This includes:
- clockgating
- dynamic engine clock scaling
- dynamic voltage scaling

set radeon.dpm=1 to enable it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:25 -04:00