Enable the GPIO interrupt controller for the AXG SoCs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Now that the GPIO controller has been enabled also on AXG we can hook up
the GPIO interrupt for the PHY.
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There is actually no alternate xtal on any of the axg board I have
seen so far. The 32k is actually generated internally, deriving from
the 24MHz main xtal.
Amlogic SoC also have the option to provide the 32k reference externally,
through one of the AO pads, but no platform is using this ATM.
Fixes: 5e395e1466 ("ARM64: dts: meson-axg: add an 32K alt aoclk")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the watchdog node also on the AXG platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson GX SoCs embeds a clock measurer IP to measure the internal
clock paths frequencies.
This patch adds the node in the top-level meson-gx dtsi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.
Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.
Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch adds support for the Phicomm N1. This device based on P230 reference design.
And this box doesn't have cvbs, so disable related section in device tree.
Signed-off-by: He Yangxuan <yangxuan8282@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On Amlogic chipsets, the bias set through pinconf applies to the pad
itself, not only the GPIO function. This means that even when we change
the function of the pad from GPIO to anything else, the bias previously
set still applies.
As we have seen with the eMMC, depending on the bias type and the function,
it may trigger problems.
The underlying issue is that we inherit whatever was left by previous user
of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual
setup we will get is undefined.
There is nothing mentioned in the documentation about pad bias and pinmux
function, however leaving it undefined is not an option.
This change consistently disable the pad bias for every pinmux functions.
It seems to work well, we can only assume that the necessary bias (if any)
is already provided by the pin function itself.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
In some cases (such as a boot from SPI) the bootloader or the ROM code may
leave a bias pull-down on the mmc pins. If so the MMC will fail during the
initialisation.
Explicitly disabling the pinmux solves the problem.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for
the function definition, the other for the bias. This is not necessary
since we can define the function and the bias in the same subnode.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch disable EEE advertisement for P230 board (DWMAC + RTL8211F).
If not disable it, the network connection is not stable, will got issues
like throughput drop or broken link.
Signed-off-by: He Yangxuan <yangxuan8282@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable SCPI on the axg platform, with cpu clock and hwmon
(core temperature) support
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Correct the unit-address in the node name of the SRAM shared memory
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
MHU mailbox address is wrong. Fixing it enables the mailboxes on the A113.
These mailboxes are needed for SCPI
Fixes: 9d59b70850 ("arm64: dts: meson-axg: add initial A113D SoC DT support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The hdmi_5v regulator must be enabled to provide power to the physical HDMI
PHY and enables the HDMI 5V presence loopback for the monitor.
Fixes: b409f625a6 ("ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the secure monitor device to the axg platform.
With this, we can read the SoC serial number.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The uart used with bluetooth chipset on the s400 has flow control
available. Let's enable it.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The gpio line names were set in the pinctrl node instead of the gpio node,
at the time it was merged, it worked, but was obviously wrong.
This patch moves the properties to the gpio nodes.
Fixes: 60795933b7 ("ARM64: dts: meson-gxl-khadas-vim: Add GPIO lines names")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The gpio line names were set in the pinctrl node instead of the gpio node,
at the time it was merged, it worked, but was obviously wrong.
This patch moves the properties to the gpio nodes.
Fixes: b03c7d6438 ("ARM64: dts: meson-gxbb-odroidc2: Add GPIO lines names")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The gpio line names were set in the pinctrl node instead of the gpio node,
at the time it was merged, it worked, but was obviously wrong.
This patch moves the properties to the gpio nodes.
Fixes: 12ada0513d ("ARM64: dts: meson-gxbb-nanopi-k2: Add GPIO lines names")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The gpio line names were set in the pinctrl node instead of the gpio node,
at the time it was merged, it worked, but was obviously wrong.
This patch moves the properties to the gpio nodes.
Fixes: 47884c5c74 ("ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
section 2.2.1 of the DT specs says: " If the node has no reg property,
the @unit-address must be omitted and the node-name alone differentiates
the node from other nodes at the same level in the tree"
Simply replace the '@' with a '-' to fix this warning.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This enables Bluetooth support for the following models:
- Khadas VIM basic (AP6212) using firmware BCM43438A1.hcd
- Khadas VIM pro (AP6255) using firmware BCM4345C0.hcd
The AP6212 module used on the VIM basic has an ID clash with another
device. To get Bluetooth working you either need to apply a kernel
patch to drivers/bluetooth/btbcm.c so 0x2209 loads BCM43438A1 or the
BCM43438A1.hcd firmware must be renamed to BCM43430A1.hcd.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the required peripheral clock for the efuse device.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
While it is possible to rework the s400 board to solder an eMMC on it,
it is not the default option and most boards are fitted with a NAND
instead.
Let's disable the emmc device by default to reflect this. The board
equipped with an eMMC will just have to alter the DT in the
bootloader, like we do for the reserved memory regions.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
eMMC pwrseq is defined in the s400 dts but not used in the emmc node.
This is probably just a copy/paste error
Fixes: 221cf34bac ("ARM64: dts: meson-axg: enable the eMMC controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC,
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
dtc has new checks for SPI buses. The meson dts files have a node named
spi' which causes false positive warnings. As the node is a pinctrl child
node, change the node name to be 'spi-pins' to fix the warnings.
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dtb: Warning (spi_bus_bridge): /soc/periphs@c8834000/pinctrl@4b0/spi: incorrect #address-cells for SPI bus
Cc: Carlo Caione <carlo@caione.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: linux-amlogic@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The order between "syscon" and "simple-mfd" is important because in these
particular cases, the node needs to be first a "simple-mfd" to expose
it's sub-nodes, and later on a "syscon" to permit other nodes to access
this register space through the "syscon" mechanism.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add missing chosen and memory nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Use the correct compatible for the AXG ethernet mac node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the PDM input device on the S400 and it to the sound card
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There are 7 digital mics on the MIC daughter board attached
to the s400 board, so add the digital microphone codec to
its DTS
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
DMC is a small memory region with various registers,
including the ones needed for the canvas module.
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There is actually several different libretech board with the CC suffix
so the model name is not appropriate here. Update to something more
specific
Reported-by: Da Xue <da@lessconfused.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Devices using the new V4L2 mem2mem vdec require a larger CMA pool. As
nearly all GX* devices are video/media focused and will use it, set a
larger (256MB) default value.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Sort DT nodes by address when possible, by node node name otherwise.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the sound card of the s400. With it the following interface
should be working:
* Lineout
* Daugther card speaker 1 (same output as lineout)
* Linein
* SPDIF output
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add TODDR and FRDDR audio fifos of the AXG SoC.
These fifos are the capture and playback memory interfaces of audio
subsystem of the AXG.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
- new SoC: S905W
- new boards: based on S905W: Amlogic P281, Oranth Tanix TX3 Mini
- AXG: add DT for new audio clock controller
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Merge tag 'amlogic-dt64-2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 64-bit DT changes for v4.19, round 2
- new SoC: S905W
- new boards: based on S905W: Amlogic P281, Oranth Tanix TX3 Mini
- AXG: add DT for new audio clock controller
* tag 'amlogic-dt64-2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-gxl: add support for the Oranth Tanix TX3 Mini
ARM64: dts: meson-gxl: add support for the S905W SoC and the P281 board
dt-bindings: arm: amlogic: Add support for the Oranth Tanix TX3 Mini
dt-bindings: arm: amlogic: Add support for GXL S905W and the P281 board
dt-bindings: add vendor prefix for Shenzhen Oranth Technology Co., Ltd.
ARM64: dts: meson-axg: add the audio clock controller
clk: meson: expose GEN_CLK clkid
clk: meson-axg: add pcie and mipi clock bindings
dt-bindings: clock: add meson axg audio clock controller bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the SPDIF playback codec to the axg s400 board
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the es7154 digital to analog converter which supplies the
lienout jack of the s400
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the es7241 analog to digital converter which is fed by the
lienin jack of the s400
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the devices reponsible for managing the i2s/tdm clocks and pads
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the tdm devices responsible for serializing audio samples
for i2s/tdm interfaces
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the tdm devices responsible for decoding the data provided
through audio serial interface.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the SPDIF output device of the axg audio subsystem
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the audio memory arbiter which control the access of the audio
fifos to the DDR.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The usb power regulator is supplied by the vcc 5v regulator and
controlled by a GPIO. This will be needed to enable usb.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This regulator is controlled by a GPIO and supplies various devices
on the board, such as the lineout codec, the usb supply or the lcd
controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the parent supply of the s400 power supplies.
Also add 'regulator-always-on' property on the regulators which can't
be disabled
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Tanix TX3 Mini is a TV box based on the Amlogic S905W chipset.
There are two variants:
- 1 GiB or 2 GiB of DDR3 memory
- 8 GB or 16 GB eMMC flash
Both variants come with:
- 802.11 b/g/n wifi (Silicon Valley Microelectronics SSV6051, does not
support Bluetooth)
- an LED 7 segment display with an FD628 controller
- HDMI and AV (CVBS) output
- 2x USB (utilizing both USB ports provided by the SoC)
- micro SD card slot
- serial console (uart_AO) has to be soldered after opening the case
The board seems to be very similar to the P23x and Q20x reference
boards, which is why it includes meson-gx-p23x-q20x.dtsi:
- eMMC reset routed to BOOT_9
- the SDIO wifi chip's reset line is routed to GPIOX_6 and the reference
clock is 32.768KHz on PWM_E
- SD card detection is routed to CARD_6
- vqmmc of all MMC controllers is hard-wired to 1.8V (VDDIO_BOOT)
- uart_AO can be accessed after opening the case and soldering RX, TX
and GND lines onto the exposed solder points (marked with RX, TX and
GND)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S905W is a new SoC from the GXL series. It is a cost-reduced version of
the S905X.
The P281 development board from Amlogic uses the same layout as the P231
(S905D development board). Thus the new P281 board inherits
meson-gx-p23x-q20x.dtsi to avoid code-duplication.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the audio clock controller which is part of the audio bus
This controller takes 8 input plls, and the usual clock gate, from the
main clock controller. It provides the clocs for the all the devices of
the audio subsystem, such as tdms, spdif, pdm, etc.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Spdif out in not multiplexed on gpio A7 (spdif in is)
Remove this entry to fix the problem.
Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spdif output pins")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Regulator should not be defined inside the SoC dtsi file.
vddio_ao18 is already defined in the S400 board dts anyway.
Fixes: bb8a2ebd0498 ("ARM64: dts: meson-axg: add saradc support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC.
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic P241 board is the Reference Design board for the S805X
variant of the Amlogic Meson GXL SoC family.
The P241 board has the following features :
- 1GiB DDR4 Memory
- HDMI Connector with CEC
- A/V jack with Stereo Audio and CVBS
- 10/100 Ethernet
- 2x USB2.0 Type-A
- On-board WiFi SDIO Module
- On-board eMMC storage
- Infraread Received
- Factory Reset button
- UART connector
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[khilman: s/arm64/ARM64/ in Subject]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the different pin configurations for the spdif output
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the first of the two tas5707 power amplifier present on the
speaker daughter board.
According to the schematics of the S400 v3, only I2SB_DIN3 and
I2SC_DOUT2 will be available to the speaker board.
9R83, 9R84 and 9R18 are not connected so no audio signal will be
provided to the second amplifier. There is no point in enabling it
even if it is visible on the i2c bus.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add a fixed regulator for the main 12v which is the main power supply
of the board.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The microphone card connected to the s400 has 6 leds controlled
through an additional i2c gpio controller.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson GXBB based Nanopi-K2 board has an HDMI connector
with CEC and CVBS available on the 40pin header.
This patch adds the nodes to enable HDMI, CEC and CVBS functionnalities.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
meson-gx-p23x-q20x.dtsi is currently used by five boards:
- Amlogic P230 and P231 (which should be identical, apart from the
external RGMII PHY on P230 whereas P231 can only use the internal PHY)
- Amlogic Q200 (identical to P230 but with an S912 GXM SoC instead of a
GXL S905D SoC) and Q201 (identical to P231 but with an S912 GXM SoC
instead of a GXL S905D SoC)
- NEXBOX A1 (based on the S912 GXM SoC)
The Amlogic P230 board uses a Broadcom BCM4356 SDIO wifi chip. Since the
other Amlogic reference design boards are very similar it's safe to
assume that these also use a Broadcom based SDIO wifi chip (which is
also how it was configured in meson-gx-p23x-q20x.dtsi).
However, NEXBOX A1 comes with a "longsys LTM8830" SDIO wifi module,
which is based on the "Qualcomm Atheros QCA9377-3(QCA1023-0)" chipset.
Thus move the wifi node from meson-gx-p23x-q20x.dtsi to each of the
four Amlogic reference board's .dts files.
There are no devicetree bindings for the QCA9377 SDIO wifi module yet,
so nothing is added to meson-gxm-nexbox-a1.dts.
Fixes: f51b454549 ("ARM64: dts: meson-gxm: Add support for the Nexbox A1")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node
(and configure it's vref-supply "VDDIO_AO18") in their corresponding
.dts file.
Move both (the saradc node as well as the VDDIO_AO18 regulator) to
remove some duplicate code.
As a positive side-effect this enables the saradc also for the P231 (GXL
S905D) and Q201 (GXM S912) development boards which are similar to the
P230/Q200 boards (P231 and Q201 use the internal 100Mbit/s PHY, while
P230 and Q200 have an external RGMII PHY).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
meson-gxl-mali.dtsi is only used on GXL SoCs. Thus it should use the GXL
specific compatible string instead of the GXBB one.
For now this is purely cosmetic since the (out-of-tree) lima driver for
this GPU currently uses the "arm,mali-450" match instead of the SoC
specific one. However, update the .dts to match the documentation since
this driver behavior might change in the future.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Like the odroid-c2 and wetek, the s400 uses the RTL8211F and seems to
suffer from the kind of stability issue.
Doing an iperf3 download test, we can see a significant number of LPI
interrupts on the tx path. After a short while (5 to 15 seconds), the
network connection dies. If using rootfs over NFS, the connection may
also break during the boot sequence.
We still don't have a real explanation for this problem so let's disable
EEE once again.
Fixes: f6f6ac914b ("ARM64: dts: meson-axg: enable ethernet for A113D S400 board")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Vendor firmware/uboot has different reserved regions depending on
firmware version, but current codebase reserves the same regions on
GXL and GXBB, so move the additional reserved memory region to common
.dtsi.
Found when putting a recent vendor u-boot on meson-gxbb-p200.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Like LibreTech-CC, the USB0 needs the 5V regulator to be enabled to power the
devices on the P212 Reference Design based boards.
Fixes: b9f07cb4f4 ("ARM64: dts: meson-gxl-s905x-p212: enable the USB controller")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Based on updated information from Amlogic, correct the register range
for the SD/eMMC blocks to the right size.
Reported-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There is a problem with the sd-uhs mode when doing a soft reboot.
Switching back from 1.8v to 3.3v messes with the card, which no longer
respond (timeout errors). According to the specification, we should
perform a card reset (power cycling the card) but this is something we
cannot control on this design.
Then the only solution to restore the communication with the card is an
"unplug-plug" which is not acceptable
Until we find a solution, if any, disable the sd-uhs modes on this design.
For the people using uhs at the moment, there will a performance drop as
a result.
Fixes: 3cde63ebc8 ("ARM64: dts: meson-gxl: libretech-cc: enable high speed modes")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Cc: stable@vger.kernel.org
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
>From the hardware perspective, the actual pclk of the AO uarts
is the corresponding clkc_ao uart gate, not the main clock controller clk81.
This was not problem so far, because the uart_gate had
the CLK_IGNORE_UNUSED flag, which kept the gate open.
We plan to remove the CLK_IGNORE_UNUSED flag in another patch,
but before doing that, we need to fix the clock in the DTS file.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This add the AO (Always-On part) clock DT info for Meson-AXG SoC
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: cleanup subject]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The i2c AO is used for the MIC daughter card of the S400 board
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the pins related to the i2c AO controller of the meson-axg platform
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The clock specified for the i2c AO controller is the one for the EE
domain, which is incorrect as this controller needs the clock for AO
i2c controller.
Fixes: dc6f858e26 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Remove undocumented and unused "clk_i2c" clock name and the second
interrupt from i2c nodes of meson-axg platform. Those seems to have
been copy/pasted from the vendor kernel
Fixes: dc6f858e26 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson-AXG S400 board is shipped with AP6255 wifi module,
which is actually using the brcmfmac 43455 driver.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add reset lines to the mmc controllers of the meson gx and axg SoCs
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the GPIO interrupt controller driver which found in the Amlogic's
Meson-AXG SoC, the controller share the similar ASIC IP as other meson SoCs.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock running at 166MHz (to be safe), since we found some eMMC chip
fail to run at 200MHz due to tunning phase error.
Signed-off-by: Nan Li <nan.li@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: drop incorrect SDIO pwrseq property]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There are a few differences between the gxbb and gxl clock controllers
which makes them incompatible. The hdmi, gp0 and fixed pll are
different. The rate of these plls reported by gxbb driver on a gxl
device would be wrong.
Remove the gxbb compatible from the gxl clock controller node so only
the correct driver is matched.
Fixes: 973fbd55b5 ("ARM64: dts: meson-gxl: Add clock nodes")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Like the meson-gx, the axg clock controller should go through a syscon
to access the hhi register region, and not directly map the region.
This way, the hhi register region can be used safely by multiple drivers.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The parent of the meson-gx clock controller should be the hhi system
controller, not the HIU bus. This way, the HHI register region can be
used safely by multiple drivers
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Khadas VIM2 board connects the dwc3 controller to an internal 4-port
USB hub which. Two of these ports are accessible directly soldered to
the board, while the other two are accessible through the 40-pin "GPIO"
header.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Nexbox A95X provides two USB ports. Enable the SoC's USB controller
on this board to make these USB ports usable.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The LibreTech CC ("Le Potato") board provides four USB connectors.
These are provided by a hub which is connected to the SoC's USB
controller.
Enable the SoC's USB controller to make the USB ports usable. Also turn
on the HDMI_5V regulator when powering on the PHY because (even though
it's not shown in the schematics) HDMI_5V also supplies the USB VBUS.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
