Commit Graph

7 Commits

Author SHA1 Message Date
Shengjiu Wang
85702f4c80 ARM: dts: imx7d-pinfunc: update sai select input value
Update SAI select input daisy chain value according to
Reference Manual.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-04-16 21:53:57 +08:00
Fabio Estevam
37de44f238 ARM: dts: imx7: Fix typo in watchdog pin name
Change "WDOD1" to "WDOG1" in watchdog pin names.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-04 11:51:06 +08:00
Sascha Hauer
213e51ca8d ARM: dts: imx7: Add "LPSR" to LPSR iomux pin names
The i.MX7 has two iomux controllers. the iomuxc and the iomuxc_lpsr.
In a board dts we have to make sure that both controllers are supplied
with the correct pins. It's way too easy to do this wrong since only
a look into the reference manual can reveal which pins belong to which
controller. To make this clearer add "LPSR" to the pin names which
belong to the LPSR controller.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-29 09:53:27 +08:00
Stefan Agner
3cdcd2e841 ARM: dts: imx7d-pinfunc: fix UART pinmux defines
The UART pinmux defines for the pins which are part of the LPSR
pinmux controller are wrong: Output signals configure the input
sel value and the pinmux defines allow not to distinguish between
DCE/DTE mode. Follow the usual pattern using DTE/DCE as part of
the define to denote the two UART configuration options.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-14 15:30:55 +08:00
Stefan Agner
97f5c1817b ARM: dts: imx7d-pinfunc: add input mux for UART2 RX DTE mode
Add input mux for UART2 RX in DTE mode. This allows to use the pad
UART2_TX_DATA_ALT0 as UART2 RX. This particular input select seems
to be missing in current reference manuals (Rev. B), but when looking
at the tables and other UART input select registers (e.g. UART3) it
seems naturally that this input mux register also has a fourth pad
option for UART2_TX_DATA_ALT0. It has also been proven to be required
to use UART2 in DTE mode and the particular pads on the Colibri iMX7
platform.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Frank Li  <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-06 16:27:49 +08:00
Adrian Alonso
5b8e6ed482 ARM: dts: imx7d-pinfunc: add gpio1 pad iomux settings
- Add imx7 SoC GPIO1 pad iomuxc settings
  <mux_reg conf_reg input_reg mux_mode input_val>
- Fix UART input select daisy chain setting values

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:17 +08:00
Frank Li
e370bff74e ARM: dts: add pinfunc include file to support imx7d
Addi i.MX7D support:
	pinfunc part except GPIO1

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03 15:03:57 +08:00