Commit Graph

645 Commits

Author SHA1 Message Date
Jacob Chen
6547653050 clk: rockchip: add rk3288 isp_in clock ids
Add clock-ids for the isp block of the rk3288.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-13 16:42:16 +01:00
Elaine Zhang
6cc1aef0ad clk: rockchip: add dt-binding header for rk3328
Add the dt-bindings header for the rk3328, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3328.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-05 13:06:03 +01:00
Linus Torvalds
991688bfc6 ARM: SoC driver updates for v4.10
Driver updates for ARM SoCs, including a couple of newly added drivers:
 
 - A new driver for the power management controller on TI Keystone
 - Support for the prerelease "SCPI" firmware protocol that ended up
   being shipped by Amlogic in their GXBB SoC.
 - A soc_device can now be matched using a glob from inside the
   kernel, when another driver wants to know the specific chip
   it is running on and cannot find out from DT, firmware or hardware.
 - Renesas SoCs now support identification through the soc_device
   interface, both in user space and kernel.
 - Renesas r8a7743 and r8a7745 gain support for their system controller
 - A new checking module for the ARM "PSCI" (not to be confused
   with "SCPI" mentioned above) firmware interface.
 - A new driver for the Tegra GMI memory interface
 - Support for the Tegra firmware interfaces with their
   power management controllers
 
 As usual, the updates for the reset controller framework are merged
 here, as they tend to touch multiple SoCs as well, including a new
 driver for the Oxford (now Broadcom) OX820 chip and the Tegra
 bpmp interface.
 
 The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
 Rockchips SoCs see some further updates.
 
 Conflicts:
 - ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
 - drivers/soc/renesas/Makefile: multiple files got added, keep
   all in logical sorting
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFMaGWCrR//JCVInAQLs5RAA3I1I8/R+pd5jfMaAB8Od3S4g8YSqIDjC
 EIOoDPx9GDV70+cGs4ea+L9bfGs3ePGivCtcbftNsLDAueQ2jKMa3ShqxA/MMbJE
 rWQi/ARaDFY0nHL8VPWq7XyYwwrah+/gKBr8UhkaKI0vy6DBqxyCknrS2kgF88rv
 DVs2wnRvDM7GVUax0JDzuySR7BXJIuUfS78jPMESASbTQktsZTFUyH+osiqHtptD
 M5bPC8rxOeZXljt3DOvXSdK9rVnji/A3nznY4r3tlt805eaOA7CzjVSsY27WQel0
 63uj+FgE+eM0sECIxpkNbH/HHq2V4QkUoy3fk0xPkzRbllBBpS+UieGamTnPJup8
 wf5uiH1IqLLLV9F/504S92fp0pgFPpOGYWZnBDlIbh3aGq4tMjIRqRYMTyCT02hN
 +b54v0SuImFiN6p8HMS1ugYQ+1m9TU40b5pZkzkTJbSQOMm6oi3j0A0orXU/TPKd
 FVMrlUyfh+yu+vs1hGWLs1+mBjFnxXzSc8yJeaCdX4MvCY5/aVJZ+cwq4Bk+1YU5
 9Qhkeo5JV/l9FlrjxomnEq3l/WV/pFmj7JRZsb1BM88m+5LYUf2lv11b5B4FvrTd
 yx8SSpe3+ofIijdNbJ8IywF6y0OXF6UnrlouOVdSIp+wPs+pibdU/5gQep16pvqd
 WW6sVWn6quA=
 =6dP8
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - A new driver for the power management controller on TI Keystone

   - Support for the prerelease "SCPI" firmware protocol that ended up
     being shipped by Amlogic in their GXBB SoC.

   - A soc_device can now be matched using a glob from inside the
     kernel, when another driver wants to know the specific chip it is
     running on and cannot find out from DT, firmware or hardware.

   - Renesas SoCs now support identification through the soc_device
     interface, both in user space and kernel.

   - Renesas r8a7743 and r8a7745 gain support for their system
     controller

   - A new checking module for the ARM "PSCI" (not to be confused with
     "SCPI" mentioned above) firmware interface.

   - A new driver for the Tegra GMI memory interface

   - Support for the Tegra firmware interfaces with their power
     management controllers

  As usual, the updates for the reset controller framework are merged
  here, as they tend to touch multiple SoCs as well, including a new
  driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
  interface.

  The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
  Rockchips SoCs see some further updates"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  misc: sram: remove useless #ifdef
  drivers: psci: Allow PSCI node to be disabled
  drivers: psci: PSCI checker module
  soc: renesas: Identify SoC and register with the SoC bus
  firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
  firmware: qcom: scm: Remove core, iface and bus clocks dependency
  dt-bindings: firmware: scm: Add MSM8996 DT bindings
  memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
  bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
  ARM: shmobile: Document DT bindings for Product Register
  soc: renesas: rcar-sysc: add R8A7745 support
  reset: Add Tegra BPMP reset driver
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
  ...
2016-12-15 16:03:25 -08:00
Linus Torvalds
786a72d791 ARM: DT updates for v4.10
Lots of changes as usual, so I'm trying to be brief here. Most of the
 new hardware support has the respective driver changes merged through
 other trees or has had it available for a while, so this is where things
 come together.
 
 We get a DT descriptions for a couple of new SoCs, all of them variants
 of other chips we already support, and usually coming with a new
 evaluation board:
 
 - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
 - Qualcomm MDM9615 LTE baseband
 - NXP imx6ull, the latest and smallest i.MX6 application processor variant
 - Renesas RZ/G (r8a7743 and r8a7745) application processors
 - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
 - Rockchip rk1108 single-core application processor
 - ST stm32f746 Cortex-M7 based microcontroller
 - TI DRA71x automotive processors
 
 These are commercially available consumer platforms we now support:
 - Motorola Droid 4 (xt894) mobile phone
 - Rikomagic MK808 Android TV stick based on Rockchips rx3066
 - Cloud Engines PogoPlug v3 based on OX820
 - Various Broadcom based wireless devices:
   - Netgear R8500 router
   - Tenda AC9 router
   - TP-LINK Archer C9 V1
   - Luxul XAP-1510 Access point
 - Turris Omnia open hardware router based on Armada 385
 
 And a couple of new boards targeted at developers, makers
 or industrial integration:
 - Macnica Sodia development platform for Altera socfpga (Cyclone V)
 - MicroZed board based on Xilinx Zynq FPGA platforms
 - TOPEET itop/elite based on exynos4412
 - WP8548 MangOH Open Hardware platform for IOT, based on
   Qualcomm MDM9615
 - NextThing CHIP Pro gadget
 - NanoPi M1 development board
 - AM571x-IDK industrial board based on TI AM5718
 - i.MX6SX UDOO Neo
 - Boundary Devices Nitrogen6_SOM2 (i.MX6)
 - Engicam i.CoreM6
 - Grinn i.MX6UL liteSOM/liteBoard
 - Toradex Colibri iMX6 module
 
 Other changes:
 - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
   mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
   mvebu, allwinner, broadcom, exynos, zynq
 
 - Continued fixes for W=1 dtc warnings
 
 - The old STiH415/416 SoC support gets removed, these never made it into
   products and have served their purpose in the kernel as a template
   for teh newer chips from ST
 
 - The exynos4415 dtsi file is removed as nothing uses it.
 
 - Intel PXA25x can now be booted using devicetree
 
 Conflicts:
 arch/arm/boot/dts/r8a*.dtsi: a node was added
 the clk tree, keep both sides and watch out for git
 dropping the required '};' at the end of each side.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFMZHGCrR//JCVInAQKQ6A/+Og42qy1rhL3cfHiSsT7e5giQNVSFY7Cm
 Z06R83AEv6HDMTNzyiJr5udRGOhm40qIoe92fhVJSRF7F6o/GbCQ7YOyU4KdQELg
 caqRCe1Nq6RT0RYU0m6xVyv/ox0JTNEaB+TcvD1x4pgUQNo9sSBfiXpTzOKhLhqs
 zmsfpNpj8v188Iofoju3WtwN26riJ7P4QdYIaNaH4qNQgoQbMbQICDwnpSsNJY+x
 MSlNrbtYqfz6vc5fqa0mtfhF6wIFxuRnTgSLi9skWZ2l/fkn4ljF3RhN1Z86TYPv
 CYsqDu+DF0YNxFrht3BAK6WTe2PdCnMNLNnMhYC6NDQ8YG1tbwvXQFM1KVanRvxx
 hXP4Nt2sZYiqA4v8joFPgp9gnyBMdhtJEtWSmHwCY0RFObySJR4I1GY7igh02HUJ
 gxlmOYcmklzLiyXvfjdDvg0sCV1tBhaBKTLYxF7lVCzG2QaR22Le+p3o+SWm+e+V
 Ruc9l/iwHaeasNnbAkDEiEyi1FobtuEeTSZnKaXfKX8WuKVZLJrCEm7WiRIsj0Ww
 vJ9ABVft7PEv/Ov3fbKBWON4vxKTBBgHuEDcbIsp19w4BSH1WJf5bGXIm7QeA3Z9
 aD+DtA5W5ExIjMQR2+qgz/BBIzVVVVvG8DEcdcCtc3JGRJll5PadShLdqKjVIerc
 SpsxqCKoRCI=
 =wJt3
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "Lots of changes as usual, so I'm trying to be brief here. Most of the
  new hardware support has the respective driver changes merged through
  other trees or has had it available for a while, so this is where
  things come together.

  We get a DT descriptions for a couple of new SoCs, all of them
  variants of other chips we already support, and usually coming with a
  new evaluation board:

   - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
   - Qualcomm MDM9615 LTE baseband
   - NXP imx6ull, the latest and smallest i.MX6 application processor variant
   - Renesas RZ/G (r8a7743 and r8a7745) application processors
   - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
   - Rockchip rk1108 single-core application processor
   - ST stm32f746 Cortex-M7 based microcontroller
   - TI DRA71x automotive processors

  These are commercially available consumer platforms we now support:

   - Motorola Droid 4 (xt894) mobile phone
   - Rikomagic MK808 Android TV stick based on Rockchips rx3066
   - Cloud Engines PogoPlug v3 based on OX820
   - Various Broadcom based wireless devices:
      - Netgear R8500 router
      - Tenda AC9 router
      - TP-LINK Archer C9 V1
      - Luxul XAP-1510 Access point
   - Turris Omnia open hardware router based on Armada 385

  And a couple of new boards targeted at developers, makers or
  industrial integration:

   - Macnica Sodia development platform for Altera socfpga (Cyclone V)
   - MicroZed board based on Xilinx Zynq FPGA platforms
   - TOPEET itop/elite based on exynos4412
   - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
   - NextThing CHIP Pro gadget
   - NanoPi M1 development board
   - AM571x-IDK industrial board based on TI AM5718
   - i.MX6SX UDOO Neo
   - Boundary Devices Nitrogen6_SOM2 (i.MX6)
   - Engicam i.CoreM6
   - Grinn i.MX6UL liteSOM/liteBoard
   - Toradex Colibri iMX6 module

  Other changes:

   - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
     mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
     mvebu, allwinner, broadcom, exynos, zynq

   - Continued fixes for W=1 dtc warnings

   - The old STiH415/416 SoC support gets removed, these never made it
     into products and have served their purpose in the kernel as a
     template for teh newer chips from ST

   - The exynos4415 dtsi file is removed as nothing uses it.

   - Intel PXA25x can now be booted using devicetree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
  arm: dts: zynq: Add MicroZed board support
  ARM: dts: da850: enable high speed for mmc
  ARM: dts: da850: Add node for pullup/pulldown pinconf
  ARM: dts: da850: enable memctrl and mstpri nodes per board
  ARM: dts: da850-lcdk: Add ethernet0 alias to DT
  ARM: dts: artpec: add pcie support
  ARM: dts: add support for Turris Omnia
  devicetree: Add vendor prefix for CZ.NIC
  ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
  ARM: dts: berlin2q-marvell-dmp: fix regulators' name
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ...
2016-12-15 15:50:24 -08:00
Stephen Boyd
e3f4358e23 Merge tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:

A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.

* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: add clock controller for rk1108
  dt-bindings: add documentation for rk1108 cru
  clk: rockchip: add dt-binding header for rk1108
  clk: rockchip: fix copy-paste error in rk3399 testclk
  clk: rockchip: validity should be checked prior to cpu clock rate change
2016-12-06 15:17:26 -08:00
Arnd Bergmann
bb2d850778 A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
 
 And one new soc, the rk1108 combining a single-core Cortex-A7
 with a separate DSP core.
 -----BEGIN PGP SIGNATURE-----
 
 iQEtBAABCAAXBQJYNj8LEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYE3oggA
 j0b99/r3uGOavo9nun2yJTqq/bKhjAAupNhrEJtjKP9gdbR/1HOkjzRX/1g9ID36
 b5cMpOePpRN9xCg0IyK4/+0jgXJ1r41Fp1yEI51Z57jlo0WMzP10/E8hGwNQgW7Q
 QSAPrTZbwLcrDjq7cOHrF8WvuMnA+6ye77IcDFJ0ZjtU7PYwfO63VTIJ/37Ph3FE
 wlDb0YH57nrn13qUlK8UDJJysl1v2H8NP48/5qEfgF/swbyt6VKkaL2Q+Ua2aDys
 AaH2oTRUPBSPqqXj78OKrWfHB8U5WWfn7PvDYxyjYcnOnasvE7kEBlmw4P955QDM
 XzEEXkiEcQFMLoEiWim5Xw==
 =2VYn
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:

A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.

And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.

* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
  ARM: dts: rockchip: add rockchip RK1108 Evaluation board
  ARM: dts: rockchip: add basic support for RK1108 SOC
  clk: rockchip: add dt-binding header for rk1108
  dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
  ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
  ARM: dts: rockchip: fix TSADC reset node for rk3066a
2016-11-30 23:36:38 +01:00
Arnd Bergmann
0b4160976f Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYNYmtAAoJEEgEtLw/Ve779vQP/RFZKsVt50YSFTZxE8cMhBen
 /ASy/PrcJmd+AbhkyP6fS4M4GkryNu4E2JdlRxu0bbAc7dyRcqCB/YlE7AWVnGVI
 9hlbROKxY+rWbZiYtTnqH4J6HoNheZn0U96GJSfNrwrncF8TNjjgUYfqPnqpcnUI
 L4ApF1XKGFeuOFVJviz2q5C2WKrqajMDmNyiuGSmuZLIE1QkVX3XuHZq1/D5hbix
 /MOkctrNlSkcfmFUBWiXpgY0uNli5QdRzzcqf6vpERxgPukTncixI6R5/pUB9TAp
 4GdFQcHDjTbjPf9sGsqg0wNHMf5Vg/sLcFt18ocWad/ooh2++U/n8/TwnZhXcxZW
 DCCbrWz6l8KoP0ay6BJyzVxLsaqqzlIjPqvVo24VvB8PUpTtpnEDhEQiMPIwBlgi
 HTgVnOzJQAzNAkCPot7i+esDd3tCZnm7ZFTT5GzYp3SdEASZ75ZyBZnfStFrgyCO
 CSNKcLAWA9n7bR6mkgoOyZ2+V5NJycuWnpIAtc1428nvP0vntFnliffwQ+CWRUvo
 vLxLMtsc3MrMl2DvHPG0992Jm2UzaMeYKW/RsPB67mV5+PC5F/e7vM0AU9Ko74aO
 oH1FvV7vBHWLUWNvAmWLhR/tmE9tt5pLTuAsoprBUJ+40sY/o9RLkWO/1sB9169e
 DC5y40qcVHeDWCK/WHkR
 =vTIK
 -----END PGP SIGNATURE-----

Merge tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into next/dt

Pull "Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions" from Geert Uytterhoeven:

Shared by clock drivers, and DTS files.

* tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions
2016-11-30 16:43:10 +01:00
Joseph Lo
d55865608f dt-bindings: firmware: Add bindings for Tegra BPMP
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).

The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:33:41 +01:00
Olof Johansson
e99b4c970b 32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
 optimizations allowing for better performance on rk3066, the usage of
 pin constants to bridge between the two numbering schemes used (gpio
 controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
 and UHS/HS modes for the mmc controllers on the popmetal board.
 
 Two new boards, the PX3-based evaluation board, with the PX3 being an
 industrial variant of the rk3188 soc and the Rikomagic MK808 board
 based around the rk3066 are also added.
 -----BEGIN PGP SIGNATURE-----
 
 iQEtBAABCAAXBQJYJzNfEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYGsQQf/
 WWYA4/oR4pT8HMns5coctc2zOyNU8KYmaeRl7TViUna+HA6/m2SGMqomTFV2AK0v
 Ha3M6A35dDUGJNmAbEB5oolGOwHh82gZKYxYIQiNX+zCxeb5JxKCXWSqAjC9Ndwu
 h600H1K/Qb26OzaVE/ICtlveduN+9BWrlzNseHsm99Z93FNsRLN0Z8s2Mn3jra6P
 2Pf1sJkOPuh47i/Y/gTDVcFSf6Srb4SM/26fiZjrRa8LaaO/0I2Ku34ne9FygGzi
 0GBHWh2SILM297MZMcrCDoJvTTqLT05tUrX1PDGmdunqP8vnsOAgvL9291G8d4sw
 PbYE3onlyoxHmeOSffAe5g==
 =AXPK
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.

Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.

* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
  ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
  ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
  ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
  include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
  ARM: dts: rockchip: Add rk3066 MK808 board
  devicetree: Add vendor prefix for Rikomagic
  ARM: dts: rockchip: initialize rk3066 PLL clock rate
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
  ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
  ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
  ARM: dts: rockchip: update compatible strings for Rockchip efuse
  ARM: dts: rockchip: add rockchip PX3 Evaluation board
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:31:55 -08:00
Olof Johansson
a4a1fb15c5 STi dts update:
Change sound card name for B2120
 Enable sound card for B2260
 Remove stih415-clks.h
 Identify critical clocks for STiH407
 Fix typo in stih407-pinctrl.dtsi
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYJDWMAAoJEMrHeC97M/+maG4P/1Yd84g5fE8Wr4AoZzdXN6kP
 J8A/bB7cHQr84NHRTPwKSxuMVXA80ifpg68nbNjdy1GCEGG7APtVySVffBR+ddwg
 O76837cO1MezHieU6hBof+fiFmiHGA9bqEr6dw91+sD418gWVuStqm94W1p0P4bg
 i+IGwJdLGq/7KMFh5cIFUdqBdB2MINX1sfqzYg6mqmv/RidTg0EDspYg2rutBYuD
 ZBmEoQBHOLlFavlRZ7mcZ7dc4vuuLKiTWwzXJyfs1BmGrhNbBOvcXRvIJJi1vrfN
 GJuhIYErEDLq58/eKNCOpIhVzNcWg1MNvO0q04KDK+8QUt15rxO1kHoGt20Sj/fd
 X9AkRhvGPVBaHJT3IGX7lK4n52FVNPDmWi44vlEvWR8TcdgrOGWK3FbJDqPKJl+m
 QvFGkJ/d+pfpdl0PKA4gIP/YQK6taYeRczPr9Q+2ICSxqIyO8RqL04feMiFjqoae
 FMN0Q+1ehP5UfCRgJsNN8fWgm9d2cvFO47le/WBxrYyH/al8eRyGelonsfOu9+mI
 kqE8YZiG1KHv4v+Kc2pbOWi6bQcjGuSLrFb34Aux5xLU5a3kjMW+Ypz/Yp7rCdvQ
 wmqiP4V1NLnuk6y6AKrq9aToItPZSDSApRF2TIh1c4N3xLIVI/kH3BG7uSVpRNCo
 1Q5fyFEsrEov0wRXVXqZ
 =cIvM
 -----END PGP SIGNATURE-----

Merge tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt

STi dts update:

Change sound card name for B2120
Enable sound card for B2260
Remove stih415-clks.h
Identify critical clocks for STiH407
Fix typo in stih407-pinctrl.dtsi

* tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: dts: STiHxxx-b2120: change sound card name
  ARM: dts: STiH410-B2260: enable sound card
  ARM: dts: remove stih415-clks.h
  ARM: dts: stih407-clocks: Identify critical clocks
  ARM: dts: STiH407: DT fix s/interrupts-names/interrupt-names/

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:28:45 -08:00
Stephen Boyd
54fd1b3bc4 clk: renesas: Updates for v4.10 (take two)
- Add R-Car RST driver for obtaining mode pin state, and move the
     related functionality from platform code to DT,
   - Add r8a7743 and r8a7745 CPG Core Clock Definitions.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYIJj/AAoJEEgEtLw/Ve773fgP/3yhgJLa6zoYzFE4lS5q/+vk
 95DAqkGrc9D+QzCw1/YAb8w2zqr9kigwBcwc9xlv9wQ/5Nx63WN9jgccw1Kd2xhU
 OaKhgyHpeXpH9MM46TRVJ5Txu7xLVofxtgxGv4ED43sNwZinrH9PrC/ELgQWgbq+
 SQTVjE4bKqANNugt91UzPIzL5YPeJvX02SlFoDjbS3XNg5/cTjAaidVW24Ed8x5S
 OAUkC4chm81Jz4B7M5QcVy4vdfb9aE/m7d5a6iy6nE5EopH6Puu8RwL0SzvltDp4
 AxIj5ZslOKhvqCKvVlp2ALlBeZ1rOXr5KsOdHHN+rkMiaR8a8agv7y/H/gJSbwiZ
 x7oI0QDiS5/6tYDxx67KtGECMAcSK0b0p/rWziYw9C5BDuvuMe5HhxN9fesHLUOx
 Yq6f0GwveUgWfcHIjcEh6Htj4dUfXaxiTgZSF1Dgp5SvW9fPhg40Rz3+ahnT40rP
 8Ke/W5M5QZ2f+L51l3QiZ3NtX1kWLr1H8GExV15Cm08aBWx7p/8fvdqpv1EcVhiW
 dEnhtPBVf8O/LiZ6eS+0aBQS22fl9u06s3d/vXQoO9kaCcK+BWP9cB+5CsieTD6s
 D/3iOq4da3OnOjTcmIQEKEsnrtJq5qxBOZ52Fk422Wk/EX9Bwl+/ggmXhchiGn4V
 I28aLLIUHIfmOMb5H23E
 =Pd5n
 -----END PGP SIGNATURE-----

Merge tag 'clk-renesas-for-v4.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull Renesas clk driver updates from Geerty Uytterhoeven:

  - Add R-Car RST driver for obtaining mode pin state, and move the
    related functionality from platform code to DT,
  - Add r8a7743 and r8a7745 CPG Core Clock Definitions.

The commits here are intermingled with arm-soc material because
of the hard dependency we're breaking between mach code and
driver code. We're replacing that with a driver dependency
between the soc driver and the clk driver.

* tag 'clk-renesas-for-v4.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (25 commits)
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions
  clk: renesas: rcar-gen2: Remove obsolete rcar_gen2_clocks_init()
  clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init()
  clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init()
  ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver
  ARM: shmobile: r8a7779: Stop passing mode pins state to clock driver
  ARM: shmobile: r8a7778: Stop passing mode pins state to clock driver
  clk: renesas: rcar-gen3-cpg: Remove obsolete rcar_gen3_read_mode_pins()
  clk: renesas: r8a7796: Obtain mode pin values from R-Car RST driver
  clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driver
  clk: renesas: rcar-gen2: Obtain mode pin values using RST driver
  clk: renesas: r8a7779: Obtain mode pin values from R-Car RST driver
  clk: renesas: r8a7778: Obtain mode pin values using R-Car RST driver
  arm64: renesas: r8a7796 dtsi: Add device node for RST module
  arm64: renesas: r8a7795 dtsi: Add device node for RST module
  ARM: dts: r8a7794: Add device node for RST module
  ARM: dts: r8a7793: Add device node for RST module
  ARM: dts: r8a7792: Add device node for RST module
  ARM: dts: r8a7791: Add device node for RST module
  ...
2016-11-17 13:31:07 -08:00
Stephen Boyd
38320181c7 Allwinner clock changes for 4.10
The usual patches from us, but most notably the introduction of the A64
 clocks unit.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJYK30lAAoJEBx+YmzsjxAgNqMP/A0eKZkzCWP8QXePS5OVTzjn
 Afnp85tpYGNrR5OTwJiM32IDAAU6mvb4813Z0MwQ5Wp+TM3APpiRzwnF3yjxeoGu
 Jgzsu+NLgPtp/CozaGC46IlacGRR0amyLhryq8cVOaEKTed4b0t2Xjmk4JsRj7Gp
 2ki5HVs4QSN63p4GixxhxVXgtYNoOBvm3qCgMbWa10j5DIDA2Wf//feudTeu98xa
 gR9uz08xBVHXtIlyjXfY72l/qcjmcRZDdAXPTItZWR4MREuLMh3jlwM2oxMn1nKY
 PLu7KfPail1ATv+6Pa5EJcAqvxCnW8mH8F0Tk/xqd/ZGuEwHW5rRPVl5NLO81iBe
 K4Pfh8DrEtMBhS2C5nY3qOYQP6XcE4d2OSN8zNCM50ATdXMx+6gX1Dep6cz6waKj
 Uo/v6GdkMhKgd1lBcH2CGJrWN7HQWb4wM/gctIa7T5uIQp/WBWEXACpOmRsD+4yt
 c83qtys3FTO5Iuj1UVETHm8tAIC58xvQ+ZYs3Z7wusMJVRMH2KMi7MiNXF0zBHDL
 cG/cQa9MrhIOJgd04TC8EDye/+Wn1rLFhMZWnbgcThpdKmd+MSPO/3ZeNKkCFJAh
 F3CD+5oeQA9mctJBirpsPCrGnKwtkEZycB7jymkEPptvad+TLfGHdkwE0U2FhaxE
 qN094vyPeAgceu9u9NyZ
 =7+Az
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock changes from Maxime Ripard:

The usual patches from us, but most notably the introduction of the A64
clocks unit.

* tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: Add A64 clocks
  clk: sunxi-ng: Implement minimum for multipliers
  clk: sunxi-ng: Add minimums for all the relevant structures and clocks
  clk: sunxi-ng: Finish to convert to structures for arguments
  clk: sunxi-ng: Remove the use of rational computations
  clk: sunxi-ng: Rename the internal structures
  clk: sunxi: mod0: improve function-level documentation
2016-11-16 11:19:20 -08:00
Stephen Boyd
c284a7ba72 i.MX clock updates for 4.10:
- A patch series to fix the long standing issue with glitchy parent
    mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
    is sourced from ldb_di_clk.
  - A patch to add imx6ull clock support on top of imx6ul clock driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJYKni2AAoJEFBXWFqHsHzOu+UIAKpiVKqacJYxD1wEJDh9Mtq2
 o9U10aGY6yl3ZEa5Ik8OTqg2Aa6ZT5kaV8h9i5uv7XIGqCSM6SUcWweF0KlRyJP4
 7bjz9rcir2/zXys+dVuRodUiF8uowoFxgw7wAHwHfzs1oA7ihQaUB4v6vBiNbADq
 zheCn2AqDWhIKAOFkLcyEid2IyIz0S/tlyzfElBmukSons+0zTrJ+e9QePzcuRZO
 TnhZAxc/FQwcPZ/a2kiwiOOfQXWQld5pIeIp1YHWD4+L4m0Yxb/WK1yaocTxox2O
 Ek8BPlkpNYdic8g3DRlwZGCHe5UaESSEQ3pyXlgYAdIOA2i+0tlnnCVCW0gNvQc=
 =DJo7
 -----END PGP SIGNATURE-----

Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX clock updates from Shawn Guo:

 - A patch series to fix the long standing issue with glitchy parent
   mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
   is sourced from ldb_di_clk.
 - A patch to add imx6ull clock support on top of imx6ul clock driver.

* tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: clk-imx6ul: add clk support for imx6ull
  clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK
  clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
  clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf
2016-11-16 11:16:07 -08:00
Shawn Lin
5fababc161 clk: rockchip: add dt-binding header for rk1108
Add the dt-bindings header for the rk1108, that gets shared
between the clock controller and the clock references in the dts.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-16 12:18:58 +01:00
Stephen Boyd
09d5dc586b PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
 actually running at.
 As always also some additional and optimized PLL rates for rk3066 and
 rk3399, some additional clock ids for rk3066 and some additional clocks
 on rk3399 are now sucessfully handled inside their respective driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQEtBAABCAAXBQJYJy9BEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYEZMwf/
 XPnSVfSOSXSR3A6JOc7emX5vXVcXWq3xkt98l85qhiJO8yQg+vwFk2Ur7Q22cwJI
 ycg6K1EAokKt7/ZE48XZ0JYXQknxxSnO7ZU0MTVQVtQB7+oWr79VY+o+WylgsSZ7
 LApU2lGniYXJOnQBTfNl8Zqyrg+M+q6zTW9HwK47TH51xjUiY9K+/nyNlAuEqBWQ
 TR8EuOQGxIQWHzJ7HFxCO4DNGEszrRkQMOcDsp2b5rxKTF3+waQne6OhX95JZpX5
 PI12A1RC8+DNvYRZlhAnrmKHDycu6QYe18ZQADs5FPihMoxK4Eh/eXzZIIgXBkXd
 aOc4ljF03ry8mWyKtENVCg==
 =2Wr8
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk driver updates from Heiko Stuebner:

PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.

As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.

* tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused
  clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
  clk: rockchip: add 400MHz to rk3066 clock rates table
  clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399
  clk: rockchip: Use clock ids for cpu and peri clocks on rk3066
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  clk: rockchip: add 533.25MHz to rk3399 clock rates table
2016-11-14 18:38:35 -08:00
Bai Ping
73cd5e53ca clk: imx: clk-imx6ul: add clk support for imx6ull
imx6ull is the derived SoC from imx6ul

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-15 08:55:36 +08:00
Stephen Boyd
c60df0a42b Merge branch 'clk-hisi' into clk-next
* clk-hisi:
  clk: hisilicon: add CRG driver for Hi3516CV300 SoC
  clk: hisilicon: add CRG driver for Hi3798CV200 SoC
2016-11-14 14:25:11 -08:00
Pan Wen
c80dfd9bf5 clk: hisilicon: add CRG driver for Hi3516CV300 SoC
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Pan Wen <wenpan@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-14 12:04:39 -08:00
Jiancheng Xue
707d33cb0b clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-11 15:43:49 -08:00
Stephen Boyd
81ab3279c5 Merge branch 'clk-qcom-rpm' into clk-next
* clk-qcom-rpm:
  clk: qcom: Add support for RPM Clocks
  clk: qcom: Add support for SMD-RPM Clocks
  clk: qcom: Always add factor clock for xo clocks
2016-11-10 16:50:16 -08:00
Georgi Djakov
872f91b5ea clk: qcom: Add support for RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:46:56 -08:00
Georgi Djakov
00f64b5887 clk: qcom: Add support for SMD-RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.

The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.

This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@codeaurora.org: Remove useless braces for single line if]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:37:55 -08:00
Stephen Boyd
b0e031c94a Merge branch 'clk-qcom-8994' into clk-next
* clk-qcom-8994:
  clk: qcom: Add support for msm8994 global clock controller
  dt-bindings: qcom: clocks: Add msm8994 clock bindings
2016-11-10 15:47:56 -08:00
Jeremy McNicoll
49e2828243 dt-bindings: qcom: clocks: Add msm8994 clock bindings
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 14:27:29 -08:00
Patrice Chotard
226226994c ARM: dts: remove stih415-clks.h
Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.

[1] https://patchwork.kernel.org/patch/9157571/

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-11-10 09:52:47 +01:00
Sergei Shtylyov
1fa8a875df clk: renesas: Add r8a7745 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:13:30 +01:00
Sergei Shtylyov
4e195933de clk: renesas: Add r8a7743 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index. The data comes from Table 7.2b in revision 1.00 of the
RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:09:12 +01:00
Sergei Shtylyov
68cc085a4d ARM: dts: r8a7794: remove Z clock
R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...

Fixes: 0dce5454d5 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:47 +01:00
Chris Brandt
7c8522b704 ARM: dts: r7s72100: add sdhi clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:17 +01:00
Maxime Ripard
c6a0637460 clk: sunxi-ng: Add A64 clocks
Add the A64 CCU clocks set.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-03 09:06:18 +01:00
Neil Armstrong
5881456295 clk: oxnas: Add dt-bindings include file for OX820
In order to support the Oxford Semiconductor Gate clocks, add a
dedicated dt-binding include file for gate indexes.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-3-narmstrong@baylibre.com
2016-10-23 10:18:36 -07:00
Neil Armstrong
6fc8ec8bfd clk: oxnas: Add dt-bindings include file for OX810SE
In order to prepare support for the Oxford Semiconductor OX820, add
a dt-bindings include file used by the ox810se dtsi.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20161005150752.22618-2-narmstrong@baylibre.com
2016-10-23 10:18:33 -07:00
Paweł Jarosz
550a13315e clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
Add bindings for ACLK_CPU, HCLK_CPU, PCLK_CPU, ACLK_PERI, HCLK_PERI, PCLK_PERI.

We need this to init it's rate at boot time.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-21 15:26:23 +02:00
Chris Brandt
6c35a66656 ARM: dts: r7s72100: add mmcif clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-10-17 08:20:02 +02:00
Linus Torvalds
c913fc4146 ARM: SoC: late DT updates for v4.9
These updates have been kept in a separate branch mostly because
 they rely on updates to the respective clk drivers to keep the
 shared header files in sync.
 
 - The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
   automotive SoC similar to the ⅹ8a7795 chip we already support, but
   the dts changes rely on a clock driver change that has been
   merged for v4.9 through the clk tree.
 
 - The Amlogic meson-gxbb (S905) platform gains support for a few
   drivers merged through our tree, in particular the network and
   usb driver changes are required and included here, and also
   the clk tree changes.
 
 - The Allwinner platforms have seen a large-scale change to their
   clk drivers and the dts file updates must come after that.
   This includes the newly added Nextthing GR8 platform, which is
   derived from sun5i/A13.
 
 - Some integrator (arm32) changes rely on clk driver changes.
 
 - A single patch for lpc32xx has no such dependency but wasn't
   added until just before the merge window
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAV/gzeGCrR//JCVInAQKVhw/5AS5R2S7m7VTlWMvGjvH9ITudYhiAGJP1
 z5nP5SwJsfmSjfvw0kSxGUmsNS3rHutsPMz65EesKqFuC3LPZiqMUqrzxt9iqqJx
 I+XdAxDTnOE1RBZFtB9dL+qLzHQ87pMo6R9dfs32sxb3QuCQBYhcFyLmQDuZuHH0
 yeDi3ARFvgxx/qoRUA7cnSlY5RLNzM44y+Ik/ZcVr4ReqYBC2g5mGi5htoiNSLWR
 nwWR+5hNLAp44OZgkZfNsf6kB9brWDQh3PbnBjy6sKXSBoSVIfxTweh2DMJXbZ7l
 1Ck+S7WyLMhGJp448TcuBykr/l9i3uqNh061XavjwP8CAjAdZ787XlnNSztc2pyh
 dvbI/E76pLGb5ZoFdqlY2Syl63ZFN4K8mjZMSPYfYKf85EDIxe4MYwpbo7/pwzh3
 8OlBwH6r4aUMw+QgE1nx8nsjaCoGDMFdgJeJJaWdriZ6Nst2n5gREk/mzbrAWkNG
 ujChn/6hES9LuE21aCp1ipB7qnnyeRinfqz2acEFxMQxuPdjwKrdJqNsBaTWsapE
 Z+b/BFP+LTdPfHCmMSVwfMrNbwsoY7+L4EXXL36lUgOwcDp0vCXA+PiiahYASewA
 1LDQ3CURCEapdBhVU+06Kb4y5eWU7M7EqpOwpHgRJ92dVxgNxuCfcurvxzqPP1UP
 3O4R7bfUTTg=
 =OmAu
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late DT updates from Arnd Bergmann:
 "These updates have been kept in a separate branch mostly because they
  rely on updates to the respective clk drivers to keep the shared
  header files in sync.

   - The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
     automotive SoC similar to the ⅹ8a7795 chip we already support, but
     the dts changes rely on a clock driver change that has been merged
     for v4.9 through the clk tree.

   - The Amlogic meson-gxbb (S905) platform gains support for a few
     drivers merged through our tree, in particular the network and usb
     driver changes are required and included here, and also the clk
     tree changes.

   - The Allwinner platforms have seen a large-scale change to their clk
     drivers and the dts file updates must come after that. This
     includes the newly added Nextthing GR8 platform, which is derived
     from sun5i/A13.

   - Some integrator (arm32) changes rely on clk driver changes.

   - A single patch for lpc32xx has no such dependency but wasn't added
     until just before the merge window"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
  ARM: dts: lpc32xx: add device node for IRAM on-chip memory
  ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
  ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
  ARM: dts: sun8i: add pinmux for UART1 at PG
  dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
  dts: sun8i-h3: add pinmux definitions for I2C0-2
  dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
  dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
  dts: sun8i-h3: add pinmux definitions for UART2-3
  ARM: dts: sun9i: a80-optimus: Disable EHCI1
  ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
  ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
  ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
  ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
  ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
  ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
  ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
  ...
2016-10-07 21:34:49 -07:00
Linus Torvalds
00e729c933 ARM: DT updates for v4.9
These are as usual a very large number of mostly boring updates to
 enable devices in existing machines, or to fix minor bugs.  Notably,
 an ongoing treewide effort to fix warnings caused by an update to the
 device tree compiler. These are enabled with "make W=1" at the moment
 but can hopefully become the default once all issues have been addressed.
 
 No new SoC platform is added this time around (Armada 395 and Orion
 mv88f5181 are slight variations of existing ones), but a significant
 number of new dts files are added, which I list by platform:
 
 - Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets;
 	Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E,
 	Orange Pi Lite, Olimex A33-Olinuxino, and Nano Pi Neo
 	single-board computers
 
 - ARM Realview: all supported machines (ported from board files)
 
 - Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
 	BCM958622hr reference boards for Northstar platform;
 	Raspberry Pi Zero single-board computer
 
 - Marvell EBU: Netgear WNR854T router (ported from board file);
 	Armada 395 SoC platform and GP board
 	Armada 390 DB development board
 
 - NXP i.MX: imx7s Warp7 reference board;
 	Gateworks Ventana GW553x single-board computer,
 	Technologic Systems TS-4900 and
 	Engicam IMX6UL GEA M6UL computer-on-module,
 	Inverse Path USB armory board
 
 - Qualcomm: LG Nexus 5 Phone
 
 - Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards
 
 - Rockchip: Rockchip RK3288 Fennec reference board;
 	Firefly RK3288 Reload platform
 
 - ST Microelectronics STi: B2260 (96boards) single-board computer
 
 - TI Davinci: OMAP-L138 LCDK Development kit
 
 - TI OMAP: beagleboard-x15 rev B1 single-board computer
 
 Conflicts: vendor-prefixes.txt has conflicting additions, keep all of
 them in alphabetical order.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAV/g11mCrR//JCVInAQIWbw/9FOrBghI2bFqZkDwFE8E3QCpc9bIiETMx
 FMdHV6FAo0D6Yp4EqlWjFI0u0Kn9l4FKz0SYWAigpfT6gfeI1THC2Kl31mslvb5U
 v3QreXI4rKjZS/B1lYECee0os+fNvJcWKj3uFjb4VT1k7T6+MytjHGAQSzwxM66Q
 0Lp5HjdFGDrOXoIUx2eEZkZlVXyQ2EFocMoAsj+s/MHnA8fn1tWW08633kjTsC6y
 9Xj71joghlDKZjA56htaEQ+/6dYdxAHVlvkN7aL9di+2Sc2/ma6my70Zvs4zwtOv
 uJDhcJhjwvf3QtDuOoGhTnFtQYQWaONaGUFyEwYyy2kIwiJy0afep4JCq2o+/CZM
 VMvGXepJpVujE9mg+LwHPgaMYgBhswsJzwQ2ZESrMQcUZ624E18dG2/ei5zat4UN
 5/NvzxEoDGmfQFQUpuoZuPqhwLRauXr7I+u4aliIdtSBGeaA2T1yFT4pVgNUOxBQ
 0bMtE2QSUKyaF+xAHLTsV7yheDU0S+C7zVkLPwePK0V7vUFuBsdQiXEqXh/6MSq0
 iYVPmKwNTIHK3qMiGtm8XDugjR8Pf0tCXRqIWJMlXs75rCAsKfFW4j4XYnlO4wMy
 dP2fdoe0xA+zthR0hRHD5i8WCmISeUgtPAdFyTid1jZkMk1AzM0AqBUdAqTInvQ3
 O4JSYcjBWoo=
 =/gg/
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "These are as usual a very large number of mostly boring updates to
  enable devices in existing machines, or to fix minor bugs. Notably, an
  ongoing treewide effort to fix warnings caused by an update to the
  device tree compiler. These are enabled with "make W=1" at the moment
  but can hopefully become the default once all issues have been
  addressed.

  No new SoC platform is added this time around (Armada 395 and Orion
  mv88f5181 are slight variations of existing ones), but a significant
  number of new dts files are added, which I list by platform:

   - Allwinner: Empire Electronix M712 and iNet d978 Rev2 tablets,
     Orange Pi PC Plus, Orange Pi 2, Orange Pi Plus 2E, Orange Pi Lite,
     Olimex A33-Olinuxino, and Nano Pi Neo single-board computers

   - ARM Realview: all supported machines (ported from board files)

   - Broadcom: BCM958525er, BCM958522er, BCM988312hr, BCM958623hr and
     BCM958622hr reference boards for Northstar platform, Raspberry Pi
     Zero single-board computer

   - Marvell EBU: Netgear WNR854T router (ported from board file),
     Armada 395 SoC platform and GP board Armada 390 DB development
     board

   - NXP i.MX: imx7s Warp7 reference board, Gateworks Ventana GW553x
     single-board computer, Technologic Systems TS-4900 and Engicam
     IMX6UL GEA M6UL computer-on-module, Inverse Path USB armory board

   - Qualcomm: LG Nexus 5 Phone

   - Renesas: r8a7792/wheat and r7s72100/rskrza1 development boards

   - Rockchip: Rockchip RK3288 Fennec reference board, Firefly RK3288
     Reload platform

   - ST Microelectronics STi: B2260 (96boards) single-board computer

   - TI Davinci: OMAP-L138 LCDK Development kit

   - TI OMAP: beagleboard-x15 rev B1 single-board computer"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (390 commits)
  ARM: dts: sony-nsz-gs7: add missing unit name to /memory node
  ARM: dts: chromecast: add missing unit name to /memory node
  ARM: dts: berlin2q-marvell-dmp: add missing unit name to /memory node
  ARM: dts: berlin2: Add missing unit name to /soc node
  ARM: dts: berlin2cd: Add missing unit name to /soc node
  ARM: dts: berlin2q: Add missing unit name to /soc node
  ARM: dts: berlin2: Remove skeleton.dtsi inclusion
  ARM: dts: berlin2cd: Remove skeleton.dtsi inclusion
  ARM: dts: berlin2q: Remove skeleton.dtsi inclusion
  arm: dts: berlin2q: enable all wdt nodes unconditionally
  arm: dts: berlin2: enable all wdt nodes unconditionally
  ARM: dts: omap5-igep0050.dts: Use tabs for indentation
  ARM: dts: Fix igepv5 power button GPIO direction
  ARM: dts: am335x-evmsk: Add blue-and-red-wiring -property to lcdc node
  ARM: dts: am335x-evmsk: Whitespace cleanup of lcdc related nodes
  ARM: dts: am335x-evm: Add blue-and-red-wiring -property to lcdc node
  ARM: dts: s3c64xx: Use macros for pinctrl configuration
  ARM: dts: s3c2416: Use macros for pinctrl configuration
  ARM: dts: s5pv210: Use macros for pinctrl configuration
  ARM: dts: s3c64xx: Use common macros for pinctrl configuration
  ...
2016-10-07 21:29:04 -07:00
Lucas Stach
b1d51b448e clk: imx6: fix i.MX6DL clock tree to reflect reality
The current clock tree only implements the minimal set of differences
between the i.MX6Q and the i.MX6DL, but that doesn't really reflect
reality.

Apply the following fixes to match the RM:
- DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by
  GPU3D_CORE
- GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF
- GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF

Cc: stable@vger.kernel.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 16:52:37 -07:00
Kalle Kankare
377d6479d2 clk: imx53: Add clocks configuration
Add clocks configuration for CSI, FIRI and IEEE1588.

Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 16:52:06 -07:00
Arnd Bergmann
53570cbc18 Amlogic driver updates for v4.9, 2nd round
- media: update IR support for newer SoCs
 - firmware: add secure monitor driver
 - net: new stmmac glue driver
 - usb: udd DWC2 support for meson-gxbb
 - clocks: expose more clock IDs for use by DT
 - DT binding updates
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJX2Z0aAAoJEFk3GJrT+8ZlkxoQAI0FJkQ371touZbMRSirMCdG
 fyx7ZZWGntw9yHCqcfVGLxy6oBk6bABWOWJzqGIBeTyn7qDoOqc4ec+pIWg7KECS
 h/yrJLGPQofI0Hm/6nzZikrjrK1h74c6bhkjRsAfqKCyq0AcEnH8cu1kAZmkwyJq
 osU1U/MhRLkIs6UZsc6H2nlsbSw8Ji4ZkSDfT/1P4SUqHgtz9k5PNYCEkPDGK23F
 1f1N3zYpqJVqAqucdLhTBsE56vSVzrAXLEsIwpaYCpEzuRO8MyjYP7SiKnky/5Za
 WAxz+hKufleqvvDqIK1zWvE/in4SyHrg9eVSHac/xbbDsUKy11RuJ2VasqT6xUOM
 r8oi0o1ot0IkMCJrA1Ogey0GqcSoyVUzy5FM+4SOz+M7IctLt7ZV0aVDmfXvG21f
 iQLZ7bPmgaj2kck95ppqc8saz0EIt32fJBaI3XvoG9PTpQeoYI7vok2k1l06kYQI
 3U6r7Zui4mj9PE2aFAEe3BpY2EbJDj8Vn+mtX4NtkCwS0PwZKkiUgZXF3H/qix3T
 +jv9yps2dLhihd4y6RcySVM3/PWuM7A8tU9oRBE+sttf2MiQzXvMPNM/GH0qOVEI
 3flZ6tsSLmj8jmFyOdqaxz8MuDo9KNi9b+AijPqWm+D0UfPPqFKnR6bvM4F496Dx
 4fG2a7JtDJUAz8e++Jtc
 =DlpW
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:

- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates

* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
  clk: gxbb: expose i2c clocks
  clk: gxbb: expose USB clocks
  clk: gxbb: expose spifc clock
  clk: gxbb: expose MPLL2 clock for use by DT
  Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
  usb: dwc2: add support for Meson8b and GXBB SoCs
  net: stmmac: update the module description of the dwmac-meson driver
  net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
  stmmac: introduce get_stmmac_bsp_priv() helper
  net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
  clk: meson-gxbb: Export PWM related clocks for DT
  meson: clk: Add support for clock gates
  gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
  clk: meson: Copy meson8b CLKID defines to private header file
  meson: clk: Rename register names according to Amlogic datasheet
  meson: clk: Move register definitions to meson8b.h
  clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
  nvmem: amlogic: Add Amlogic Meson EFUSE driver
  firmware: Amlogic: Add secure monitor driver
  media: rc: meson-ir: Add support for newer versions of the IR decoder
  ...
2016-09-19 17:49:07 +02:00
Vivek Gautam
dc19b6f5be clk: Add USB3 PHY reset lines
Adding missing reset lines for USB 3.0 PHY.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-16 16:19:50 -07:00
Jun Nie
ca0233285a clk: zx: register ZX296718 clocks
The ZX296718 clocks are statically listed and registered. More
clock will be added later.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-14 13:50:33 -07:00
Jerome Brunet
dfdd7d4af6 clk: gxbb: expose i2c clocks
I2C and AO_I2C clocks are needed for the i2c driver, expose to DT
(and comment out in clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:24:04 -07:00
Martin Blumenstingl
5dbe7890e6 clk: gxbb: expose USB clocks
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:23:55 -07:00
Jerome Brunet
f2120a8b09 clk: gxbb: expose spifc clock
SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:22:49 -07:00
Martin Blumenstingl
ed6f4b5180 clk: gxbb: expose MPLL2 clock for use by DT
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-09-14 11:22:49 -07:00
Stephen Boyd
de64f5c87d Allwinner Clock changes for 4.9
Four more SoCs converted to the new clock framework (A31, A31s, A23 and
 A33).
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJX1beIAAoJEBx+YmzsjxAgFNQQAIMCbooFBVbNTzSesGwGLBVl
 uRxO8FP8mPZPM0forHq6N6973no0l5H15I9w3x4T0ozkX18KwsI/dj8Q8ZiAl/S8
 gqo8rZARBBKy4rspQQazqFytSCZF+KznDigChhA1KeyG6fbob2bKdYtMRppH+l8F
 A3HpreGcqKrWv6rBEshYSt9fzFJeoi0W7Uzb0v4wQXuXuVDq/Zpp+fcu+2to/fOO
 CaI2Dh8Glcfn3gDwk7cZ94NTZud81B/zLqulcOSTV8CP1KQ/ovs6K8UvsziCCw0J
 oMD4t6kfK8BwCt1hsZTA9XjgIT0Hx1rj7wcTApa88BEea+hU0ulXiwdI1mB/x1TU
 E880Rp0KIDoldaUBggYTut/vTBWwpOP6lTRWp/EoGfs9Br9VEu1X0wzlihBdAhsQ
 IhR27GK1wp1fw0ahTFKCYNWTU5fl8iy40gGDqjpaAXnlqMEmIcEthyqdie/n83o+
 HvpUhfp9emnrXn5+y3uNeGc9M3O5BxpuyIjY4jChc5zOrrqvSAio1ifHP0TNDHEe
 ZW3TJSoqU8QfCaQTJKxVzC2LG0ZXIjwTepFtqrx5DrFOkc1M3tYod0L/80nau99v
 gVghFmaPVnS8HWmuKjlh/jXsI4AqcoESF9kv3bmecDuDc5cWIHkcI/97lsGpXIS8
 rSteIQUjRbQkwuo4TyA8
 =Ff/R
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock driver changes from Maxime Ripard:

Four more SoCs converted to the new clock framework (A31, A31s, A23 and
A33).

* tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi-ng: Add hardware dependency
  clk: sunxi-ng: Add A23 CCU
  clk: sunxi-ng: Add A33 CCU support
  clk: sunxi-ng: Add N-class clocks support
  clk: sunxi-ng: mux: Add mux table macro
  clk: sunxi-ng: div: Allow to set a maximum
  clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
  clk: sunxi-ng: div: Add mux table macros
  clk: sunxi-ng: Add A31/A31s clocks
  clk: sunxi-ng: mux: Add clk notifier functions
  clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents
  clk: sunxi-ng: mux: Add support for mux tables
  clk: sunxi-ng: mux: Rename mux macro to be consistent
  clk: sunxi-ng: nkm: Add mux to support multiple parents
  clk: sunxi-ng: mux: Increase fixed pre-divider div size
2016-09-14 11:10:15 -07:00
Stephen Boyd
3db385ea14 In addition to a few clean up and code consolidation patches this
includes:
 - addition of sound subsystem related clocks for Exynos5410 SoC
   (EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
   compatible in the clk-exynos-audss driver,
 - addition of DRAM controller related clocks for exynos5420,
 - MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
   clock drivers co-maintainer.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJX0thBAAoJEE1bIKeAnHqLjhwP/1sNlCVU30OQYAsVOG8doaL2
 tP4vQmxKWREMK+gg1iWyq6dhAWhOO/YdSL9KgvHAkCKolJfpoGfJjiPm0Pja+TOq
 pIHOdE5ql2Cb+PxeJoLQZxfcOsNczt0OorVWgeTJdDyB+/VXaGvVKYwoZFSUoQ5m
 nIPfAut5ynIVIk86EBjuSr61sUMoTEzVD7HFGAzYF78K4UPIsscfM43UWSHXqwiX
 rsxPZTzjETmtmjSPSP+m8mOY04nds0kFDWSPaP6lzmSQYC7jhGQxM7Pl4fmWBYho
 gqL1z4gcp4vHZYRHhtClOuKe1+dlXNRLRaFQSRgIFgpfX/AfQh0Hj35I7QhCmD3N
 LDNTWmiFxLVjPET0Z4NykPRzCfIcWYT4S2U2qJ857C2FG1v3DD/xiZ13UvbySTNi
 nh/Go6Jp1bbPRQMYxCcMY1a1RJ180qjsNCleC5/5w6KP0DWWJFVDcqFr3NLcmN7e
 nikD31moCKLEvPrd2Glezajv1IHD6K/c06cBcTHGBu2BobOrsBstTvjiIfDcjtC/
 uZymcsWUztPaM1iPLJ0Dzsrw2TkGcukrYm3R4kN4iRzDJK5XPh4dFUgquJOYlyNH
 PgYGBMXocMrBXNOF9lQ9mAsiO9JCfZLjXH9k2NP3w2P0YNTTSfIjBuBvySSiGK6x
 aYF0CXwKNDfJhmep+PzE
 =lEKC
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull samsung clk driver updates from Sylwester Nawrocki:

In addition to a few clean up and code consolidation patches this
includes:
- addition of sound subsystem related clocks for Exynos5410 SoC
  (EPLL, PDMA) and support for "samsung,exynos5410-audss-clock"
  compatible in the clk-exynos-audss driver,
- addition of DRAM controller related clocks for exynos5420,
- MAINTAINERS update adding Chanwoo Choi as the Samsung SoC
  clock drivers co-maintainer.

* tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: Add support for EPLL on exynos5410
  clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup
  clk: samsung: clk-exynos-audss: Add exynos5410 compatible
  clk: samsung: clk-exynos-audss: controller variant handling rework
  clk: samsung: Use common registration function for pll2550x
  clk: samsung: exynos5410: Expose the peripheral DMA gate clocks
  clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
  clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code
  clk: samsung: exynos5260: Move struct samsung_cmu_info to init section
  MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer
  clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks
  clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
2016-09-14 11:06:47 -07:00
Arnd Bergmann
e08644b0c7 Amlogic 64-bit DT changes for v4.9
- add watchdog, reset, IR remote, PWM
 - add secure monitor and eFuse
 - add always-on (AO) domain clock and reset
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXyhPZAAoJEFk3GJrT+8ZlIQkP/1Xyb2A483CPDL4JZP/BHDjd
 DXLpjTeiL7JVtfCdjRNFL1mOMEwtbhjuwklRsBaHIGGHg8TK26RJAdxzmRPtZ2fd
 U8wLrSRCdesF6bwI4j8zomm2tAD3a0Ujik21AROKZj1pWh/n9k0m+CrPgwBCZoA9
 yM1/usSP0Gm0kLWgH1mwVjGJOgf7Xi6TGHBsNyy1zl+Jj4uTf+aB6auHygemznvi
 cANjibsOFY+KvcE19/y/yGJL7nFeln9C6TE1igDh2m/e+FR0+Ng3p1qtZxb2jsnv
 TOFROdTyEjPN9tmJQxoJfjpY2PUXE1rKezGnJBVBtpCijvSVl39goDvobUajFJ67
 g5O483kwsjEqx7uOvl4WU/kFqw2HunpILSR5QuJJ15n9kxVN+tNeAjIxo/dG7wgD
 8Byeu5FGa2va6YNEkQF7UGagKIgIloG1N59OkFwLWwMem/xtd1nuiSoLlyuw82/C
 EXu9N2I9UbOA3s6sEEJBazvtk+ueHaENwIFLo5yPDOLCKmt8/ii4dV4QWzn9R7Zy
 d2NZpNjPj/eBRDC6O+MgJVAEuikjvfn9tUcuVQGjJ+pq3mtpAxzdclVHMYlKclON
 /ykQqRZPE33CDRBdp5TCbJp/UMyXyjhdhcaAaY7yYPpjkEjFEaLWTMH7wua04754
 K57RdpXb1kQG7qGAy9xF
 =UZHB
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic 64-bit DT changes for v4.9" from Kevin Hilman:

- add watchdog, reset, IR remote, PWM
- add secure monitor and eFuse
- add always-on (AO) domain clock and reset

* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: amlogic: gxbb: Enable NVMEM
  documentation: Add nvmem bindings documentation
  ARM64: dts: amlogic: gxbb: Enable secure monitor
  documentation: Add secure monitor bindings documentation
  ARM64: dts: meson-gxbb: Add PWM pinctrl nodes
  ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
  ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder
  dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
  ARM64: dts: amlogic: add the input pin for the IR remote
  ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node
  clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
  clk: meson: Add GXBB AO Clock and Reset controller driver
  dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
  ARM64: DTS: meson-gxbb: switch ethernet to real clock
  ARM64: dts: amlogic: meson-gxbb: Add watchdog node
2016-09-14 17:34:35 +02:00
Maxime Ripard
d05c748bd7 clk: sunxi-ng: Add A33 CCU support
This commit introduces the clocks found in the Allwinner A33 CCU.

Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10 11:41:19 +02:00
Sylwester Nawrocki
1d9aa64c37 clk: samsung: Use common registration function for pll2550x
There is no such significant differences in pll2550x PLL type
to justify a separate registration function.  This patch adapts
exynos5440 driver to use the common function and removes
samsung_clk_register_pll2550x().

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
2016-09-09 17:35:10 +02:00