Commit Graph

1587 Commits

Author SHA1 Message Date
Linus Torvalds
eab4002660 RISC-V Patches for the 5.7 Merge Window, Part 1
This tag contains the patches I'd like to target for 5.7.  It has a handful of
 new features:
 
 * Partial support for the Kendryte K210.  There are still a few outstanding
   issues that I have patches for, but I don't actually have a board to test
   them so they're not included yet.
 * SBI v0.2 support.
 * Fixes to support for building with LLVM-based toolchains.  The resulting
   images are known not to boot yet.
 
 This builds and boots for me.  There is one merge conflict, it's just a Kconfig
 merge issue.  I can publish a resolved branch if you'd like.
 
 I don't anticipate a part two, but I'll probably have something early in the
 RCs to finish up the K210 support.
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Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:
 "This contains a handful of new features:

   - Partial support for the Kendryte K210.

     There are still a few outstanding issues that I have patches for,
     but I don't actually have a board to test them so they're not
     included yet.

   - SBI v0.2 support.

   - Fixes to support for building with LLVM-based toolchains. The
     resulting images are known not to boot yet.

  I don't anticipate a part two, but I'll probably have something early
  in the RCs to finish up the K210 support"

* tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (38 commits)
  riscv: create a loader.bin boot image for Kendryte SoC
  riscv: Kendryte K210 default config
  riscv: Add Kendryte K210 device tree
  riscv: Select required drivers for Kendryte SOC
  riscv: Add Kendryte K210 SoC support
  riscv: Add SOC early init support
  riscv: Unaligned load/store handling for M_MODE
  RISC-V: Support cpu hotplug
  RISC-V: Add supported for ordered booting method using HSM
  RISC-V: Add SBI HSM extension definitions
  RISC-V: Export SBI error to linux error mapping function
  RISC-V: Add cpu_ops and modify default booting method
  RISC-V: Move relocate and few other functions out of __init
  RISC-V: Implement new SBI v0.2 extensions
  RISC-V: Introduce a new config for SBI v0.1
  RISC-V: Add SBI v0.2 extension definitions
  RISC-V: Add basic support for SBI v0.2
  RISC-V: Mark existing SBI as 0.1 SBI.
  riscv: Use macro definition instead of magic number
  riscv: Add support to dump the kernel page tables
  ...
2020-04-09 10:51:30 -07:00
Linus Torvalds
d18292dc07 ARM: driver updates
These are the usual updates for SoC specific device drivers and related
 subsystems that don't have their own top-level maintainers:
 
 - ARM SCMI/SCPI updates to allow pluggable transport layers
 
 - TEE subsystem cleanups
 
 - A new driver for the Amlogic secure power domain controller
 
 - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and
   TI OMAP2+ sysc drivers.
 
 - Qualcomm SoC driver updates, including a new library module for
   "protection domain" notifications
 
 - Lots of smaller bugfixes and cleanups in other drivers
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "These are the usual updates for SoC specific device drivers and
  related subsystems that don't have their own top-level maintainers:

   - ARM SCMI/SCPI updates to allow pluggable transport layers

   - TEE subsystem cleanups

   - A new driver for the Amlogic secure power domain controller

   - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU
     and TI OMAP2+ sysc drivers.

   - Qualcomm SoC driver updates, including a new library module for
     "protection domain" notifications

   - Lots of smaller bugfixes and cleanups in other drivers"

* tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits)
  soc: fsl: qe: fix sparse warnings for ucc_slow.c
  soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
  soc: fsl: qe: fix sparse warnings for ucc_fast.c
  soc: fsl: qe: fix sparse warnings for qe_ic.c
  soc: fsl: qe: fix sparse warnings for ucc.c
  soc: fsl: qe: fix sparse warning for qe_common.c
  soc: fsl: qe: fix sparse warnings for qe.c
  soc: qcom: Fix QCOM_APR dependencies
  soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
  soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
  firmware: imx: add COMPILE_TEST for IMX_SCU driver
  soc: imx: gpc: fix power up sequencing
  soc: imx: increase build coverage for imx8m soc driver
  soc: qcom: apr: Add avs/audio tracking functionality
  dt-bindings: soc: qcom: apr: Add protection domain bindings
  soc: qcom: Introduce Protection Domain Restart helpers
  devicetree: bindings: firmware: add ipq806x to qcom_scm
  memory: tegra: Correct debugfs clk rate-range on Tegra124
  memory: tegra: Correct debugfs clk rate-range on Tegra30
  memory: tegra: Correct debugfs clk rate-range on Tegra20
  ...
2020-04-03 15:05:35 -07:00
Linus Torvalds
0e8fb69f28 ARM: SoC updates
The code changes are mostly for 32-bit platforms and include:
 
 - Lots of updates for the Nvidia Tegra platform, including
   cpuidle, pmc, and dt-binding changes
 
 - Microchip at91 power management updates for the recently added
   sam9x60 SoC
 
 - Treewide setup_irq deprecation by afzal mohammed
 
 - STMicroelectronics stm32 gains earlycon support
 
 - Renesas platforms with Cortex-A9 can now use the global timer
 
 - Some TI OMAP2+ platforms gain cpuidle support
 
 - Various cleanups for the i.MX6 and Orion platforms, as well as
   Kconfig files across all platforms
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "The code changes are mostly for 32-bit platforms and include:

   - Lots of updates for the Nvidia Tegra platform, including cpuidle,
     pmc, and dt-binding changes

   - Microchip at91 power management updates for the recently added
     sam9x60 SoC

   - Treewide setup_irq deprecation by afzal mohammed

   - STMicroelectronics stm32 gains earlycon support

   - Renesas platforms with Cortex-A9 can now use the global timer

   - Some TI OMAP2+ platforms gain cpuidle support

   - Various cleanups for the i.MX6 and Orion platforms, as well as
     Kconfig files across all platforms"

* tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
  ARM: qcom: Add support for IPQ40xx
  ARM: mmp: replace setup_irq() by request_irq()
  ARM: cns3xxx: replace setup_irq() by request_irq()
  ARM: spear: replace setup_irq() by request_irq()
  ARM: ep93xx: Replace setup_irq() by request_irq()
  ARM: iop32x: replace setup_irq() by request_irq()
  arm: mach-dove: Mark dove_io_desc as __maybe_unused
  ARM: orion: replace setup_irq() by request_irq()
  ARM: debug: stm32: add UART early console support for STM32MP1
  ARM: debug: stm32: add UART early console support for STM32H7
  ARM: debug: stm32: add UART early console configuration for STM32F7
  ARM: debug: stm32: add UART early console configuration for STM32F4
  cpuidle: tegra: Disable CC6 state if LP2 unavailable
  cpuidle: tegra: Squash Tegra114 driver into the common driver
  cpuidle: tegra: Squash Tegra30 driver into the common driver
  cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
  ARM: tegra: cpuidle: Remove unnecessary memory barrier
  ARM: tegra: cpuidle: Make abort_flag atomic
  ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
  ARM: tegra: Make outer_disable() open-coded
  ...
2020-04-03 15:02:35 -07:00
Christoph Hellwig
c48c4a4c7e
riscv: Add Kendryte K210 SoC support
Add support for the Kendryte K210 RISC-V SoC. For now, this support
only provides a simple sysctl driver allowing to setup the CPU and
uart clock. This support is enabled through the new Kconfig option
SOC_KENDRYTE and defines the config option CONFIG_K210_SYSCTL
to enable the K210 SoC sysctl driver compilation.

The sysctl driver also registers an early SoC initialization function
allowing enabling the general purpose use of the 2MB of SRAM normally
reserved for the SoC AI engine. This initialization function is
automatically called before the dt early initialization using the flat
dt root node compatible property matching the value "kendryte,k210".

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
[Palmer: Add missing endmenu in Kconfig.socs]
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-04-03 10:49:52 -07:00
Arnd Bergmann
3a3052f1fc Merge tag 'soc-fsl-next-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.7

DPAA2 DPIO driver performance optimization
- Add and use QMAN multiple enqueue interface
- Use function pointer indirection to replace checks in hotpath

QUICC Engine drivers
- Fix sparse warnings and exposed endian issues

* tag 'soc-fsl-next-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: qe: fix sparse warnings for ucc_slow.c
  soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
  soc: fsl: qe: fix sparse warnings for ucc_fast.c
  soc: fsl: qe: fix sparse warnings for qe_ic.c
  soc: fsl: qe: fix sparse warnings for ucc.c
  soc: fsl: qe: fix sparse warning for qe_common.c
  soc: fsl: qe: fix sparse warnings for qe.c
  soc: fsl: dpio: fix dereference of pointer p before null check
  soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue
  soc: fsl: dpio: QMAN performance improvement with function pointer indirection
  soc: fsl: dpio: Adding QMAN multiple enqueue interface

Link: https://lore.kernel.org/r/20200326001257.22696-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-27 14:26:14 +01:00
Arnd Bergmann
fd91e03e5f pmic wrapper:
- add support for MT6779 SoC
 
 cmdq-helper:
 - set knows_txdone in mailbox client
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Merge tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/soc

pmic wrapper:
- add support for MT6779 SoC

cmdq-helper:
- set knows_txdone in mailbox client

* tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pwrap: add support for MT6359 PMIC
  soc: mediatek: pwrap: add pwrap driver for MT6779 SoCs
  dt-bindings: pwrap: mediatek: add pwrap support for MT6779
  soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helper

Link: https://lore.kernel.org/r/61165e91-f211-ad37-a81c-cbf3ff69fa1b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:03:31 +01:00
Arnd Bergmann
94af02c4bc soc/tegra: Changes for v5.7-rc1
These changes implement various clocks that are controlled by the PMC
 and add support for configuring the voltage level of some pins (needed
 for example to support high-speed modes on the SD/MMC interfaces).
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Merge tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc

soc/tegra: Changes for v5.7-rc1

These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).

* tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Cleanup whitespace usage
  soc/tegra: pmc: Add pins for Tegra194
  soc/tegra: Add support for 32 kHz blink clock
  soc/tegra: Add Tegra PMC clocks registration into PMC driver
  dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
  dt-bindings: phy: tegra-xusb: Add usb-role-switch
  dt-bindings: phy: tegra: Add Tegra194 support
  dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
  dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
  dt-bindings: tegra: Convert Tegra PMC bindings to YAML
  dt-bindings: clock: tegra: Add IDs for OSC clocks

Link: https://lore.kernel.org/r/20200313165848.2915133-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:56:55 +01:00
Arnd Bergmann
f40969fb56 PM changes for am335x and am437x for v5.7 merge window
A series of changes from Dave Gerlach to enable basic cpuidle support
 for am335x and am437x based on generic cpuidle-arm driver.
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Merge tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

PM changes for am335x and am437x for v5.7 merge window

A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.

* tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap2plus_defconfig: Add CONFIG_ARM_CPUIDLE
  soc: ti: pm33xx: Add base cpuidle support
  ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
  ARM: OMAP2+: pm33xx-core: Add cpuidle_ops for am335x/am437x
  dt-bindings: arm: cpu: Add TI AM335x and AM437x enable method

Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:52:42 +01:00
Arnd Bergmann
af839cb0b3 Renesas ARM SoC updates for v5.7
- Enable ARM global timer on Cortex-A9 MPCore SoCs,
   - A minor cleanup.
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Merge tag 'renesas-arm-soc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc

Renesas ARM SoC updates for v5.7

  - Enable ARM global timer on Cortex-A9 MPCore SoCs,
  - A minor cleanup.

* tag 'renesas-arm-soc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>
  ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

Link: https://lore.kernel.org/r/20200226110221.19288-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:49:02 +01:00
Marek Szyprowski
c8042d1e5c soc: samsung: chipid: Fix return value on non-Exynos platforms
Correct the probe return value to -ENODEV on non-Exynos platforms.

Link: https://lore.kernel.org/r/20200316175652.5604-4-krzk@kernel.org
Fixes: 02fb29882d ("soc: samsung: chipid: Drop "syscon" compatible requirement")
Cc: <stable@vger.kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 14:27:27 +01:00
Arnd Bergmann
8b45e9d9c0 NXP/FSL soc driver fixes for v5.6
DPAA2 DPIO
 - Fix a kernel hang caused by irq requested before creating dpio
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Merge tag 'soc-fsl-fix-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes

NXP/FSL soc driver fixes for v5.6

DPAA2 DPIO
- Fix a kernel hang caused by irq requested before creating dpio

* tag 'soc-fsl-fix-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpio: register dpio irq handlers after dpio create

Link: https://lore.kernel.org/r/20200312202525.16708-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 13:40:22 +01:00
Arnd Bergmann
90ae9ee792 i.MX drivers update for 5.7:
- Update SCU power domain driver to include PD ranges for audio, CM40
    I2C and INTMUX, also  enlarge PD range for mu_b.
  - Remove IMX_SC_RPC_SVC_ABORT from SCU API, as it was added by mistake.
  - Increase build test coverage for i.MX8M SoC and IMX_SCU driver.
  - Improve i.MX GPC power up sequencing to ensure that the reset is
    properly propagated through the peripheral devices in the power
    domain.
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Merge tag 'imx-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.7:

 - Update SCU power domain driver to include PD ranges for audio, CM40
   I2C and INTMUX, also  enlarge PD range for mu_b.
 - Remove IMX_SC_RPC_SVC_ABORT from SCU API, as it was added by mistake.
 - Increase build test coverage for i.MX8M SoC and IMX_SCU driver.
 - Improve i.MX GPC power up sequencing to ensure that the reset is
   properly propagated through the peripheral devices in the power
   domain.

* tag 'imx-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
  firmware: imx: add COMPILE_TEST for IMX_SCU driver
  soc: imx: gpc: fix power up sequencing
  soc: imx: increase build coverage for imx8m soc driver
  firmware: imx: scu-pd: add power domain for I2C and INTMUX in CM40 SS
  firmware: imx: Remove IMX_SC_RPC_SVC_ABORT
  firmware: imx: scu-pd: enlarge PD range for mu_b
  firmware: imx: scu-pd: Add missing audio PD ranges
  soc: imx: gpcv2: include linux/sizes.h

Link: https://lore.kernel.org/r/20200318051918.32579-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 13:36:09 +01:00
Arnd Bergmann
8f10e1ab53 Qualcomm driver updates for v5.7
This adds a new library for subscribing to notifications about
 protection domains being stated and stopped and the integration of this
 with the APR driver. It also contains fixes and cleanups for AOSS
 driver, socinfo and rpmh.
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Merge tag 'qcom-drivers-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.7

This adds a new library for subscribing to notifications about
protection domains being stated and stopped and the integration of this
with the APR driver. It also contains fixes and cleanups for AOSS
driver, socinfo and rpmh.

* tag 'qcom-drivers-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: Fix QCOM_APR dependencies
  soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
  soc: qcom: apr: Add avs/audio tracking functionality
  dt-bindings: soc: qcom: apr: Add protection domain bindings
  soc: qcom: Introduce Protection Domain Restart helpers
  devicetree: bindings: firmware: add ipq806x to qcom_scm
  soc: qcom: socinfo: Use seq_putc() if possible
  drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh
  soc: qcom: Do not depend on ARCH_QCOM for QMI helpers
  soc: qcom: aoss: Read back before triggering the IRQ
  soc: qcom: aoss: Use wake_up_all() instead of wake_up_interruptible_all()
  drivers: qcom: rpmh: remove rpmh_flush export
  drivers: qcom: rpmh: fix macro to accept NULL argument

Link: https://lore.kernel.org/r/20200318044236.GD470201@yoga
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 13:35:03 +01:00
Arnd Bergmann
993330e000 soc: drivers: Amlogic updates for v5.7
- Add secure power domain controller
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Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers

soc: drivers: Amlogic updates for v5.7
- Add secure power domain controller

* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  dt-bindings: power: Fix dt_binding_check error
  soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM
  soc: amlogic: Add support for Secure power domains controller
  dt-bindings: power: add Amlogic secure power domains bindings
  firmware: meson_sm: Add secure power domain support

Link: https://lore.kernel.org/r/7hpndcugoo.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 13:33:49 +01:00
Arnd Bergmann
1822d610c5 Renesas driver updates for v5.7
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-drivers-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.7

  - Miscellaneous fixes and improvements.

* tag 'renesas-drivers-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Remove ARCH_R8A7795
  soc: renesas: rcar-sysc: Use the correct style for SPDX License Identifier

Link: https://lore.kernel.org/r/20200226110221.19288-6-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 13:17:26 +01:00
Li Yang
461c3ac0dc soc: fsl: qe: fix sparse warnings for ucc_slow.c
Fixes the following sparse warnings, some of these endian issues are
real issues that need to be fixed.

drivers/soc/fsl/qe/ucc_slow.c:78:17: warning: incorrect type in assignment (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:78:17:    expected struct ucc_slow *us_regs
drivers/soc/fsl/qe/ucc_slow.c:78:17:    got struct ucc_slow [noderef] <asn:2> *us_regs
drivers/soc/fsl/qe/ucc_slow.c:81:18: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:81:18:    expected void const volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:81:18:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:90:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:90:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:90:9:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:99:17: warning: incorrect type in assignment (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:99:17:    expected struct ucc_slow *us_regs
drivers/soc/fsl/qe/ucc_slow.c:99:17:    got struct ucc_slow [noderef] <asn:2> *us_regs
drivers/soc/fsl/qe/ucc_slow.c:102:18: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:102:18:    expected void const volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:102:18:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:111:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:111:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:111:9:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:172:28: warning: Using plain integer as NULL pointer
drivers/soc/fsl/qe/ucc_slow.c:174:25: warning: cast removes address space '<asn:2>' of expression
drivers/soc/fsl/qe/ucc_slow.c:175:25: warning: cast removes address space '<asn:2>' of expression
drivers/soc/fsl/qe/ucc_slow.c:194:23: warning: incorrect type in assignment (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:194:23:    expected struct ucc_slow_pram *us_pram
drivers/soc/fsl/qe/ucc_slow.c:194:23:    got void [noderef] <asn:2> *
drivers/soc/fsl/qe/ucc_slow.c:204:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:204:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:204:9:    got restricted __be16 *
drivers/soc/fsl/qe/ucc_slow.c:229:41: warning: incorrect type in assignment (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:229:41:    expected struct qe_bd *tx_bd
drivers/soc/fsl/qe/ucc_slow.c:229:41:    got void [noderef] <asn:2> *
drivers/soc/fsl/qe/ucc_slow.c:232:17: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:232:17:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:232:17:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:234:17: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:234:17:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:234:17:    got unsigned int [usertype] *
drivers/soc/fsl/qe/ucc_slow.c:238:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:238:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:238:9:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:239:9: warning: cast from restricted __be32
drivers/soc/fsl/qe/ucc_slow.c:239:9: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/ucc_slow.c:239:9:    expected unsigned int [usertype] val
drivers/soc/fsl/qe/ucc_slow.c:239:9:    got restricted __be32 [usertype]
drivers/soc/fsl/qe/ucc_slow.c:239:9: warning: cast from restricted __be32
drivers/soc/fsl/qe/ucc_slow.c:239:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:239:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:239:9:    got unsigned int [usertype] *
drivers/soc/fsl/qe/ucc_slow.c:242:26: warning: incorrect type in assignment (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:242:26:    expected struct qe_bd *rx_bd
drivers/soc/fsl/qe/ucc_slow.c:242:26:    got void [noderef] <asn:2> *
drivers/soc/fsl/qe/ucc_slow.c:245:17: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:245:17:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:245:17:    got unsigned int [usertype] *
drivers/soc/fsl/qe/ucc_slow.c:247:17: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:247:17:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:247:17:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:251:9: warning: cast from restricted __be32
drivers/soc/fsl/qe/ucc_slow.c:251:9: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/ucc_slow.c:251:9:    expected unsigned int [usertype] val
drivers/soc/fsl/qe/ucc_slow.c:251:9:    got restricted __be32 [usertype]
drivers/soc/fsl/qe/ucc_slow.c:251:9: warning: cast from restricted __be32
drivers/soc/fsl/qe/ucc_slow.c:251:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:251:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:251:9:    got unsigned int [usertype] *
drivers/soc/fsl/qe/ucc_slow.c:252:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:252:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:252:9:    got restricted __be32 *
drivers/soc/fsl/qe/ucc_slow.c:276:39: warning: mixing different enum types:
drivers/soc/fsl/qe/ucc_slow.c:276:39:    unsigned int enum ucc_slow_tx_oversampling_rate
drivers/soc/fsl/qe/ucc_slow.c:276:39:    unsigned int enum ucc_slow_rx_oversampling_rate
drivers/soc/fsl/qe/ucc_slow.c:296:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:296:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:296:9:    got restricted __be16 *
drivers/soc/fsl/qe/ucc_slow.c:297:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc_slow.c:297:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc_slow.c:297:9:    got restricted __be16 *

Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-03-24 19:09:40 -05:00
Li Yang
ae1f68652c soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
Not necessary to set to 0 for the kzalloc'ed area so remove these
assignements.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-03-24 19:04:18 -05:00
Li Yang
45e044c7dc soc: fsl: qe: fix sparse warnings for qe_ic.c
Fixes the following sparse warnings:

drivers/soc/fsl/qe/qe_ic.c:253:32: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:253:32:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:253:32:    got unsigned int [noderef] [usertype] <asn:2> *regs
drivers/soc/fsl/qe/qe_ic.c:254:26: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:254:26:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:254:26:    got unsigned int [noderef] [usertype] <asn:2> *regs
drivers/soc/fsl/qe/qe_ic.c:269:32: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:269:32:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:269:32:    got unsigned int [noderef] [usertype] <asn:2> *regs
drivers/soc/fsl/qe/qe_ic.c:270:26: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:270:26:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:270:26:    got unsigned int [noderef] [usertype] <asn:2> *regs
drivers/soc/fsl/qe/qe_ic.c:341:31: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:341:31:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:341:31:    got unsigned int [noderef] [usertype] <asn:2> *regs
drivers/soc/fsl/qe/qe_ic.c:357:31: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:357:31:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:357:31:    got unsigned int [noderef] [usertype] <asn:2> *regs
drivers/soc/fsl/qe/qe_ic.c:450:26: warning: incorrect type in argument 1 (different base types)
drivers/soc/fsl/qe/qe_ic.c:450:26:    expected restricted __be32 [noderef] [usertype] <asn:2> *base
drivers/soc/fsl/qe/qe_ic.c:450:26:    got unsigned int [noderef] [usertype] <asn:2> *regs

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
2020-03-24 19:02:23 -05:00
Li Yang
de66e4d87d soc: fsl: qe: fix sparse warnings for ucc.c
Fixes the following sparse warnings:

drivers/soc/fsl/qe/ucc.c:637:20: warning: incorrect type in assignment (different address spaces)
drivers/soc/fsl/qe/ucc.c:637:20:    expected struct qe_mux *qe_mux_reg
drivers/soc/fsl/qe/ucc.c:637:20:    got struct qe_mux [noderef] <asn:2> *
drivers/soc/fsl/qe/ucc.c:652:9: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/fsl/qe/ucc.c:652:9:    expected void const volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc.c:652:9:    got restricted __be32 *
drivers/soc/fsl/qe/ucc.c:652:9: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/fsl/qe/ucc.c:652:9:    expected void volatile [noderef] <asn:2> *addr
drivers/soc/fsl/qe/ucc.c:652:9:    got restricted __be32 *

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
2020-03-24 19:02:23 -05:00
Li Yang
41ed69bf6c soc: fsl: qe: fix sparse warning for qe_common.c
Fixes the following sparse warning:

drivers/soc/fsl/qe/qe_common.c:75:48: warning: incorrect type in argument 2 (different base types)
drivers/soc/fsl/qe/qe_common.c:75:48:    expected restricted __be32 const [usertype] *addr
drivers/soc/fsl/qe/qe_common.c:75:48:    got unsigned int *

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
2020-03-24 19:02:22 -05:00
Li Yang
288014358e soc: fsl: qe: fix sparse warnings for qe.c
Fixes the following sparse warnings:
drivers/soc/fsl/qe/qe.c:426:9: warning: cast to restricted __be32
drivers/soc/fsl/qe/qe.c:528:41: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/qe.c:528:41:    expected unsigned long long static [addressable] [toplevel] [usertype] extended_modes
drivers/soc/fsl/qe/qe.c:528:41:    got restricted __be64 const [usertype] extended_modes

Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-03-24 19:02:22 -05:00
Bjorn Andersson
de722e4106 soc: qcom: Fix QCOM_APR dependencies
QCOM_APR selects QCOM_PDR_HELPERS, which in turn selects
QCOM_QMI_HELPERS, which depends on NET. So ensure that APR's
dependencies are met by making it depend on NET as well.

Fixes: 8347356626 ("soc: qcom: apr: Add avs/audio tracking functionality")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-16 15:07:19 -07:00
Nathan Chancellor
e69b3bede1 soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
Clang warns:

../drivers/soc/qcom/pdr_interface.c:316:2: warning: variable 'found' is
used uninitialized whenever 'for' loop exits because its condition is
false [-Wsometimes-uninitialized]
        list_for_each_entry(pds, &pdr->lookups, node) {
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/linux/list.h:624:7: note: expanded from macro
'list_for_each_entry'
             &pos->member != (head);
             ^~~~~~~~~~~~~~~~~~~~~~
../drivers/soc/qcom/pdr_interface.c:325:7: note: uninitialized use
occurs here
        if (!found)
             ^~~~~
../drivers/soc/qcom/pdr_interface.c:316:2: note: remove the condition if
it is always true
        list_for_each_entry(pds, &pdr->lookups, node) {
        ^
../include/linux/list.h:624:7: note: expanded from macro
'list_for_each_entry'
             &pos->member != (head);
             ^
../drivers/soc/qcom/pdr_interface.c:309:12: note: initialize the
variable 'found' to silence this warning
        bool found;
                  ^
                   = 0
1 warning generated.

Initialize found to false to fix this warning.

Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Link: https://github.com/ClangBuiltLinux/linux/issues/933
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Link: https://lore.kernel.org/r/20200316204855.15611-1-natechancellor@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-16 14:56:57 -07:00
Peng Fan
2a52651292 soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
With COMPILE_TEST, there will be build error, because IMX_SCU
might be set to n, so drop COMPILE_TEST.

Suggested-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 11:44:40 +08:00
Lucas Stach
e0ea2d11f8 soc: imx: gpc: fix power up sequencing
Currently we wait only until the PGC inverts the isolation setting
before disabling the peripheral clocks. This doesn't ensure that the
reset is properly propagated through the peripheral devices in the
power domain.

Wait until the PGC signals that the power up request is done and
wait a bit for resets to propagate before disabling the clocks.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 11:39:02 +08:00
Peng Fan
fc40200ebf soc: imx: increase build coverage for imx8m soc driver
The soc-imx8.c driver is actually for i.MX8M family, so rename it
to soc-imx8m.c.

Use CONFIG_SOC_IMX8M as build gate, not CONFIG_ARCH_MXC, to control
whether build this driver, also make it possible for compile test.

Default set it to y for ARCH_MXC && ARM64

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 11:39:02 +08:00
Sibi Sankar
8347356626 soc: qcom: apr: Add avs/audio tracking functionality
Use PDR helper functions to track the protection domains that the apr
services are dependent upon on SDM845 SoC, specifically the "avs/audio"
service running on ADSP Q6.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200312120842.21991-4-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:38:50 -07:00
Sibi Sankar
fbe639b44a soc: qcom: Introduce Protection Domain Restart helpers
Qualcomm SoCs (starting with MSM8998) allow for multiple protection domains
to run on the same Q6 sub-system. This allows for services like ATH10K WLAN
FW to have their own separate address space and crash/recover without
disrupting the modem and other PDs running on the same sub-system. The PDR
helpers introduces an abstraction that allows for tracking/controlling the
life cycle of protection domains running on various Q6 sub-systems.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200312120842.21991-2-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:38:42 -07:00
Thierry Reding
4825f5354e soc/tegra: pmc: Cleanup whitespace usage
Avoid using a mixture of tabs and spaces within tables to make them
easier to read and more consistently formatted.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 10:53:10 +01:00
Venkat Reddy Talla
04fac2412b soc/tegra: pmc: Add pins for Tegra194
Extend the Tegra194 IO pad table with additional information such as pin
names and 1.8/3.3 V settings to allow a table of voltage control pins to
generated from it. This is similar to what's done for older chips and is
needed to support high-speed modes for SDHCI where switching the pins to
1.8V or 3.3V is necessary.

Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 10:53:10 +01:00
Sowjanya Komatineni
03e917b2a0 soc/tegra: Add support for 32 kHz blink clock
Tegra PMC has blink control to output 32 kHz clock out to Tegra blink
pin. Blink pad DPD state and enable controls are part of Tegra PMC
register space.

Currently Tegra clock driver registers blink control by passing PMC
address and register offset to clk_register_gate which performs direct
PMC access during clk_ops and with this when PMC is in secure mode, any
access from non-secure world does not go through.

This patch adds blink control registration to the Tegra PMC driver using
PMC specific clock gate operations that use tegra_pmc_readl() and
tegra_pmc_writel() to support both secure mode and non-secure
mode PMC register access.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 10:53:06 +01:00
Sowjanya Komatineni
bd9638ed8e soc/tegra: Add Tegra PMC clocks registration into PMC driver
Tegra PMC has clk_out_1, clk_out_2, and clk_out_3 clocks and currently
these PMC clocks are registered by Tegra clock driver with each clock as
separate mux and gate clocks using clk_register_mux and clk_register_gate
by passing PMC base address and register offsets and PMC programming for
these clocks happens through direct PMC access by the clock driver.

With this, when PMC is in secure mode any direct PMC access from the
non-secure world does not go through and these clocks will not be
functional.

This patch adds these PMC clocks registration to pmc driver with PMC as
a clock provider and registers each clock as single clock.

clk_ops callback implementations for these clocks uses tegra_pmc_readl and
tegra_pmc_writel which supports PMC programming in both secure mode and
non-secure mode.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13 10:52:53 +01:00
Grigore Popescu
fe8fe7723a soc: fsl: dpio: register dpio irq handlers after dpio create
The dpio irqs must be registered when you can actually
receive interrupts, ie when the dpios are created.
Kernel goes through NULL pointer dereference errors
followed by kernel panic [1] because the dpio irqs are
enabled before the dpio is created.

[1]
Unable to handle kernel NULL pointer dereference at virtual address 0040
fsl_mc_dpio dpio.14: probed
fsl_mc_dpio dpio.13: Adding to iommu group 11
  ISV = 0, ISS = 0x00000004
Unable to handle kernel NULL pointer dereference at virtual address 0040
Mem abort info:
  ESR = 0x96000004
  EC = 0x25: DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000004
  CM = 0, WnR = 0
[0000000000000040] user address but active_mm is swapper
Internal error: Oops: 96000004 [] PREEMPT SMP
Modules linked in:
CPU: 2 PID: 151 Comm: kworker/2:1 Not tainted 5.6.0-rc4-next-20200304 
Hardware name: NXP Layerscape LX2160ARDB (DT)
Workqueue: events deferred_probe_work_func
pstate: 00000085 (nzcv daIf -PAN -UAO)
pc : dpaa2_io_irq+0x18/0xe0
lr : dpio_irq_handler+0x1c/0x28
sp : ffff800010013e20
x29: ffff800010013e20 x28: ffff0026d9b4c140
x27: ffffa1d38a142018 x26: ffff0026d2953400
x25: ffffa1d38a142018 x24: ffffa1d38a7ba1d8
x23: ffff800010013f24 x22: 0000000000000000
x21: 0000000000000072 x20: ffff0026d2953400
x19: ffff0026d2a68b80 x18: 0000000000000001
x17: 000000002fb37f3d x16: 0000000035eafadd
x15: ffff0026d9b4c5b8 x14: ffffffffffffffff
x13: ff00000000000000 x12: 0000000000000038
x11: 0101010101010101 x10: 0000000000000040
x9 : ffffa1d388db11e4 x8 : ffffa1d38a7e40f0
x7 : ffff0026da414f38 x6 : 0000000000000000
x5 : ffff0026da414d80 x4 : ffff5e5353d0c000
x3 : ffff800010013f60 x2 : ffffa1d388db11c8
x1 : ffff0026d2a67c00 x0 : 0000000000000000
Call trace:
 dpaa2_io_irq+0x18/0xe0
 dpio_irq_handler+0x1c/0x28
 __handle_irq_event_percpu+0x78/0x2c0
 handle_irq_event_percpu+0x38/0x90
 handle_irq_event+0x4c/0xd0
 handle_fasteoi_irq+0xbc/0x168
 generic_handle_irq+0x2c/0x40
 __handle_domain_irq+0x68/0xc0
 gic_handle_irq+0x64/0x150
 el1_irq+0xb8/0x180
 _raw_spin_unlock_irqrestore+0x14/0x48
 irq_set_affinity_hint+0x6c/0xa0
 dpaa2_dpio_probe+0x2a4/0x518
 fsl_mc_driver_probe+0x28/0x70
 really_probe+0xdc/0x320
 driver_probe_device+0x5c/0xf0
 __device_attach_driver+0x88/0xc0
 bus_for_each_drv+0x7c/0xc8
 __device_attach+0xe4/0x140
 device_initial_probe+0x18/0x20
 bus_probe_device+0x98/0xa0
 device_add+0x41c/0x758
 fsl_mc_device_add+0x184/0x530
 dprc_scan_objects+0x280/0x370
 dprc_probe+0x124/0x3b0
 fsl_mc_driver_probe+0x28/0x70
 really_probe+0xdc/0x320
 driver_probe_device+0x5c/0xf0
 __device_attach_driver+0x88/0xc0
 bus_for_each_drv+0x7c/0xc8
 __device_attach+0xe4/0x140
 device_initial_probe+0x18/0x20
 bus_probe_device+0x98/0xa0
 deferred_probe_work_func+0x74/0xa8
 process_one_work+0x1c8/0x470
 worker_thread+0x1f8/0x428
 kthread+0x124/0x128
 ret_from_fork+0x10/0x18
Code: a9bc7bfd 910003fd a9025bf5 a90363f7 (f9402015)
---[ end trace 38298e1a29e7a570 ]---
Kernel panic - not syncing: Fatal exception in interrupt
SMP: stopping secondary CPUs
Mem abort info:
  ESR = 0x96000004
  CM = 0, WnR = 0
  EC = 0x25: DABT (current EL), IL = 32 bits
[0000000000000040] user address but active_mm is swapper
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000004
  CM = 0, WnR = 0
[0000000000000040] user address but active_mm is swapper
SMP: failed to stop secondary CPUs 0-2
Kernel Offset: 0x21d378600000 from 0xffff800010000000
PHYS_OFFSET: 0xffffe92180000000
CPU features: 0x10002,21806008
Memory Limit: none
---[ end Kernel panic - not syncing: Fatal exception in interrupt ]---

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-03-10 15:28:47 -05:00
Stephen Boyd
cc41a5273d soc: qcom: socinfo: Use seq_putc() if possible
This is a single character that we're printing out. Use seq_putc() for
that to simplify the code.

Cc: Vaishali Thakkar <vaishali.thakkar@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200309185123.65265-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-09 12:01:34 -07:00
Stephen Boyd
efde2659b0 drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh
This tracepoint is hit now that we call into the rpmh code from the cpu
idle path. Let's move this to be an rcuidle tracepoint so that we avoid
the RCU idle splat below

 =============================
 WARNING: suspicious RCU usage
 5.4.10  Tainted: G S
 -----------------------------
 drivers/soc/qcom/trace-rpmh.h:72 suspicious rcu_dereference_check() usage!

 other info that might help us debug this:

 RCU used illegally from idle CPU!
 rcu_scheduler_active = 2, debug_locks = 1
 RCU used illegally from extended quiescent state!
 5 locks held by swapper/2/0:
  : ffffff81745d6ee8 (&(&genpd->slock)->rlock){+.+.}, at: genpd_lock_spin+0x1c/0x2c
  : ffffff81745da6e8 (&(&genpd->slock)->rlock/1){....}, at: genpd_lock_nested_spin+0x24/0x34
  : ffffff8174f2ca20 (&(&genpd->slock)->rlock/2){....}, at: genpd_lock_nested_spin+0x24/0x34
  : ffffff8174f2c300 (&(&drv->client.cache_lock)->rlock){....}, at: rpmh_flush+0x48/0x24c
  : ffffff8174f2c150 (&(&tcs->lock)->rlock){+.+.}, at: rpmh_rsc_write_ctrl_data+0x74/0x270

 stack backtrace:
 CPU: 2 PID: 0 Comm: swapper/2 Tainted: G S                5.4.10 
 Call trace:
  dump_backtrace+0x0/0x174
  show_stack+0x20/0x2c
  dump_stack+0xc8/0x124
  lockdep_rcu_suspicious+0xe4/0x104
  __tcs_buffer_write+0x230/0x2d0
  rpmh_rsc_write_ctrl_data+0x210/0x270
  rpmh_flush+0x84/0x24c
  rpmh_domain_power_off+0x78/0x98
  _genpd_power_off+0x40/0xc0
  genpd_power_off+0x168/0x208
  genpd_power_off+0x1e0/0x208
  genpd_power_off+0x1e0/0x208
  genpd_runtime_suspend+0x1ac/0x220
  __rpm_callback+0x70/0xfc
  rpm_callback+0x34/0x8c
  rpm_suspend+0x218/0x4a4
  __pm_runtime_suspend+0x88/0xac
  psci_enter_domain_idle_state+0x3c/0xb4
  cpuidle_enter_state+0xb8/0x284
  cpuidle_enter+0x38/0x4c
  call_cpuidle+0x3c/0x68
  do_idle+0x194/0x260
  cpu_startup_entry+0x24/0x28
  secondary_start_kernel+0x150/0x15c

Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Fixes: a65a397f24 ("cpuidle: psci: Add support for PM domains by using genpd")
Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200115013751.249588-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-09 11:52:21 -07:00
Manivannan Sadhasivam
226bbb937e soc: qcom: Do not depend on ARCH_QCOM for QMI helpers
QMI helpers are not always used by Qualcomm platforms. One of the
exceptions is the external modems available in near future.

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200220095854.4804-17-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-03 22:37:38 -08:00
Jianxin Pan
9ef7a79206 soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM
When MESON_SECURE_PM_DOMAINS & !MESON_SM, there will be compile failure:
.../meson-secure-pwrc.o: In function `meson_secure_pwrc_on':
.../meson-secure-pwrc.c:76: undefined reference to `meson_sm_call'

Fix this by adding depends on MESON_SM for MESON_SECURE_PM_DOMAINS.

Fixes: b3dde5013e ("soc: amlogic: Add support for Secure power domains controller")
Reported-by: Stephen Rothwell<sfr@canb.auug.org.au>
Reported-by: patchwork-bot+linux-amlogic<patchwork-bot+linux-amlogic@kernel.org>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Stephen Rothwell<sfr@canb.auug.org.au>
Link: https://lore.kernel.org/r/1581955933-69832-1-git-send-email-jianxin.pan@amlogic.com
2020-02-29 08:53:43 -08:00
Dave Gerlach
6afaff1c66 soc: ti: pm33xx: Add base cpuidle support
Some cpuidle C-states supported on am335x and am437x, like C1 on am335x,
require the use of the wkup_m3_ipc driver, and all C-states beyond C0 on
both platforms require the use of the SRAM sleep code.

Pass am33xx_do_sram_idle as the idle function to the platform pm core to
be used by the cpuidle-arm driver when entering cpuidle states.
am33xx_do_sram_idle will detect when the wkup_m3 is needed and ping it
if necessary before calling the final cpu_suspend op which will execute
the SRAM code to put the cpu into idle.

Finally, use the begin_suspend and finish_suspend platform ops to be
called at the beginning and end of suspend path to allow use of
cpu_idle_poll_ctrl.

This prevents races between cpuidle and suspend paths trying to
communicate with the wkup_m3, as during suspend we only want it
configured for entry to suspend.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:27:28 -08:00
Dave Gerlach
65880ab160 ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
In order for am335x and am437x to properly enter deeper c-states in
cpuidle they must always call into the sleep33/43xx suspend code and
also sometimes invoke the wkup_m3_ipc driver. These are both controlled
by the pm33xx module so we must provide a method for the platform code
to call back into the module when it is available as the core cpuidle
ops that are invoked by the cpuidle-arm driver must remain as built in.

Extend the init platform op to take an idle function as an argument so
that we can use this to call into the pm33xx module for c-states that
need it. Also add a deinit op so we can unregister this idle function
from the PM core when the pm33xx module gets unloaded.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27 09:27:27 -08:00
Olof Johansson
f1e4920fe3 i.MX fixes for 5.6:
- Build v7_cpu_resume() unconditionally to fix system hang in case that
    suspend is disabled but cpuidle support is enabled.
  - Drop unexisting Ethernet PHY device from imx8qxp-mek board.
  - Fix SRAM compatible strings on imx6dl-colibri-eval-v3 board.
  - Fix imx-scu driver to make sure that all messages words are written
    sequentially.
  - A series from Leonard Crestez to fix i.MX SC API users, having all
    messages aligned on 4 bytes.
  - Fix eMMC supply for phycore-som board.
  - Drop bogus frequency setting from imx7-colibri SD/MMC device, so that
    HS200 mode starts working and delivers better performance.
  - Fix opp-supported-hw for i.MX7D to get consumer and industrial parts
    work with correct frequency settings.
  - Restore MDIO compatible to the correct one for LS1021A SoC.
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Merge tag 'imx-fixes-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.6:

 - Build v7_cpu_resume() unconditionally to fix system hang in case that
   suspend is disabled but cpuidle support is enabled.
 - Drop unexisting Ethernet PHY device from imx8qxp-mek board.
 - Fix SRAM compatible strings on imx6dl-colibri-eval-v3 board.
 - Fix imx-scu driver to make sure that all messages words are written
   sequentially.
 - A series from Leonard Crestez to fix i.MX SC API users, having all
   messages aligned on 4 bytes.
 - Fix eMMC supply for phycore-som board.
 - Drop bogus frequency setting from imx7-colibri SD/MMC device, so that
   HS200 mode starts working and delivers better performance.
 - Fix opp-supported-hw for i.MX7D to get consumer and industrial parts
   work with correct frequency settings.
 - Restore MDIO compatible to the correct one for LS1021A SoC.

* tag 'imx-fixes-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx-scu: Align imx sc msg structs to 4
  firmware: imx: Align imx_sc_msg_req_cpu_start to 4
  firmware: imx: scu-pd: Align imx sc msg structs to 4
  firmware: imx: misc: Align imx sc msg structs to 4
  firmware: imx: scu: Ensure sequential TX
  ARM: dts: imx7-colibri: Fix frequency for sd/mmc
  arm64: dts: imx8qxp-mek: Remove unexisting Ethernet PHY
  ARM: dts: imx6dl-colibri-eval-v3: fix sram compatible properties
  ARM: dts: ls1021a: Restore MDIO compatible to gianfar
  ARM: dts: imx7d: fix opp-supported-hw
  ARM: imx: build v7_cpu_resume() unconditionally
  ARM: dts: imx6: phycore-som: fix emmc supply

Link: https://lore.kernel.org/r/20200224120334.GH27688@dragon
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-02-24 09:57:05 -08:00
Leonard Crestez
f10e58a5d2 soc: imx-scu: Align imx sc msg structs to 4
The imx SC api strongly assumes that messages are composed out of
4-bytes words but some of our message structs have odd sizeofs.

This produces many oopses with CONFIG_KASAN=y.

Fix by marking with __aligned(4).

Fixes: 73feb4d0f8 ("soc: imx-scu: Add SoC UID(unique identifier) support")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 15:29:43 +08:00
Colin Ian King
6a7f10c795 soc: fsl: dpio: fix dereference of pointer p before null check
Pointer p is currently being dereferenced before it is null
checked on a memory allocation failure check. Fix this by
checking if p is null before dereferencing it.

Addresses-Coverity: ("Dereference before null check")
Fixes: 3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-02-21 17:17:42 -06:00
Geert Uytterhoeven
4ff2711228 soc: renesas: Remove ARCH_R8A7795
Replace the final user of CONFIG_ARCH_R8A7795 by CONFIG_ARCH_R8A77950 ||
CONFIG_ARCH_R8A77951, and remove the now unused CONFIG_ARCH_R8A7795
symbol definition.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112449.5723-1-geert+renesas@glider.be
2020-02-21 14:39:58 +01:00
Youri Querry
3b2abda7d2 soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue
This change of algorithm will enable faster bulk enqueue.
This will greatly benefit XDP bulk enqueue.

Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Acked-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-02-19 18:06:34 -06:00
Youri Querry
b46fe745e4 soc: fsl: dpio: QMAN performance improvement with function pointer indirection
We are making the access decision in the initialization and
setting the function pointers accordingly.

Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Acked-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-02-19 18:06:16 -06:00
Youri Querry
9d98809711 soc: fsl: dpio: Adding QMAN multiple enqueue interface
Update of QMAN the interface to enqueue frame. We now support multiple
enqueue (qbman_swp_enqueue_multiple) and multiple enqueue with
a table of descriptor (qbman_swp_enqueue_multiple_desc).

Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Acked-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-02-19 18:06:16 -06:00
Nishad Kamdar
107539fb7f soc: renesas: rcar-sysc: Use the correct style for SPDX License Identifier
This patch corrects the SPDX License Identifier style in
header file related to Renesas Soc driver support.
It assigns explicit block comment to the SPDX License Identifier.

Changes made by using a script provided by Joe Perches here:
https://lkml.org/lkml/2019/2/7/46.

Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Link: https://lore.kernel.org/r/20200118124856.GA3421@nishad
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-02-17 11:53:25 +01:00
Argus Lin
2faccb56ee soc: mediatek: pwrap: add support for MT6359 PMIC
MT6359 is a new power management IC and it is used for
MT6779 SoCs. To define mt6359_regs for pmic register mapping
and pmic_mt6359 for accessing register.

Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-02-17 11:07:25 +01:00
Argus Lin
adc4e8fcb2 soc: mediatek: pwrap: add pwrap driver for MT6779 SoCs
MT6779 is a highly integrated SoCs, it uses PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.

Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-02-17 11:07:24 +01:00
Jianxin Pan
b3dde5013e soc: amlogic: Add support for Secure power domains controller
Add support for the Amlogic Secure Power controller. In A1/C1 series, power
control registers are in secure domain, and should be accessed by smc.

Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/1579087831-94965-4-git-send-email-jianxin.pan@amlogic.com
2020-02-14 11:37:34 -08:00