Commit Graph

3163 Commits

Author SHA1 Message Date
Tom St Denis
5e78835abd drm/amd/amdgpu: Port gfx9 driver over to new read/write macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:38:00 -04:00
Tom St Denis
b1bb8c0118 drm/amd/amdgpu: Introduce new read/write macros for SOC15
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:59 -04:00
Huang Rui
93ea9b9f7c drm/amdgpu: add hw_start and non-psp firmware loading into resume
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:59 -04:00
Huang Rui
be70bbda3f drm/amdgpu: split psp ring init function
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:58 -04:00
Huang Rui
f5cfef98f7 drm/amdgpu: split psp asd function
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:58 -04:00
Huang Rui
2b0c3aee21 drm/amdgpu: use private memory to store psp firmware data
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:57 -04:00
Huang Rui
53a5cf57d8 drm/amdgpu: add psp firmware private memory
Needed for proper suspend support.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:56 -04:00
Huang Rui
6f2b1fcccb drm/amdgpu: split psp tmr init function
Rework in order to properly support suspend.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:56 -04:00
Rex Zhu
6524e494a8 drm/amd/powerplay: align with VBIOS to support new AVFS structure
Align the driver with the latest vbios structures.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-28 16:37:55 -04:00
Dave Airlie
df45eaca51 Merge tag 'drm-misc-next-2017-04-07' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Last drm-misc-next pull req for 4.12

Core changes:
 - fb_helper checkpatch cleanup and simplified _add_one_connector() (Thierry)
 - drm_ioctl and drm_sysfs improved/gained documentation (Daniel)
 - [ABI] Repurpose reserved field in drm_event_vblank for crtc_id (Ander)
 - Plumb acquire ctx through legacy paths to avoid lock_all and legacy_backoff
   (Daniel)
 - Add connector_atomic_check to check conn constraints on modeset (Maarten)
 - Add drm_of_find_panel_or_bridge to remove boilerplate in drivers (Rob)

Driver changes:
 - meson moved to drm-misc (Neil)
 - Added support for Amlogic GX SoCs in dw-hdmi (Neil)
 - Rockchip unbind actually cleans up the things bind initializes (Jeffy)
 - A couple misc fixes in virtio, dw-hdmi

NOTE: this also includes a backmerge of drm-next as well rc5 (we needed vmwgfx
      as well as the new synopsys media formats)

* tag 'drm-misc-next-2017-04-07' of git://anongit.freedesktop.org/git/drm-misc: (77 commits)
  Revert "drm: Don't allow interruptions when opening debugfs/crc"
  drm: Only take cursor locks when the cursor plane exists
  drm/vmwgfx: Fix fbdev emulation using legacy functions
  drm/rockchip: Shutdown all crtcs when unbinding drm
  drm/rockchip: Reorder drm bind/unbind sequence
  drm/rockchip: analogix_dp: Disable clock when unbinding
  drm/rockchip: vop: Unprepare clocks when unbinding
  drm/rockchip: vop: Enable pm domain before vop_initial
  drm/rockchip: cdn-dp: Don't unregister audio dev when unbinding
  drm/rockchip: cdn-dp: Don't try to release firmware when not loaded
  drm: bridge: analogix: Destroy connector & encoder when unbinding
  drm: bridge: analogix: Disable clock when unbinding
  drm: bridge: analogix: Unregister dp aux when unbinding
  drm: bridge: analogix: Detach panel when unbinding analogix dp
  drm: Don't allow interruptions when opening debugfs/crc
  drm/virtio: don't leak bo on drm_gem_object_init failure
  drm: bridge: dw-hdmi: fix input format/encoding from plat_data
  drm: omap: use common OF graph helpers
  drm: convert drivers to use drm_of_find_panel_or_bridge
  drm: convert drivers to use of_graph_get_remote_node
  ...
2017-04-11 07:41:10 +10:00
Chunming Zhou
32df87dff0 drm/amdgpu: fix fence memory leak in wait_all_fence V2
V2: remove **array method, directly fence_put after fence wait.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <chrstian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 15:15:45 -04:00
Christian König
ecdba5db88 drm/amdgpu: fix "fix 64bit division"
The offset must be 64bit and add back the accidential dropped line.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 15:15:44 -04:00
Rex Zhu
8250880ed8 drm/amd/powerplay: add fan controller table v11 support.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 15:15:44 -04:00
Rex Zhu
1e1eb6a893 drm/amd/powerplay: port newest process pptable code for vega10.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 15:15:43 -04:00
Junwei Zhang
bab4fee703 drm/amdgpu: set vm size and block size by individual gmc by default (v3)
By default, the value is set by individual gmc.
if a specific value is input, it overrides the global value for all

v2: create helper funcs
v3: update gmc9 APU's num_level athough it may be updated in the future.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 15:15:43 -04:00
Mario Kleiner
e190ed1ea7 drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations.
At dot clocks > approx. 250 Mhz, some of these calcs will overflow and
cause miscalculation of latency watermarks, and for some overflows also
divide-by-zero driver crash ("divide error: 0000 [] PREEMPT SMP" in
"dce_v10_0_latency_watermark+0x12d/0x190").

This zero-divide happened, e.g., on AMD Tonga Pro under DCE-10,
on a Displayport panel when trying to set a video mode of 2560x1440
at 165 Hz vrefresh with a dot clock of 635.540 Mhz.

Refine calculations to avoid the overflows.

Tested for DCE-10 with R9 380 Tonga + ASUS ROG PG279 panel.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-04-07 12:20:42 -04:00
Mario Kleiner
d63c277dc6 drm/amdgpu: Make display watermark calculations more accurate
Avoid big roundoff errors in scanline/hactive durations for
high pixel clocks, especially for >= 500 Mhz, and thereby
program more accurate display fifo watermarks.

Implemented here for DCE 6,8,10,11.
Successfully tested on DCE 10 with AMD R9 380 Tonga.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-04-07 12:20:42 -04:00
Christopher James Halse Rogers
803d89ade4 drm/amdgpu: Refuse to pin or change acceptable domains of prime BOs to VRAM. (v2)
Migration to VRAM will break the sharing, resulting in rendering on the exporting GPU never becoming
visible on the importing GPU.

v2: Don't pin BOs to GTT. Instead, refuse to migrate them out of GTT.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 12:20:39 -04:00
Christopher James Halse Rogers
1769152ac6 drm/amdgpu: Fail fb creation from imported dma-bufs. (v2)
Any use of the framebuffer will migrate it to VRAM, which is not sensible for
an imported dma-buf.

v2: Use DRM_DEBUG_KMS to prevent userspace accidentally spamming dmesg.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
CC: amd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-07 12:20:39 -04:00
Dave Airlie
0168778115 Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more things for 4.12:
- ttm and amdgpu support for non-contiguous vram CPU mappings
- lots of bug fixes and cleanups for vega10
- misc bug fixes and code cleanups

[airlied: fix do_div error on 32-bit arm, not sure it's 100% correct]

* 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits)
  drm/amdgpu: use uintptr_t instead of unsigned long to store pointer
  drm/amdgpu: Avoid using signed integer to store pointer value
  drm/amdgpu:invoke new implemented AI MB func
  drm/amdgpu/vega10:timeout set to equal with VI
  drm/amdgpu:implement the reset MB func for vega10
  drm/amdgpu:fix typo for mxgpu_ai
  drm/amdgpu:no need to involv HDP in KIQ
  drm/amdgpu:add PSP block only load_type=PSP (v2)
  drm/amdgpu/smu9: update to latest driver interface
  drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
  drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
  drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
  drm/amd/amdgpu: Drop gfx_v9_0_print_status()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
  drm/amdgpu: Move function amdgpu_has_atpx near other similar functions
  ...
2017-04-07 05:49:12 +10:00
Alex Xie
f4e7c7c1b4 drm/amdgpu: use uintptr_t instead of unsigned long to store pointer
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:08 -04:00
Alex Xie
ec2c467efe drm/amdgpu: Avoid using signed integer to store pointer value
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:07 -04:00
Monk Liu
81758c5595 drm/amdgpu:invoke new implemented AI MB func
Implement the sr-iov mailbox for soc15 asics.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:07 -04:00
Monk Liu
8758cb6a96 drm/amdgpu/vega10:timeout set to equal with VI
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:06 -04:00
Monk Liu
f98b617ed5 drm/amdgpu:implement the reset MB func for vega10
they are lack in the bringup stage, we need them for GPU reset
feature.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:05 -04:00
Monk Liu
94b4fd725b drm/amdgpu:fix typo for mxgpu_ai
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:05 -04:00
Monk Liu
377e275946 drm/amdgpu:no need to involv HDP in KIQ
1,KIQ won't touch VRAM so no need to involv HDP flush/invalidate at all.
2,According to CP hw designer KIQ better not use any PM4 package lead to wait behave.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:04 -04:00
Monk Liu
bb5c9ca588 drm/amdgpu:add PSP block only load_type=PSP (v2)
SRIOV currently only can load ucode directly, and PSP
block is not supported by VF temporarily.

will remove this restrict and use PSP load all ucode
even for SRIOV later

v2: squash in check against module parameter

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:28:04 -04:00
Evan Quan
ba8a21cfbc drm/amdgpu/smu9: update to latest driver interface
Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:26 -04:00
Tom St Denis
40f0677337 drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:26 -04:00
Tom St Denis
596c8e8b7f drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:25 -04:00
Tom St Denis
342cda2522 drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:25 -04:00
Tom St Denis
ea64468e36 drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:24 -04:00
Tom St Denis
72edadd53e drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
Use new WREG32_FIELD macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:24 -04:00
Tom St Denis
75bac5c679 drm/amd/amdgpu: Drop gfx_v9_0_print_status()
It's not used in gfx 6/7/8 so drop it from gfx 9 as well.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:23 -04:00
Tom St Denis
9da2c65269 drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
Use new WREG32_FIELD15 macro.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:22 -04:00
Tom St Denis
8dd553e156 drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
Use new WREG32_FIELD15 macro.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:22 -04:00
Tom St Denis
98709ca635 drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
Use new WREG32_FIELD15 macro.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:21 -04:00
Tom St Denis
efe53d8a46 drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
Introduce WREG32_FIELD15 macro for SOC15 architectures.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:21 -04:00
Alex Xie
714f88e06f drm/amdgpu: Move function amdgpu_has_atpx near other similar functions
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:20 -04:00
Christian König
6e3f187cc0 drm/amdgpu: fix over allocating of IRQ sources
We need an array of pointers to IRQ sources, not an array of sources.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:20 -04:00
Tom St Denis
8b5de0ebe4 drm/amd/amdgpu: Clean up psp reload_quirk()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:19 -04:00
Tom St Denis
61a8cee51f drm/amd/amdgpu: Fix psp_v3_1 compare sram
Had the wrong sense in the loop

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:18 -04:00
Christian König
03f89feb57 drm/amdgpu: cleanup get_invalidate_req v2
The two hubs are just instances of the same hardware,
so the register bits are identical.

v2: keep the function pointer

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:18 -04:00
Zhang, Jerry
36b32a682b drm/amdgpu: fix vm size and block size for VMPT (v5)
Set reasonable defaults per family.

v2: set both of them in gmc
v3: move vm size and block size in vm manager
v4: squash in warning fix from Alex Xie
v5: squash in min() warning fix

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:27:17 -04:00
Tom St Denis
d1a5b2502c drm/amd/amdgpu: Fix srbm_indexing in init/inactive hqd code
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:26:50 -04:00
Tom St Denis
bb215962f6 drm/amd/amdgpu: Clean up gfx_v8_0_mqd_init()
Clean up a toggle with ?:.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:26:49 -04:00
Tom St Denis
699d12b755 drm/amd/amdgpu: de-numberify HQD_ACTIVE check.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:26:49 -04:00
Tom St Denis
0ac642c5b5 drm/amd/amdgpu: clean up gfx_v8_0_kiq_init_register()
Swap read/write pattern for WREG32_FIELD()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:26:48 -04:00
Tom St Denis
35e259d525 drm/amd/amdgpu: Clean up gfx_v8_0_inactive_hqd()
Swap read/write pattern for WREG32_FIELD()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-06 13:26:48 -04:00