Commit Graph

5 Commits

Author SHA1 Message Date
Bert Kenward
d8d8ccf277 sfc: update EF10 register definitions
The RX_L4_CLASS field has shrunk from 3 bits to 2 bits. The upper
bit was never used in previous hardware, so we can use the new
definition throughout.

The TSO OUTER_IPID field was previously spelt differently from the
external definitions.

Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-12-18 13:07:50 -05:00
Edward Cree
e17705c43b sfc: Update EF10 register definitions
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-18 11:55:37 -05:00
Ben Hutchings
86fc187fcc sfc: Remove unused definitions of EF10 user-mode DMA descriptors
These DMA descriptor types will only be used by the userland
networking stack.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-02-12 17:53:34 -05:00
Jon Cooper
ee45fd92c7 sfc: Use TX PIO for sufficiently small packets
Sufficiently small linear packets can be copied into the PIO buffer
with a single call to memcpy_toio().  Non-linear packets require an
intermediate cache-line-sized buffer.

[bwh: I wrote the first version of this, but Jon did the hard work to
 handle non-linear packets.]
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2013-09-20 19:31:52 +01:00
Ben Hutchings
9c51716512 sfc: Add EF10 register and structure definitions
Also update comments and assertions in io.h:
- EF10 does not have a general BIU collector and does not have the
  bug affecting TIMER_COMMAND_REG[0] on Falcon/Siena
- The WPTR field moved within RX_DESC_UPD_REG and TX_DESC_UPD_REG.
  Adjust efx_writed_page() accordingly

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2013-08-29 18:12:16 +01:00