Commit Graph

11 Commits

Author SHA1 Message Date
Masahiro Yamada
61f838c7fa ARM: dts: uniphier: add reference clock nodes
Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-03-18 17:39:04 +01:00
Masahiro Yamada
629b557ab4 ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsi
UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi.  This improves the code
maintainability.

PH1-sLD3 is so old that it has more or less different register maps
than the others.  So, it cannot be included in this refactoring.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-12 00:24:50 +01:00
Masahiro Yamada
618a43eaea ARM: dts: uniphier: change IRQ number of UART3 of PH1-Pro4 SoC
The UART3 is assigned with IRQ 29 for old SoCs, IRQ 177 for new ones,
and PH1-Pro4 is on the boundary.

  PH1-sLD3: UART3 is unavailable
  PH1-LD4, PH1-sLD8: only IRQ 29 is supported
  PH1-Pro4: both IRQ 29 and 177 are supported
  PH1-Pro5, ProXstream2, PH1-LD6b: only IRQ 177 is supported

This SoC can choose either IRQ 29 or IRQ 177, but the former is shared
with another hardware (low speed serial0).  The latter is dedicated
for this hardware and more recommended.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-12 00:24:42 +01:00
Masahiro Yamada
1b38b0e334 ARM: dts: uniphier: add system-bus-controller nodes
The System Bus Controller block has two register regions,
but having only the second one in a separate node was not nice.

Replace it with a new node with two register regions in it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-31 01:58:06 +00:00
Masahiro Yamada
7c62f299ba ARM: dts: uniphier: add outer cache controller nodes
Add L2 cache controller nodes for all the UniPhier SoC DTSI.
Also, add an L3 cache controller node for PH1-Pro5 DTSI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-27 09:21:02 +09:00
Masahiro Yamada
68f46897ea ARM: dts: uniphier: add I2C controller device nodes
Add I2C controller device nodes for PH1-sLD3, PH1-LD4, PH1-sLD8
(FIFO-less I2C) and PH1-Pro4 (FIFO-builtin I2C).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:09:21 +02:00
Masahiro Yamada
622372309f ARM: dts: UniPhier: add UART and USB pinmux nodes
The DT nodes in uniphier-pinctrl.dtsi provide the default pinctrl
settings that would be suitable for most boards.  You can still
override them in your board DTS file if necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:54:47 +02:00
Masahiro Yamada
55d945b249 ARM: dts: UniPhier: add pinctrl device nodes
Add the pinctrol device nodes for UniPhier PH1-LD4, PH1-Pro4,
and PH1-sLD8.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:54:45 +02:00
Masahiro Yamada
3fbf02a85b ARM: dts: UniPhier: add USB EHCI device nodes
No dedicated driver compatible with "socionext,uniphier-ehci" has
been supported in the mainline yet, so it falls into "generic-ehci"
and it works well enough with our USB 2.0 host controllers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-14 11:21:45 +02:00
Masahiro Yamada
1bf4250702 ARM: dts: UniPhier: add on-chip UART device nodes
The UniPhier on-chip UART driver was merged into the mainline by
commit 1a8d2903cb ("serial: 8250_uniphier: add UniPhier serial
driver").

Add device nodes to make it really available.

We no longer have to depend on the on-board UART device (16550A),
so let's change the chosen and aliases to point to the on-chip ones.
Also, turn on the on-board Ethernet device.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-14 11:21:43 +02:00
Masahiro Yamada
8e678e06e7 ARM: dts: UniPhier: add support for UniPhier SoCs and boards
Initial device trees for UniPhier SoCs: PH1-sLD3, PH1-LD4, PH1-Pro4,
and PH1-sLD8.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-05-12 16:56:27 +02:00