Adds support for using a OMAP dual-mode timer with PWM capability
as a Linux PWM device. The driver controls the timer by using the
dmtimer API.
Add a platform_data structure for each pwm-omap-dmtimer nodes containing
the dmtimers functions in order to get driver not rely on platform
specific functions.
Cc: Grant Erickson <marathon96@gmail.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Joachim Eastwood <manabian@gmail.com>
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[thierry.reding@gmail.com: coding style bikeshed, fix timer leak]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
From: Ryo Kodama <ryo.kodama.vz@renesas.com>
When period_ns is set to the same value of RCAR_PWM_MAX_CYCLE in
rcar_pwm_get_clock_division(), this function should allow such value
for improving accuracy of frequency division setting.
Signed-off-by: Ryo Kodama <ryo.kodama.vz@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Instead of silent acceptance of unsupported requested configuration
for PWM period and setting the boundary supported value, return
-ERANGE to a caller.
Duty period value equal to 0 or period is still accepted to allow
configuration by PWM sysfs interface, when it is set to 0 by default.
For reference this is a list of restrictions on period_ns == 1/freq:
| PWM parent clock | parent clock divisor | max freq | min freq |
+------------------+----------------------+----------+----------+
| HCLK == 13 MHz | 1 (min) | 50.7 KHz | 198.3 Hz |
| HCLK == 13 MHz | 15 (max) | 3.38 KHz | 13.22 Hz |
| RTC == 32.7 KHz | 1 (min) | 128 Hz | 0.5 Hz |
| RTC == 32.7 KHz | 15 (max) | 8.533 Hz | 0.033 Hz |
Note that PWM sysfs interface does not support setting of period more
than NSEC_PER_SEC / MAX_INT32 ~ 2 seconds, however this PWM controller
supports a period up to 30 seconds.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The change fixes a problem, if duty_ns is too small in comparison
to period_ns (as a valid corner case duty_ns is 0 ns), then due to
PWM_DUTY() macro applied on a value the result is overflowed over 8
bits, and instead of the highest bitfield duty cycle value 0xff the
invalid duty cycle bitfield value 0x00 is written.
For reference the LPC32xx spec defines PWMx_DUTY bitfield description
is this way and it seems to be correct:
[Low]/[High] = [PWM_DUTY]/[256-PWM_DUTY], where 0 < PWM_DUTY <= 255.
In addition according to my oscilloscope measurements LPC32xx PWM is
"tristate" in sense that it produces a wave with floating min/max
voltage levels for different duty cycle values, for corner cases:
PWM_DUTY == 0x01 => signal is in range from -1.05v to 0v
....
PWM_DUTY == 0x80 => signal is in range from -0.75v to +0.75v
....
PWM_DUTY == 0xff => signal is in range from 0v to +1.05v
PWM_DUTY == 0x00 => signal is around 0v, PWM is off
Due to this peculiarity on very long period ranges (less than 1KHz)
and odd pre-divider values PWM generated wave does not remind a
clock shape signal, but rather a heartbit shape signal with positive
and negative peaks, so I would recommend to use high-speed HCLK clock
as a PWM parent clock and avoid using RTC clock as a parent.
The change corrects PWM output in corner cases and prevents any
possible overflows in calculation of values for PWM_DUTY and
PWM_RELOADV bitfields, thus helper macro definitions may be removed.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
As a preparatory change for switching LPC32xx mach support to common
clock framework fix clk_enable/clk_disable calls without matching
clk_prepare/clk_unprepare.
The driver can not be used on a platform with common clock framework
until clk_prepare/clk_unprepare calls are added, otherwise clk_enable
calls will fail and a WARN is generated:
# echo 1 > /sys/bus/platform/drivers/lpc32xx-pwm/4005c000.pwm/pwm/pwmchip0/pwm0/enable
------------[ cut here ]------------
WARNING: CPU: 0 PID: 701 at drivers/clk/clk.c:727 clk_core_enable+0x2c/0xa4()
Modules linked in: sc16is7xx
CPU: 0 PID: 701 Comm: sh Tainted: G W 4.3.0-rc2+ #171
Hardware name: LPC32XX SoC (Flattened Device Tree)
Backtrace:
[<>] (dump_backtrace) from [<>] (show_stack+0x18/0x1c)
[<>] (show_stack) from [<>] (dump_stack+0x20/0x28)
[<>] (dump_stack) from [<>] (warn_slowpath_common+0x90/0xb8)
[<>] (warn_slowpath_common) from [<>] (warn_slowpath_null+0x24/0x2c)
[<>] (warn_slowpath_null) from [<>] (clk_core_enable+0x2c/0xa4)
[<>] (clk_core_enable) from [<>] (clk_enable+0x24/0x38)
[<>] (clk_enable) from [<>] (lpc32xx_pwm_enable+0x1c/0x40)
[<>] (lpc32xx_pwm_enable) from [<>] (pwm_enable+0x48/0x5c)
[<>] (pwm_enable) from [<>] (pwm_enable_store+0x5c/0x78)
[<>] (pwm_enable_store) from [<>] (dev_attr_store+0x20/0x2c)
[<>] (dev_attr_store) from [<>] (sysfs_kf_write+0x44/0x50)
[<>] (sysfs_kf_write) from [<>] (kernfs_fop_write+0x134/0x194)
[<>] (kernfs_fop_write) from [<>] (__vfs_write+0x34/0xdc)
[<>] (__vfs_write) from [<>] (vfs_write+0xb8/0x140)
[<>] (vfs_write) from [<>] (SyS_write+0x50/0x90)
[<>] (SyS_write) from [<>] (ret_fast_syscall+0x0/0x38)
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
LPC32xx SoC has two independent PWM controllers, they have different
clock parents, clock gates and even slightly different controls, and
each of these two PWM controllers has one output channel. Due to
almost similar controls arranged in a row it is incorrectly set that
there is one PWM controller with two channels, fix this problem, which
at the moment prevents separate configuration of different clock
parents and gates for both PWM controllers.
The change makes previous PWM device node description incompatible
with this update.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
A FTM PWM instance enables/disables three clocks: The bus clock, the
counter clock and the PWM clock. The bus clock gets enabled on
pwm_request, whereas the counter and PWM clocks will be enabled upon
pwm_enable.
The driver has three closesly related issues when enabling/disabling
clocks during suspend/resume:
- The three clocks are not treated differently in regards to the
individual PWM state enabled/requested. This can lead to clocks
getting disabled which have not been enabled in the first place
(a PWM channel which only has been requested going through
suspend/resume).
- When entering suspend, the current behavior relies on the
FTM_OUTMASK register: If a PWM output is unmasked, the driver
assumes the clocks are enabled. However, some PWM instances
have only 2 channels connected (e.g. Vybrid's FTM1). In that case,
the FTM_OUTMASK reads 0x3 if all channels are disabled, even if
the code wrote 0xff to it before. For those PWM instances, the
current approach to detect enabled PWM signals does not work.
- A third issue applies to the bus clock only, which can get enabled
multiple times (once for each PWM channel of a PWM chip). This is
fine, however when entering suspend mode, the clock only gets
disabled once.
This change introduces a different approach by relying on the enable
and prepared counters of the clock framework and using the frameworks
PWM signal states to address all three issues.
Clocks get disabled during suspend and back enabled on resume
regarding to the PWM channels individual state (requested/enabled).
Since we do not count the clock enables in the driver, this change no
longer clears the Status and Control registers Clock Source Selection
(FTM_SC[CLKS]). However, since we disable the selected clock anyway,
and we explicitly select the clock source on reenabling a PWM channel
this approach should not make a difference in practice.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Setting of PWM_SW_UPDATE is bit different in Intel Broxton compared to the
previous generation SoCs. Previously it was OK to set the bit many times
(from userspace via sysfs for example) before the PWM is actually enabled.
Starting from Intel Broxton it seems that we must set PWM_SW_UPDATE only
once before the PWM is enabled. Otherwise it is possible that the PWM does
not start properly.
Change the sequence of how PWM_SW_UPDATE is programmed so that we only set
it in pwm_lpss_config() when the PWM is already enabled. The initial
setting of PWM_SW_UPDATE will be done when PWM gets enabled. This should
make the driver work with the previous generation Intel SoCs and Broxton.
Add also small delay after the bit is set to let the hardware propagate it
properly.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
We have two users of core part right now. Let them to select core part
automatically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
For Broxton PWM controller, base unit is defined as 8-bit integer
and 14-bit fraction, so need to update base unit setting to output
wave with right frequency.
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
It's possible that the PWM clock becomes an orphan. So better check the
result of clk_get_rate() in order to prevent a division by zero.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Currently pwm-bcm2835 assumes a fixed clock rate and stores the
resulting scaler in the driver structure. But with the upcoming
PWM clock support for clk-bcm2835 the rate could change, so
calculate the scaler in the ->config() callback.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The LPSS PWM driver calls pwm_lpss_disable() when the PWM device is
released (for example unexported from sysfs). This in turn calls
pm_runtime_put() which makes runtime PM count to be unbalanced if the
device has not been enabled at this point.
This is easy to reproduce:
# cd /sys/class/pwm/pwmchip0
# echo 0 > export
# echo 0 > unexport
The count is unbalanced and prevents the PWM device from being powered on
next time.
Fix this by removing ->free() callback. There are no resources to be
released anyway.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This round contains a couple of new drivers for the Marvell Berlin
family of SoCs, various SoCs from Renesas and Broadcom as well as the
backlight PWM present on MediaTek SoCs.
Further existing drivers are extended to support a wider range of
hardware.
The remaining patches are minor fixes and cleanups across the board.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJWQ12TAAoJEN0jrNd/PrOhVMwP/RK0Vr0GogxpHc4endw/L1Tf
aDmC8LVxEBxaUOtjWB2sVB4ZSGfHfThOLTddiw5CTrka2fSAMTwhJueu6EZuLQ/V
lJWb0bgneaH9VYqL26BPPw0sDHpFOBTg+QgXWsvipH3YQIWlOlSsQJZNrVpNkGWe
Iw/+Ic45YwtGPLxwjgHLJyRZVuu6RV3se0voZhIuj33OLuYJ/1MCFYKTb3M8LZk3
6q+NwkhSnKgftu5rYRL+HvFHdu3p06W3hxTBp8KbPCDHpKVYY4S6z2pI7ol40BiT
7DFxr+PJ2GWURWVh9K6zmsamYAcKKeJhRjb2G8nBqgbKd9w+buNcAFjVkFAwGPK9
g6/QO6s/ZXwUOb518j3X/ABx/0dJmZRZXtlLqBikzlpjKLVrIGpgNz+s9nWzZq90
VJeun5S2FUKZYXqCquUWMZvSIDn0zyvwsW4p4bs4U/SuOGfqUnzeGW6+LOaY+RTj
adzo3WxOmkWP2NRjWIwdzuLYekWgDFusbIsmWNfPWnu+1DNGzRZ7jTKUdSELQCM0
mzoZIRxxsU90jYA9XXfDWxS5X/h7YdkMhzxE/JI5aV7kUAHgV6U2F8eWCWV3WcRg
pPRN8BJ+bO6DLdj5AwN60GNU79M8ciRLyhzqTAN3dsvLPhliAs/b7XyhADh+wLSk
XRX5sTGww3pnvKZLIIPh
=gwbt
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This round contains a couple of new drivers for the Marvell Berlin
family of SoCs, various SoCs from Renesas and Broadcom as well as the
backlight PWM present on MediaTek SoCs.
Further existing drivers are extended to support a wider range of
hardware.
The remaining patches are minor fixes and cleanups across the board.
Note that one of the patches included in this pull request is against
arch/unicore32. I've included it here because I couldn't get a
response from Guan Xuetao and I consider the change low-risk.
Equivalent patches have been merged and tested in Samsung and PXA
trees. The goal is to finally get rid of legacy code paths that have
repeatedly been causing headaches"
* tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (24 commits)
pwm: sunxi: Fix whitespace issue
pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro's
pwm: sysfs: Remove unnecessary temporary variable
unicore32: nb0916: Use PWM lookup table
pwm: pwm-rcar: Revise the device tree binding document about compatible
pwm: Return -ENODEV if no PWM lookup match is found
pwm: sun4i: Add support for PWM controller on sun5i SoCs
pwm: Set enable state properly on failed call to enable
pwm: lpss: Add support for runtime PM
pwm: lpss: Add more Intel Broxton IDs
pwm: lpss: Support all four PWMs on Intel Broxton
pwm: lpss: Add support for multiple PWMs
pwm-pca9685: enable ACPI device found on Galileo Gen2
pwm: Add MediaTek display PWM driver support
dt-bindings: pwm: Add MediaTek display PWM bindings
pwm: tipwmss: Enable on TI DRA7x and AM437x
pwm: atmel-hlcdc: add sama5d2 SoC support.
pwm: Add Broadcom BCM7038 PWM controller support
Documentation: dt: add Broadcom BCM7038 PWM controller binding
pwm: Add support for R-Car PWM Timer
...
This patch changes no code, it just fixes the whitespacing. Operators
should be separated from operands by a single space.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
For the npwm property the PWM sysfs interface already made use of the
DEVICE_ATTR_RO macro. This patch expands this to the other sysfs
properties so that the code base is concise and makes use of this
helpful macro.
This has the advantage of slightly reducing the code size, improving
readability and no longer using magic values for permissions.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use the result of pwm_is_enabled() directly instead of storing it in a
temporary variable.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
When looking up a PWM using the lookup table, assume that all entries
will have been added already, so failure to find a match means that no
corresponding entry has been registered.
This fixes an issue where -EPROBE_DEFER would be returned if the PWM
lookup table is empty. After this fix, -EPROBE_DEFER is reserved for
situations where no provider has yet registered for a matching entry.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The PWM controller on sun5i SoCs is identical to the one found on sun7i
SoCs. On the A13 package only one of the 2 pins is routed to the outside,
so only advertise one PWM channel there.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The pwm_enable() function didn't clear the enabled bit if a call to the
driver's ->enable() callback returned an error. The result was that the
state of the PWM core was wrong. Clearing the bit when enable returns
an error ensures the state is properly set.
Tested-by: Jonathan Richardson <jonathar@broadcom.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
[thierry.reding@gmail.com: add missing kerneldoc for the lock]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
To be able to save some power when PWM is not in use, add support for
runtime PM for this driver. This also allows the platform to transition to
low power S0ix states when the system is idle.
Signed-off-by: Huiquan Zhong <huiquan.zhong@intel.com>
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add more Intel Broxton ACPI and PCI IDs to the driver supported devices
list.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Intel Broxton has similar PWM than Intel Braswell but instead of one it has
four PWMs included in one PCI/ACPI device. This patch adds support for all
the four PWMs and changes the PCI part of the driver to use
'pwm_lpss_bxt_info' instead.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI)
device. Each PWM has 1k of register space allocated from the parent device.
Add support for this.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
There is a chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via
ACPI ID INT3492.
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add display PWM driver support to modify backlight for MT8173 and
MT6595. The PWM has one channel to control the brightness of the
display. When the (high_width / period) is closer to 1, the screen
is brighter; otherwise, it is darker.
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
TIPWMSS is present on TI's DRA7x and AM437x SoCs. Enable its usage.
Instead of adding each SoC individually, use the more generic symbol
ARCH_OMAP2PLUS instead.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add sama5d2 hlcdc backlight PWM support. This chip doesn't have to deal with an
errata, so it's a simple addition of the mfd compatible string.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add support for the BCM7038-style PWM controller found in all BCM7xxx STB SoCs.
This controller has a hardcoded 2 channels per controller, and cascades a
variable frequency generator on top of a fixed frequency generator which offers
a range of a 148ns period all the way to ~622ms periods.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Commit dca1a4b5ff ("clk: at91: keep slow clk enabled to prevent system
hang") added a workaround for the slow clock as it is not properly handled
by its users.
Get and use the slow clock as it is necessary for the timer counters.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
This patch adds support for R-Car SoCs PWM Timer. The PWM timer of
R-Car H2 has 7 channels. So, we can use the channels if we describe
device tree nodes.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This platform driver has a OF device ID table but the OF module alias
information is not created so module autoloading won't work.
This patch adds the missing MODULE_DEVICE_TABLE() for OF to export that
information so modules have the correct aliases built-in and autoloading
works correctly.
A longer explanation by Javier Canillas can be found here:
https://lkml.org/lkml/2015/7/30/519
Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This set of changes introduces the beginnings of a new API that's based
around the concept of states that can be atomically applied. Drivers go
to various lengths to implement something similar, which indicates that
the core should really be providing the necessary framework.
On top of that, there is a bit of cleanup as well as improved kerneldoc
and integration into the device-drivers DocBook.
Regarding drivers there is a new one for the NXP LPC18xx family of SoCs
and a couple of fixes for existing drivers (pca9685, Broadcom Kona and
Atmel HLCDC).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJV8DLwAAoJEN0jrNd/PrOhSf4P/RYwdDGB/xvI0ifXS5p9znNA
hr6+MUH87+f9NY1jcDye0RrxIkRsckQ3x3fe/nTmODjCSM/cyrWrVAEKbkqE5bZH
LTRT6M6jolSAUGXFTBDuHktYdMU9yaD0PJvm0RgBEC7z2BeBmCgCXTFc4paxw2GA
NvikouXZX9XDlXp598pHPFoL92vTLevQQMBHYW9myY8cjAOG0X8Dn05xQaC2kRvJ
5q+OD1D/kIEMJxONrpef7bwzPgCkuGTHqqIIm6gLVoPBPGWz43kaZ5+x/j2E98E9
fkfcP+21GvZ/tdAUEkrRnpy5Jnn+Nk0m+yzPtRkvj4TLwPd93EjumiPg5sb53pys
ZfoHgnOAArVxEnTYLQk4IyBWcHyyzIxZBKZZpXkMXjY4QVq6wZLAP+vyCAzcm4tV
vHqUN5BYAkwYPUNU58fgFWGHg6rFlb2QSN1bIj5opgygWmRbPgmwVj3trvS2Dkoe
NOv47pp0OyWvTvx+wLql8BUt1zK1M6QldfPF6pR4FB18SLyKYH89ZbjHTyGdsuCv
SiaWrqNB4eRmEKW1MA20Kc4wlF5c2peXVp2EHeddh/oHPES8IVWBPMPwSkJZrpQb
bIUMStKlJ/Y1GPo6Dd7njK/kA3GwwsbYXYHmyPm0IRuAeZKrzGzVSIIljbfpL6Vf
LBuKRMQHY4iWtF8A5SmY
=ymH8
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set of changes introduces the beginnings of a new API that's
based around the concept of states that can be atomically applied.
Drivers go to various lengths to implement something similar, which
indicates that the core should really be providing the necessary
framework.
On top of that, there is a bit of cleanup as well as improved
kerneldoc and integration into the device-drivers DocBook.
Regarding drivers there is a new one for the NXP LPC18xx family of
SoCs and a couple of fixes for existing drivers (pca9685, Broadcom
Kona and Atmel HLCDC)"
* tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errata
pwm: Add NXP LPC18xx PWM/SCT DT binding documentation
pwm: NXP LPC18xx PWM/SCT driver
pwm-pca9685: Support changing the output frequency
pwm-pca9685: Fix several driver bugs
pwm: kona: Modify settings application sequence
pwm: pca9685: Drop owner assignment
pwm: Add to device-drivers documentation
pwm: Clean up kerneldoc
pwm: Remove useless whitespace
pwm: sysfs: Remove unnecessary padding
pwm: sysfs: Properly convert from enum to string
pwm: Make use of pwm_get_xxx() helpers where appropriate
pwm: Add pwm_get_polarity() helper function
pwm: Constify PWM device where possible
pwm: Add the pwm_is_enabled() helper
The errata for HLCDC PWM of at91sam9n12 are the same as for at91sam9x5.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This commit adds support for NXP LPC18xx PWM/SCT.
NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State
Configurable Timer (SCT) which can be configured as a Pulse Width
Modulator. Other SoCs in that family may share the same hardware.
The PWM supports a total of 16 channels, but only 15 can be simultaneously
requested. There's only one period, global to all the channels, thus PWM
driver will refuse setting different values to it, unless there's only one
channel requested.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
[thierry.reding@gmail.com: remove excessive padding of fields]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Previously, period_ns and duty_ns were only used to determine the
ratio of ON and OFF time, the default frequency of 200 Hz was never
changed.
The PCA9685 however is capable of changing the PWM output frequency,
which is expected when changing the period.
This patch configures the prescaler accordingly, using the formula
and notes provided in the PCA9685 datasheet.
Bounds checking for the minimum and maximum frequencies, last updated
in revision v.4 of said datasheet, is also added.
The prescaler is only touched if the period changed, because we have to
put the chip into sleep mode to unlock the prescale register.
If it is changed, the PWM output frequency changes for all outputs,
because there is one prescaler per chip. This is documented in the
PCA9685 datasheet and in the comments.
If the duty cycle is not changed at the same time as the period, then
we restart the PWM output using the duty cycle to period ratio from
before the period change.
When using LEDs for example, previously set brightness levels stay the
same when the frequency changes.
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Problems:
- When duty_ns == period_ns, the full OFF bit was not cleared and the
PWM output of the PCA9685 stayed off.
- When duty_ns == period_ns and the catch-all channel was used, the
ALL_LED_OFF_L register was not cleared.
- The full ON bit was not cleared when setting the OFF time, therefore
the exact OFF time was ignored when setting a duty_ns < period_ns
Solution: Clear both OFF registers when setting full ON and clear the
full ON bit when changing the OFF registers.
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Update the driver so that settings are applied in accordance with the
most recent version of the hardware spec. The revised sequence clears
the trigger bit, waits 400ns, writes settings, sets the trigger bit,
and waits another 400ns. This corrects an issue where occasionally a
requested change was not properly reflected in the PWM output.
Reviewed-by: Arun Ramamurthy <arunrama@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Tested-by: Scott Branden <sbranden@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
i2c_driver does not need to set an owner because i2c_register_driver()
will set it.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Padding initializers so that assignment operators align is bound to lead
to inconsistencies or churn. Single spaces around the assignment is just
fine.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The current code will check for polarity in a boolean way. While it is
correct that polarity is either normal or inversed, make it more obvious
that it's an enumeration by using a switch statement and explicit
matches on the enumeration values.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The Crystalcove PMIC provides three PWM signals and this driver exports
one of them on the BYT platform which is used to control backlight for
DSI panel. This is platform device implementation of the drivers/mfd
cell device for CRC PMIC.
CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Varka Bhadram <varkabhadram@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Use the pwm_get_xxx() helpers instead of directly accessing the fields
in struct pwm_device. This will allow us to smoothly move to the atomic
update approach.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Some PWM drivers are testing the PWMF_ENABLED flag. Create a helper
function to hide the logic behind enabled test. This will allow us to
smoothly move from the current approach to an atomic PWM update
approach.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This has a couple of fixes for Atmel, Samsung and Broadcom drivers. Some
preparatory patches for more upcoming Intel work is included as well.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVevH0AAoJEN0jrNd/PrOhUDsP/0N3DTBrwHGY2TRtniXK5PsX
Dz9Txm1dUlSRc/4QmYfmBPB3GzgtbKMAXP/SJBJ5SP48RZYvzjfHLxEKEoJqkMg+
h9btE1fReQ50H0HmH4L8+jkjSsA15m39T5yuX+KR5P6Uxv7WFMyVDgBw4dmARIzK
wOwuy8r+6ZtAdsj+o0eSoOxs64HgUiJRN/9FDJi9fPGi27smAXH2Nef5uja9upnt
CR+ntOxYXXRJM2JnW9ObPK87wvZsiIJw1QrRIWPRaUesZjXxH+11eTKS4YaSjnhz
93aLDWXVBm9goXeYnqe+aRq0PHIRIHcND6Fh4+cb42dVYdINnW6h9Y9WBSUeVHwx
cKumJUU6wBbTSUUWKnvGi1NFmrMvxbf3knE0maQjswHOf5SEdCh0q/VNh/HWGGPI
sglqjl5KmJPx9Afr97RNNqymYS9ECT0yHajY+5ivgvD4XlPFam2NPpyi1CjJaqaU
rnwhabnpnpq7zeD78f5gvLSENWvwnYCVQTwp0YLkJ2o+9gGPh+FuJ6KcZ3m7LGXC
jb1VuAy+0896eP3VlK1LqwDkyBVFkWZQqwuLnER6zHuMTetx0tfosj8Nenv0z+fv
VccUDgYuh8G/SHYNDVdpRmHDIb34ZpMjSxbXaFOKTPsxAhlNfu4ylcrKZijIkK+a
YmYJgj9pGqww50LVK0R/
=VmI2
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This has a couple of fixes for Atmel, Samsung and Broadcom drivers.
Some preparatory patches for more upcoming Intel work is included as
well"
* tag 'pwm/for-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: lpss: pci: Add support for Broxton platform
pwm: bcm-kona: Don't set polarity in probe
pwm: Add pwmchip_add_with_polarity() API
pwm: atmel: Fix incorrect CDTY value after disabling
pwm: atmel: Fix incorrect CDTY value after enabling
pwm: samsung: Use MODULE_DEVICE_TABLE() to include OF modalias
pwm: Add support to remove registered consumer lookup tables
Omit setting the polarity to normal during probe and instead use the new
pwmchip_add_with_polarity() function to register a PWM chip with inverse
polarity by default for all channels to reflect the hardware default.
Signed-off-by: Arun Ramamurthy <arunrama@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
[thierry.reding@gmail.com: use pwmchip_add_with_polarity()]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add a new function to register a PWM chip with channels that have their
initial polarity as specified by an additional parameter. This benefits
drivers of controllers that by default operate with inversed polarity
by removing the need to modify the polarity during initialization.
Signed-off-by: Tim Kryger <tim.kryger@gmail.com>
Signed-off-by: Jonathan Richardson <jonathar@broadcom.com>
[thierry.reding@gmail.com: export pwmchip_add_with_polarity()]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-leds calls .config() and .disable() in a row. This exhibits that it
may happen that the channel gets disabled before CDTY has been updated
with CUPD. The issue gets quite worse with long periods. So, ensure that
at least one period has past before disabling the channel by polling
ISR.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
CUPD is not flushed before enabling the channel so it will update
CDTY/CPRD just after one period. So we always set CUPD, even when the
channel is not enabled.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
If the pwm-samsung driver is built as a module, modalias information is
not filled so the module is not autoloaded. Use the MODULE_DEVICE_TABLE()
macro to export the OF device ID so the module contains that information.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The PWM hardware on Pistachio platform has a maximum timebase steps
value to 255. To fix it, let's introduce a compatible-specific
data structure to contain the SoC-specific details and use it to
specify a maximum timebase.
Also, let's limit the minimum timebase to 16 steps, to allow a sane
range of duty cycle steps.
Fixes: 277bb6a29e ("pwm: Imagination Technologies PWM DAC driver")
Signed-off-by: Naidu Tellapati <naidu.tellapati@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
In case some drivers are unloading, they can remove lookup tables which
they had registered during their load time to avoid redundant entries if
loaded again.
CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
For platforms that don't support DT, some early MFD modules can register
lookup tables. Remove the __init annotation so that this works. This is
similar to gpio_add_lookup_table() which allows late additions.
CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
When disabling the Samsung PWM the output state remains at the level it
was at the end of a PWM cycle. In other words, calling pwm_disable()
when at 100% duty cycle will keep the output active, while at all other
settings the output will go/stay inactive. On top of that the Samsung
PWM settings are double-buffered, which means the new settings only get
applied at the start of a new PWM cycle.
This results in a race if the PWM is at 100% duty cycle and a driver
calls:
pwm_config(pwm, 0, period);
pwm_disable(pwm);
In this case the PWMs output will unexpectedly stay active, unless a new
PWM cycle happened to start between the register writes in pwm_config()
and pwm_disable(). As far as I can tell this is a regression introduced
by 3bdf878, before that a call to pwm_config() would call
pwm_samsung_enable() which, while heavy-handed, made sure the expected
settings were live.
To resolve this, while not re-introducing the issues 3bdf878 (flickering
as the PWM got reset while in a PWM cycle) fixed, only force an update
of the settings when at 100% duty cycle, which shouldn't have any
noticeable effect on the output but is enough to ensure the behaviour is
as expected on disable.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The driver computes which clock divider it sould be using from the
requested period. This computation assumes that the link between the
register value and the actual divider value is raising 2 to the power of
the registry value.
div = 1 << regvalue
This is true only for the first 5 values out of 8. Next values are 64,
256 and, 1024 - instead of 32, 64, 128.
This affects only the users requesting a period > 0.04369s.
Replace the computation with a look-up table.
Signed-off-by: Gaetan Hug <ghug@induct.be>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
sama5d4 SoC also has an errata on the HLCDC PWM. It is the same as the
sama5d3 that is forbidding the use of div1 prescaler.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The regmap_config struct may be const because it is not modified by the
driver and regmap_init() accepts pointer to const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Instead of using the literal value for the number of nanoseconds per
second, use the macro instead to increase readability.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The of_node_put() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The Pistachio SOC from Imagination Technologies includes a Pulse Width
Modulation DAC which produces 1 to 4 digital bit-outputs which represent
digital waveforms. These PWM outputs are primarily in charge of controlling
backlight LED devices.
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Naidu Tellapati <Naidu.Tellapati@imgtec.com>
Signed-off-by: Sai Masarapu <Sai.Masarapu@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
[thierry.reding: fixup license header as discussed on list]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch introduces a bitmap which is used to keep track of the
pwm channels which have been configured in a pwm chip.
The method used earlier to find the number of configured channels,
was to count the pwmdevices with PWMF_REQUESTED field set
and period value configured. This was not correct and failed
when of_pwm_get()/pwm_get() and then pwm_config() was used.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The slow and system clock should never return a rate of zero, but this
might happen if the clocks property defined in the DT is referencing the
wrong clocks.
Prevent any division by zero from happening by testing the clk_freq
value before calling do_div().
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The include/linux/clk.h header defines dummy implementations for the
various clk_*() functions if HAVE_CLK is not selected to improve build
coverage in randconfig builds.
The dummy implementation of clk_get_rate() returns 0, which causes the
Atmel HLCDC PWM driver's atmel_hlcdc_pwm_config() implementation to end
up calling:
do_div(clk_period_ns, 0)
On x86, do_div(n, base) will end up evaluating to this:
n >>= ilog2(base)
with base = 0, the implementation of ilog2() will call ____ilog2_NaN(),
which is purposely undefined and results in a linker failure:
ERROR: "____ilog2_NaN" [drivers/pwm/pwm-atmel-hlcdc.ko] undefined!
The implementation of do_div() checks that base is a power of 2 before
calling ilog2(). The compiler doesn't optimize this away, presumably
because is_power_of_2() is an inline function and the compiler doesn't
or can't inspect it closely enough. ilog2() being a macro it still ends
up generating the ____ilog2_NaN() because of the constant 0.
The root of the problem is that the driver really should be checking
before possibly dividing by zero. That should eventually be fixed, but
for now just assume that the clock runs at a sensible frequency when
available.
Reported-by: Jim Davis <jim.epost@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
There are two new drivers, one for the BCM2835 (Raspberry Pi) and one
used in conjunction with the LCD controller on various Atmel SoCs. The
Samsung PWM driver can now be built for 64-bit ARM (Exynos7).
A couple of fixes have been applied to the FTM PWM driver and system
sleep support was added.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJUkURIAAoJEN0jrNd/PrOhG6QQAIyoyd6eJfS+cN7+qHN9W6Wd
X5qu60iwspn8TrzxnsyUPVNYndmKET5jbjmOL5BbHeh+L+Urnfo3BlkLeGN0jKC5
LZiS7SzzLcFwYufcV22rycF97KO11LVd5vQ3WKhD/tJljTSVemiUZeCFddkWfuwr
ngE3W3+2opmAepvkW3GyvaaLaRhYPDKgWYYvKkmtsH6jcqpikAxsn5+5Uzctu8aM
MlU9/nSq4JmM2BUHEgwN76tFi6qrcY7uGKwkE80aO70rDLOWPhoM7T4L1XegSSI3
DFURuvYo528L2hXC6CnShBZEsvjXmIdG/WxuxPtcKVZNfCAwfJqpDXBTQJz/MFlz
fHykAZfjfNju+Y3iprc6QgnLQOv5+j0ZRRx55adVysXBqMAbaJjmKj0uCLsKZa3w
tNt5YzuUs3FHI7UHq7L3+e2WhT0TtxJgTiSyP7Jvbt8iUY9GVJpEz5gmOx0KRYSz
lS0MUBPNMIZjtBQqtotWfSb9f+mJPYxQkpbOfodiZnouLbqStrO/GZ+7O3+aJQ5Y
8+yrj3PgqwSXQkf3d4Y72RnMjfCqO1RSg6a9Qe1Txz9aXBQlTPOZxylwZHiMYdxm
yF1rzP1LWRlcHHroB/lLOJ4xNjUhLqvhFQT/hlRR8bygl+v67SCEX0gii0AwTYHU
4bAM7asKUBnOfYcvsuaX
=jD3K
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"There are two new drivers, one for the BCM2835 (Raspberry Pi) and one
used in conjunction with the LCD controller on various Atmel SoCs.
The Samsung PWM driver can now be built for 64-bit ARM (Exynos7).
A couple of fixes have been applied to the FTM PWM driver and system
sleep support was added"
* tag 'pwm/for-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handling
pwm: ftm: Add Power Management support for FTM PWM
pwm: ftm: Add regmap rbtree type cache support
pwm: ftm: Correctly track usage count
pwm: samsung: Allow Samsung PWM driver to be enabled on Exynos7
pwm: add DT bindings documentation for atmel-hlcdc-pwm driver
pwm: add support for atmel-hlcdc-pwm device
pwm: Add BCM2835 PWM driver
at91sam9x5 has an errata forbidding the use of slow clk as a clk source and
sama5d3 SoCs has another errata forbidding the use of div1 prescaler.
Take both of these erratas into account.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add PM support for FTM PWM driver using callback function suspend
and resume in .driver.pm of platform_driver.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch is to prepare for adding PM support for FTM PWM driver using
callback function suspend and resume in .driver.pm of platform_driver.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
No matter how many times the FTM PWM is enabled, the use_count will
always be one.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
To re-use the existing PWM driver for 64-bit ARM based Exynos7 SoC, make
the driver depend on ARCH_EXYNOS along with PLAT_SAMSUNG.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12
or sama5d3 families for instance) provides a PWM device.
This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
There are no new drivers here, only a couple of fixes all over the place.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJURLy0AAoJEN0jrNd/PrOhP8UP/Auwzo3Wd0cFJEnJVdyrj9sN
l0Wwnib3edKQDNhPmnQE77fXT3oo4XhdNAzoCRfcy+e/yVq6p3og+tz6z87DahCt
nnfKCTK8MRw1d4tniVHVhi0BDSfbjXdJCiXe/mmqfPTegIxF5ps7JnHbTZuIOx8i
XRfxBvAqmmXGmNQANfW7/iZdDzSKQ70DjHIBFn/pa1eLQG2lJ54joo/yeA1Kk0Ly
CSJGF7L7XLV9mWxXA1vZWGgpIV6dduObtOpRlOwPkG7tGmXInbUery0G429ah8ce
o7LevARZ41yi7fA6nDtNDG8FWq7oavq0jWvRQuq8M5xn+aYGmYZdd/W47Xc0xUnF
eGAmz0q78poDTZDA1EXoY/6Og+JgI8x+PpDxaRN4FIa6gpkcTQEuafpo9BLfGo4K
PTDckq3FqOkIcX5jA4X5OP8lgnz08PZDQaE6QomuNpeKJRy/3aEKWRJ+C4XWcF9t
7bgkBTLEOq51UXUNuPjogGtwmW8Mf6WOfRdvaRLiTH7KJlJjgwxJYrs0o2D1q7bz
TbZeDRcRhG7ZfR/5nz7qDEA8FjgwOLCMciqBT4wBc47Er7VaURWl5aoSuTxalJ3A
hqk8jbwKhaAO+L7N6Jzqk1TqxOKC9HbhaJO7to4gir07bEpXOHQu1jFwZEAmRbvH
x1prpzzghUPmVv0WYh36
=llZK
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"There are no new drivers here, only a couple of fixes all over the
place"
* tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: Let PWM_CLPS711X depend on HAS_IOMEM
pwm: atmel: Fix calculation of prescale value
pwm: Fix uninitialized warnings in pwm_get()
pwm: rockchip: Allow polarity invert on rk3288
pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2
pwm: imx: Cleanup indentation for register definitions
pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition
pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error.
pwm: lpss: make it buildable only on X86
pwm: lpss: use c99 initializers in structures
pwm: lpss: Fix build failure on PowerPC
pwm: lpss: pci: Move to use pcim_enable_device()
pwm: lpss: Properly split driver to parts
pwm: lpss: Add ACPI and PCI IDs for Intel Braswell
pwm: fsl-ftm: Select REGMAP_MMIO
pwm: fsl-ftm: Document 'big-endian' property
pwm: fsl-ftm: Convert to direct regmap API usage
pwm: fsl-ftm: Clean up the code
The prescale value used for calculating the period was incremented
afterwards, thus the resulting prescale value is by one too high.
This resulted in a PWM frequency only half as high as requested.
This patch moves the 64 bit division out of the prescale loop to
correct the above issue and make the calculation more efficient.
Signed-off-by: Nikolaus Voss <n.voss@weinmann-emt.de>
Tested-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
- Timer Counter (TC) fixup and cleanup:
- fix segmentation fault when kexec-ing a kernel by masking
TC interrupts at shutdown and probe time
- use modern driver model: devm_*, probe function, sanitize IRQ request
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJUDaNIAAoJEAf03oE53VmQ6lAH/RyGo8yEbupiRy7OQjc/k+Xo
LkklJnnLzNSs42Y2GIRQ8XhlZwgVsoSfCWbgJL3M/YVgPzktETRREygOpYN7BN0w
ibj3Y2ftQc/94va+QjoUJKcvP4UQULSczTuU0GeEy6XUoPSdiYZNqNRy/O5XdujK
w4rTXBlAuVTRv6fppEPAEKcNH6fUW51D3x4/4qI9w0pzLXbvdS0lAjEo1bbbipp7
0PWJmDtkpeGn1wEdVyNkBY2ASEuRqjtWAL41joYGNtrcy43V79ZEn+TkTonfJ02L
/qqRyuhHHk+0zOuBIVRlLw5BzddXaqpRXqClM8qdOkDvbz6eL9CcCNCUF3lHcgo=
=Ao6T
-----END PGP SIGNATURE-----
Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup
Pull "Second batch of AT91 cleanup for 3.18" from Nicolas Ferre:
- Timer Counter (TC) fixup and cleanup:
- fix segmentation fault when kexec-ing a kernel by masking
TC interrupts at shutdown and probe time
- use modern driver model: devm_*, probe function, sanitize IRQ request
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91:
clocksource: tcb_clksrc: sanitize IRQ request
ARM: at91/tclib: mask interruptions at shutdown and probe
ARM: at91/tclib: move initialization from alloc to probe
ARM: at91/tclib: prefer using of devm_* functions
Move resource retrieval from atmel_tc_alloc to tc_probe to avoid lately
reporting resource related issues when a TC block user request a TC block.
Moreover, resources retrieval are usually done in the probe function,
thus moving them add some consistency with other drivers.
Initialization is done once, ie not every time a tc block is requested.
If it fails, the device is not appended to the list of tc blocks.
Furhermore, the device id is retrieved at probe as well, avoiding parsing
DT every time the user requests of tc block.
Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
With some versions of gcc (e.g. 4.1.2):
drivers/pwm/core.c: In function ‘pwm_get’:
drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this function
drivers/pwm/core.c:609: warning: ‘period’ may be used uninitialized in this function
While these are false positives, we can get rid of them by refactoring
the code to store a pointer to the best match, as suggested before by
Thierry Reding. This does require moving the mutex_unlock() down.
Fixes: d717ea73e3 ("pwm: Fix period and polarity in pwm_get() for non-perfect matches")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The rk3288 has the ability to invert the polarity of the PWM. Let's
enable that ability. Note that this increases pwm_cells to 3 for
rk3288.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27,
i.MX51 and i.MX6SL. There is a 4-word (16 bit) sample FIFO in this IP.
Each FIFO slot determines the duty period of a PWM waveform in one full
cycle. The IP spec mentions that we should not write a fourth sample
because the FIFO will become full and triggers a FIFO write error (FWE)
which will prevent the PWM from starting once it is enabled. In order
to avoid any sample FIFO overflow issue, this patch clears all sample
FIFO by doing software reset in the configuration hook when the
controller is disabled or waits for a full PWM cycle to get a
relinquished FIFO slot when the controller is enabled and the FIFO is
fully loaded.
The FIFO overflow issue can be reproduced by the following commands on
the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which
is driven by the pin HSIC_STROBE and the maximal brightness is 255.
echo 0 > /sys/class/leds/user/brightness
echo 0 > /sys/class/leds/user/brightness
echo 0 > /sys/class/leds/user/brightness
echo 0 > /sys/class/leds/user/brightness
echo 255 > /sys/class/leds/user/brightness
Here, FWE happens (PWMSR register reads 0x58) and the LED can not be
lighten.
Another way to reproduce the FIFO overflow issue is to run this script:
while true;
do echo 255 > /sys/class/leds/user/brightness;
done
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Since we cannot make sure the 'chip->npwm' will always be none zero here,
and then if either equal to zero, the kzalloc() will return ZERO_SIZE_PTR,
which equals to ((void *)16).
So this patch fix this with just doing the zero check before calling kzalloc().
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
There is no sign of this IP block on non-x86 architectures and rather will not
be. Thus, make this explicit by applying a direct dependency to X86.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use c99 initializers for structures.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@
struct i1 {
fs
T fld;
...};
@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@
struct i1 i2 = { is,
+ .fld = e
- e
,...};
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
[thierry.reding: rebased and applied same fix for Braswell]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
An x86 build seems to pull in the linux/io.h include indirectly. On
PowerPC that doesn't happen and the build breaks due to the readl() and
writel() functions not being declared. Fix this by explicitly including
linux/io.h.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Let's use managed functions for this driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The driver consists of core, PCI, and platform parts. It would be better
to split them into separate files.
The platform driver is now called pwm-lpss-platform. Thus, previously
set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe
side since it seems no one from outside Intel is using it for now.
While here, move to use macros module_pci_driver() and
module_platform_driver().
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
[thierry.reding: change select to depends on PWM_LPSS, cleanup]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This is pretty much the same as Baytrail PWM. Only difference is that the
input clock runs on different frequency.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Commit 42fa98a9c3 ("pwm: fsl-ftm: Convert to direct regmap API usage")
introduced the following error when REGMAP_MMIO=n:
drivers/built-in.o: In function `fsl_pwm_probe':
>> pwm-fsl-ftm.c:(.text+0xd7d7): undefined reference to `devm_regmap_init_mmio_clk'
Select select REGMAP_MMIO in order to fix this error.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The regmap core supports different endian modes for devices. This patch
convert to direct regmap API usage, preparing to support big endianness
for LS1 SoC.
Using the regmap framework it will be easy to support devices that only
differ in endianness with the same device driver.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch intends to prepare for converting to direct regmap API usage.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
If pwm_get() finds a look-up entry with a perfect match (both dev_id and
con_id match), the loop is aborted, and "p" still points to the correct
struct pwm_lookup.
If only an entry with a matching dev_id or con_id is found, the loop
terminates after traversing the whole list, and "p" now points to
arbitrary memory, not part of the pwm_lookup list.
Then pwm_set_period() and pwm_set_polarity() will set random values for
period resp. polarity.
To fix this, save period and polarity when finding a new best match,
just like is done for chip (for the provider) and index.
This fixes the LCD backlight on r8a7740/armadillo-legacy, which was fed
period 0 and polarity -1068821144 instead of 33333 resp. 1.
Fixes: 3796ce1d4d ("pwm: add period and polarity to struct pwm_lookup")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The set of changes for this merge window contains two new drivers: one
for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs. The
remainder of the changes are the usual small cleanups such as removing
redundant OOM messages, signalling that a PWM chip's operations can
sleep and removing an unneeded dependency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT5LH8AAoJEN0jrNd/PrOhm1gQAKZUW7ueTT5Ar9cwBvWwtHSr
qLtTx0GxJ91cH6h2bNkhBLz3A2ps9KPcxWgDxfod4TyOHsqZmbAwVHZzORyxr3Hi
n5iQST0SpH/Qon5iptbJdmdeDOJ2MOvLU6YrlCO5XdGzJjVt1JeCXCuYZn1FG4IJ
rsZbvkp3w0U3BuRwq41FK2RqwlMp+6VkAjMd5gqLL8/AWnLGy+T5pLtADiOyNeBa
f9EDqrVXz0PwuLt7JXR2TktAVEv/vlGWKnmqYWGTEr45BDsxRVdV49QMnMIIjrPA
ohLKqYJgX5bU4XwHfbePLU/Jt8P1Kc+bdh4iTpMJSTEETdnMt0W9GdpwI+hKZThH
hZoALp9KBimIh/To8LnuSLeJ4NItkXelLZzzvGbX4wJSSBtA/CvG+1akyRnhE86m
Z5xp71tIBAQ45KHBz6sN95NTQirCLgbfReE7jo2xfAspqY8yUotorMoYdHz/gWMs
xX/x4BdcfYBd25YDYT6SwNLZ0uGwtwxnRvzNURmpLu6WY177cg50CgL32skxVvIJ
TlsQDVyQj8DcIb0GfevUk1X7EL6lYz2czjgpA2HvyNIXJRGJhm5+1iyTcaGOYQ4F
WsZj8GI8ECF/LYssa4tyrT2WW7MbHpXY1f4Qn3AD+XymtSQ6la8pPEh2YXBPWwvr
ep6Sbib+61h+mIMem25i
=ZE0j
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"The set of changes for this merge window contains two new drivers: one
for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs.
The remainder of the changes are the usual small cleanups such as
removing redundant OOM messages, signalling that a PWM chip's
operations can sleep and removing an unneeded dependency"
* tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: rockchip: Added to support for RK3288 SoC
pwm: rockchip: document RK3288 SoC compatible
pwm: sti: Remove PWM period table
pwm: sti: Sync between enable/disable calls
pwm: sti: Ensure same period values for all channels
pwm: sti: Fix PWM prescaler handling
pwm: sti: Supply Device Tree binding documentation for ST's PWM IP
pwm: sti: Add new driver for ST's PWM IP
pwm: imx: set can_sleep flag for imx_pwm
pwm: lpss: remove dependency on clk framework
pwm: pwm-tipwmss: remove unnecessary OOM messages
pwm: rockchip: document device tree bindings
pwm: add Rockchip SoC PWM support
This patch added to support the PWM controller found on
RK3288 SoC.
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Removes the PWM period table. Instead the prescaler is computed
from the period value passed in the config() function.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
ST PWM IP has a common enable/disable control for all the PWM
channels on a PWM cell. Disables PWM output on the PWM HW only
when disable is called for the last channel.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
ST PWM IP shares the same clock prescaler across all the PWM
channels. Hence configuration requests which change the period
will affect all the channels. Do not allow period changes which
will stomp period settings of the already configured channels.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch fixes the pwm driver to write the complete 8 bits of
the prescaler value to the PWM Control register.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This driver supports all current STi platforms' PWM IPs.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[thierry.reding: rename module to pwm-sti, fix build breakage]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The .config() hook imx_pwm_config() calls clk APIs like clk_prepare()
and clk_get_rate(), which might sleep, so we need to set can_sleep flag
on pwm_chip.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Unlike other Intel LPSS devices, the PWM does not have the
clock dividers or the gate. All we get from the clock is the
rate. Since PCI case uses the driver data to get the rate,
we can drop the clk and use the same data also in case of
ACPI. The frequency is the same.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message. The following
checkpatch warning is also removed.
WARNING: Possible unnecessary 'out of memory' message
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This commit adds a driver for the PWM controller found on Rockchip
RK29, RK30 and RK31 SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The Atmel PWM IP can be found on avr32 chips. This allows selecting and building
the driver on avr32.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The majority of these changes are cleanups and fixes across all drivers.
Redundant error messages are removed and more PWM controllers set the
.can_sleep flag to signal that they can't be used in atomic context.
Support is added for the Broadcom Kona family of SoCs and the Intel LPSS
driver can now probe PCI devices in addition to ACPI devices. Upon shut-
down, the pwm-backlight driver will now power off the backlight. It also
uses the new descriptor-based GPIO API for more concise GPIO handling.
A large chunk of these changes also converts platforms to use the lookup
mechanism rather than relying on the global number space to reference
PWM devices. This is largely in preparation for more unification and
cleanups in future patches. Eventually it will allow the legacy PWM API
to be removed.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJTl/AqAAoJEN0jrNd/PrOhoZsP/1yLaSK3NuBXWg3VdpH9i8so
GXBeh3dbKAmC5MYQlhh5XTvuNBbfOoSp6dGdL3pV9GjcffbqzTynn5YszrbanezX
+fqBF1NvW+jb2sUfQmedh9y30O1ADZM0p+FXW/R7e2khiE+8VF2ox35Hc3LLBqk8
SiZoy1UEzIo0BAHgtgCw2VXUYUSYX/KYGoF/t8TCCObKVC3wQ7pW5tN3Ekj14yNL
NspM0Q8OsITCQO0PdOfHw1gBmy4iLSuoNpPKP12BQVx5seZ4LBaIz9Wh0jFu89hq
zI1gFpGptMsxsaAn/zk6Nr9lHDkqxkhnuYA+dgkA6k0KI9jS1Me20WQEmvM9H9xs
BJ8QOfMQP7AHCZeW61J+iPTtCyMwFejRSPMtPjNMfaOQduWJw7+o0GaA30F39dw0
3Cki1C44o9KfwCdC9OcmLignHt5TC1FEJgJL4OY695x0za7XcVgEN6nTg70AQfaz
pcm4PeCqtM9jvXdJQdDGDI7gVzT33kpBnGatqQ2bUqMDx8HeHIkdEXehLwsYP46m
FX0RJb5ue40esbVWZDGYWJqkdInpHt6deahTW+Jq9Exo4ZMr5/DVkMQCl8oF3/em
Y5ED67dnAQ4au1MhElnDTPKk4Uh28aWTYwo8HSO6rt+8jcguH1KvXvLa+z2BcaMv
ZVN0ZPy2813ix6Q0yO3D
=BDxR
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"The majority of these changes are cleanups and fixes across all
drivers. Redundant error messages are removed and more PWM
controllers set the .can_sleep flag to signal that they can't be used
in atomic context.
Support is added for the Broadcom Kona family of SoCs and the Intel
LPSS driver can now probe PCI devices in addition to ACPI devices.
Upon shutdown, the pwm-backlight driver will now power off the
backlight. It also uses the new descriptor-based GPIO API for more
concise GPIO handling.
A large chunk of these changes also converts platforms to use the
lookup mechanism rather than relying on the global number space to
reference PWM devices. This is largely in preparation for more
unification and cleanups in future patches. Eventually it will allow
the legacy PWM API to be removed"
* tag 'pwm/for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (38 commits)
pwm: fsl-ftm: set pwm_chip can_sleep flag
pwm: ab8500: Fix wrong value shift for disable/enable PWM
pwm: samsung: do not set manual update bit in pwm_samsung_config
pwm: lp3943: Set pwm_chip can_sleep flag
pwm: atmel: set pwm_chip can_sleep flag
pwm: mxs: set pwm_chip can_sleep flag
pwm: tiehrpwm: inline accessor functions
pwm: tiehrpwm: don't build PM related functions when not needed
pwm-backlight: retrieve configured PWM period
leds: leds-pwm: retrieve configured PWM period
ARM: pxa: hx4700: use PWM_LOOKUP to initialize struct pwm_lookup
ARM: shmobile: armadillo: use PWM_LOOKUP to initialize struct pwm_lookup
ARM: OMAP3: Beagle: use PWM_LOOKUP to initialize struct pwm_lookup
pwm: modify PWM_LOOKUP to initialize all struct pwm_lookup members
ARM: pxa: hx4700: initialize all the struct pwm_lookup members
ARM: OMAP3: Beagle: initialize all the struct pwm_lookup members
pwm: renesas-tpu: remove unused struct tpu_pwm_platform_data
ARM: shmobile: armadillo: initialize all struct pwm_lookup members
pwm: add period and polarity to struct pwm_lookup
pwm: twl: Really disable twl6030 PWMs
...
The implementation of .config(), .enable() and .disable() operations in this
driver may sleep, thus set pwm_chip can_sleep flag.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Current code only works when pdev->id is 1. Fix it by passing correct
bit values to abx500_mask_and_set_register_interruptible().
Having DISABLE_PWM/ENABLE_PWM does not make the code more readable
because the bit values depend on pdev->id. Thus drop the DISABLE_PWM
and ENABLE_PWM defines.
This patch also removes an unnecessary return in ab8500_pwm_disable().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alexandre BOURDIOL <alexandre.bourdiol@st.com>
Acked-by: Philippe Begnic <philippe.begnic@st.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm_samsung_config() sets the manual update bit via a call to the
pwm_samsung_enable() function even when the channel is already running.
This causes noticable flicker on display if we try to change the
backlight brightness from minimum to maximum, continuously.
So, we remove the call to pwm_samsung_enable() from pwm_samsung_config
to avoid the flicker and this change doesn't harm normal working since
the pwm-backlight driver already calls pwm_samsung_enable() where
needed.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Read/write through I2C can sleep, thus set pwm_chip can_sleep flag.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
atmel_pwm_config() calls clk_get_rate() which might sleep, so we need to
set pwm_chip can_sleep flag.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The .config() calls clk_get_rate() which might sleep, so we need to set
pwm_chip can_sleep flag. Otherwise, we see the following warning when
using PWM driven heartbeat led.
WARNING: CPU: 0 PID: 0 at kernel/locking/mutex.c:856 mutex_trylock+0x184/0x1a4()
DEBUG_LOCKS_WARN_ON(in_interrupt())
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 3.14.0-rc5 #18
[<c0015420>] (unwind_backtrace) from [<c0012cb0>] (show_stack+0x10/0x14)
[<c0012cb0>] (show_stack) from [<c001daf8>] (warn_slowpath_common+0x6c/0x8c)
[<c001daf8>] (warn_slowpath_common) from [<c001dbac>] (warn_slowpath_fmt+0x30/0x40)
[<c001dbac>] (warn_slowpath_fmt) from [<c045df74>] (mutex_trylock+0x184/0x1a4)
[<c045df74>] (mutex_trylock) from [<c0360950>] (clk_prepare_lock+0xc/0xec)
[<c0360950>] (clk_prepare_lock) from [<c0362020>] (clk_get_rate+0xc/0x68)
[<c0362020>] (clk_get_rate) from [<c028d07c>] (mxs_pwm_config+0x20/0x198)
[<c028d07c>] (mxs_pwm_config) from [<c028bde8>] (pwm_config+0x60/0x70)
[<c028bde8>] (pwm_config) from [<c034b61c>] (__led_pwm_set+0x1c/0x3c)
[<c034b61c>] (__led_pwm_set) from [<c034bc3c>] (led_heartbeat_function+0x70/0x110)
[<c034bc3c>] (led_heartbeat_function) from [<c00292f0>] (call_timer_fn+0x7c/0x164)
[<c00292f0>] (call_timer_fn) from [<c00295c8>] (run_timer_softirq+0x1f0/0x260)
[<c00295c8>] (run_timer_softirq) from [<c002255c>] (__do_softirq+0xc4/0x2f0)
[<c002255c>] (__do_softirq) from [<c0022890>] (irq_exit+0xa4/0x10c)
[<c0022890>] (irq_exit) from [<c0010240>] (handle_IRQ+0x34/0x84)
[<c0010240>] (handle_IRQ) from [<c0013524>] (__irq_svc+0x44/0x54)
[<c0013524>] (__irq_svc) from [<c00107f8>] (arch_cpu_idle+0x40/0x48)
[<c00107f8>] (arch_cpu_idle) from [<c005deb8>] (cpu_startup_entry+0x70/0x198)
[<c005deb8>] (cpu_startup_entry) from [<c060aac8>] (start_kernel+0x2a8/0x2f8)
Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
These elementary functions should be inlined for fastest access. Also
fixes this warning as a side-effect (when no PM_SLEEP is selected):
drivers/pwm/pwm-tiehrpwm.c:141:12: warning: 'ehrpwm_read' defined but not used [-Wunused-function]
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Fixes following warnings on AM335X with no PM_SLEEP
drivers/pwm/pwm-tiehrpwm.c:534:13: warning: 'ehrpwm_pwm_save_context' defined but not used [-Wunused-function]
drivers/pwm/pwm-tiehrpwm.c:548:13: warning: 'ehrpwm_pwm_restore_context' defined but not used [-Wunused-function]
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The struct is not used anymore and the polarity initialization will be
done using the PWM lookup table (or device tree).
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add period and polarity members to struct pwm_lookup so that platforms
using the lookup table can be treated the same way as those using the
device tree.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Current twl6030_pwm_disable() implementation writes TWL6030_TOGGLE3_REG
twice, the second write sets TWL6030_PWMXEN bits so the PWM clock does
not disable.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwmchip_add() returns zero on success and a negative value on error,
so the condition of the check must be inverted.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Not all systems enumerate the PWM devices via ACPI. They can also be
exposed via the PCI interface.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add support for the six-channel Kona PWM controller found on Broadcom
mobile SoCs like bcm281xx.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
shiraz.hashim@st.com email-id doesn't exist anymore as he has left the
company. Replace ST's id with shiraz.linux.kernel@gmail.com.
It also updates .mailmap file to fix address for 'git shortlog'.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The legacy HAVE_PWM Kconfig symbol is finally being retired. Thanks a
lot to Sascha Hauer for doing that.
Three new drivers are added: Freescale FTM, Cirrus Logic CLPS711X and
Intel Low Power Subsystem.
An assortment of fixes and cleanups rounds things off for this release
cycle.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJTPmXoAAoJEN0jrNd/PrOhSacQAKNpqWHpFdFuhqpO6dvmqYj3
dvf6EDMnNaOS+TjbCvwP5awAiBhTbJRaTclP1lXXXOnzHvzeeYWhS2ESp4Yl8mRx
GRHj5OxmquaVPY5HN+6guVyCrgq4R2sxPU1P2VoPhhomhvP2VuEBbD/ddudC3e2k
/e9BuBhUB9eaur6d+vKX7Bnz09wf+ASobgIisjyyqSYysDgE82BAanX/knnLIyQL
RKCsz75w14rIxU/f8EML8EMnWiGINYpP+M/NGtPvcNBBOX9DkdzBvSvcbm+gS6ma
g2P+zsJgxhUpvvmzhqUumADUU8BWo/P1Y/6FQGRku6EmmJQQspTvDvOs1jCauouC
5vUA41Jwh+4+AKeNWN28tDlh9i5kKYdzYP5SeRcM9mW1SI7AIFmg62lxdus7ZnBB
e8UFd26kp/hZxXPdDVHtQi9y5Z5kn4axutVpbISuW5P9z1HF9bFOVHKQVlk7D6uz
EqqiYLdW/MxrmBq+v35biwx6afk3zJ8Qas/MmVIVTcLcLDTFLPEm4EawwcRZo8F3
Jh4p4IHxjEgLYcwVBNOe4ZBJg10fM1gmh18dDTyri759HE1mpi4/DwTGcv3iK4AU
njv4Q+qBq9QkY2ktw3qCkTDcwiM9jm+FHfdyKXeR5+CjfOf61/CF+N1jBQ8ZMrb7
XIRHle+mvL/RYpPDML/P
=pbF+
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"The legacy HAVE_PWM Kconfig symbol is finally being retired. Thanks a
lot to Sascha Hauer for doing that.
Three new drivers are added: Freescale FTM, Cirrus Logic CLPS711X and
Intel Low Power Subsystem.
An assortment of fixes and cleanups rounds things off for this release
cycle"
* tag 'pwm/for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: pxa: Constify OF match table
pwm: pxa: Fix typo "pwm" -> "PWM"
Revert "pwm: pxa: Use of_match_ptr()"
pwm: add support for Intel Low Power Subsystem PWM
pwm: Add CLPS711X PWM support
pwm: atmel: correct CDTY calculation
pwm: atmel: Fix polarity handling
Documentation: Add device tree bindings for Freescale FTM PWM.
pwm: Add Freescale FTM PWM driver support
pwm: pxa: Use of_match_ptr()
pwm: samsung: Use SIMPLE_DEV_PM_OPS macro
pwm: renesas-tpu: Add dependency on HAS_IOMEM
pwm: Remove obsolete HAVE_PWM Kconfig symbol
The table is never modified and all OF functions that use it take a
const struct of_device_id *.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This reverts commit 8468949cdd.
The OF match table dummy for non-OF configurations cannot be removed
because it is still used by the pxa_pwm_get_id_dt() function.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add support for Intel Low Power I/O subsystem PWM controllers found on
Intel BayTrail SoC.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Chew, Kean Ho <kean.ho.chew@intel.com>
Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add a new driver for the ARM CLPS711X Pulse Width Modulator (PWM) interface.
This CPU contain two 4-bit PWM outputs with constant period, based on CPU
PLL frequency. PWM polarity is determined by hardware by power on reset.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
From the datasheet, the actual duty cycle is:
(period - (1 / clk) * CDTY) / period
This actually correct the polarity of the PWM and solves the issue that
pwm-leds exhibits: when setting a duty cycle of 0 and then disabling a
channel, the level was wrong (1 when the polarity was normal and 0 when
the polarity was inversed).
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
When atmel_pwm_config() calculates and then sets the prescaler, it is
overwriting the channel's CMR register so we are losing the CPOL
configuration.
As atmel_pwm_config() is always called before enabling a channel,
inverting the polarity doesn't work.
Fix that by reading CMR first and only overwriting the prescaler bits.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The FTM PWM device can be found on Vybrid VF610 Tower and
Layerscape LS-1 SoCs.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use of_match_ptr(), because of_match_ptr() returns NULL pointer
when CONFIG_OF is disabled.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
On archs like S390 or um this driver cannot build nor work.
Make it depend on HAS_IOMEM to bypass build failures.
drivers/built-in.o: In function `tpu_probe':
drivers/pwm/pwm-renesas-tpu.c:421: undefined reference to `devm_ioremap_resource'
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Fix a memory leak in the lp3943_pwm_request_map() error handling path.
Make sure already allocated pwm map memory is freed correctly.
Detected by Coverity: CID 1162829.
Signed-off-by: Christian Engelmayer <cengelma@gmx.at>
Acked-by: Milo Kim <milo.kim@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The patches for this release cycle include various enhancements (device
tree support, better compile coverage, ...) for existing drivers. There
is a new driver for Atmel SoCs.
Various drivers as well as the sysfs support received minor fixes and
cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJS5m3bAAoJEN0jrNd/PrOhukQP/RdjGTUc8McrOt6pU20xKedI
Sg2HfA77ODWb1T8iigO31qOfCzEhtpl15AZ9kpj6sgLP17PQAlMBQWxQO9iHwRIv
GSGCW8RoWq1yvMImBn6LswR6a+aczsbI46z9kMvBGAsl58AETjR82dxH/nuJ6CVw
cTUIaysmnOhDCidPBSQ2JG/TrmAqhM1wmaixv/39LtIt3pFC5XKoj5rQqPlLKVrZ
r87ZvwKdoX9z87L1gDOxybGOhcKJOKU8Qc8MlQjYzIUzwd91V7fsGF+98RB7e1k2
+I/U0YYRFVfLIc2xxHtQZe80khhWTAOEkzvVOS7jgoXI41AlIlT6rOQnRCuMRniv
YfPTMAQDln+npDEZ4xgdB6qUHIUtduNm2sfL6hWox8xG3Z8Wk5b2IlyBx+kwhSwY
MiM6UZjuENi+XjO/Ea+oJtD6CJ+U48g++mrQhB+BY1IzmEmIeMH6Qut5I0grotjm
qgjw+hEoFL9lJ190OXM9Fxu8aoDcGCIWS/UtXTG8q+V/jBmMeBvqj2jscnrMsZXF
3CTpIquKIHe83A8CLdD0AXauE4TJ/8Eh0zY+jEJzBNDgIFkqZJPIVrmwPgMCFz5O
2Vux3WDxIqXDYJ1RjKeNGUFEfnRPa1PUqc2un9512xJkthXQD4EYE9/P+/MOVGXX
UJoi2MMv4Cmkbs+bMTns
=Rq3R
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"The patches for this release cycle include various enhancements
(device tree support, better compile coverage, ...) for existing
drivers. There is a new driver for Atmel SoCs.
Various drivers as well as the sysfs support received minor fixes and
cleanups"
* tag 'pwm/for-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: tiecap: Remove duplicate put_sync call
pwm: tiehrpwm: use dev_err() instead of pr_err()
pwm: pxa: remove unnecessary space before tabs
pwm: ep93xx: split module author names
pwm: use seq_puts() instead of seq_printf()
pwm: atmel-pwm: Do not unprepare clock after successful registration
of: Add Atmel PWM controller device tree binding
pwm: atmel-pwm: Add Atmel PWM controller driver
backlight: pwm_bl: Remove error message upon devm_kzalloc() failure
pwm: pca9685: depends on I2C rather than REGMAP_I2C
pwm: renesas-tpu: Enable driver compilation with COMPILE_TEST
pwm: jz4740: Use devm_clk_get()
pwm: jz4740: Pass device to clk_get()
pwm: sysfs: Convert to use ATTRIBUTE_GROUPS macro
pwm: pxa: Add device tree support
This is the other of the LP3943 MFD driver.
LP3943 can be used as a PWM generator, up to 2 channels.
* Two PWM generators supported
* Supported PWM operations
request, free, config, enable and disable
* Pin assignment
A driver data, 'pin_used' is checked when a PWM is requested.
If the output pin is already assigned, then returns as failure.
If the pin is available, 'pin_used' is set.
When the PWM is not used anymore, then it is cleared.
It is defined as unsigned long type for atomic bit operation APIs,
but only LSB 16bits are used because LP3943 has 16 outputs.
Signed-off-by: Milo Kim <milo.kim@ti.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Use dev_err() instead of pr_err() to provide a better message
to userspace.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Remove unnecessary space before tabs in order to fix the following
checkpatch warning.
WARNING: please, no space before tabs
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Split module author names in order to fix the following
checkpatch warning.
WARNING: quoted string split across lines
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
For a constant format without additional arguments, use seq_puts()
instead of seq_printf(). Also, the following checkpatch warning is
fixed.
WARNING: Prefer seq_puts to seq_printf
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
When the PWM controller is registered successfully, the clock can not
unprepare, so fix it.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add a PWM framework driver for the PWM controller found on Atmel SoCs.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[thierry.reding: coding style and other minor cleanups]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
REGMAP_I2C is not a visible config option.
Thus make PWM_PCA9685 depend on I2c and then select REGMAP_I2C.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Using the managed version of clk_get() makes the code a bit shorter and the
error paths less complicated.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
In preparation to switching the jz4740 clk driver to the common clk framework
make sure to pass the device to clk_get().
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use new ATTRIBUTE_GROUPS macro to reduce the number of lines of code.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch adds device tree support to the PXA's PWM driver. Nothing
needs to be extracted from the device tree node by the PWM device.
Client devices need only specify the period; the per-chip index is
implicitly zero because one device node must be present for each PWM
output in use. This approach is more convenient due to the wide
variability in the number of PWM channels present across the various PXA
variants, and is made possible by the fact that the register sets for
each PWM channel are segregated from each other. An of_xlate() method
is added to parse this single-cell node. The existing ID table is
reused for the match table data.
Tested on a Palm Treo 680 (both platform data and DT cases).
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
PWM channel data was set to NULL before freeing it. This caused the
following kernel warning while unexporting the channel. Set the channel
data to NULL after freeing it.
[ 70.495000] WARNING: CPU: 0 PID: 1 at drivers/base/devres.c:805 pwm_put+0x48/0x80()
[ 70.505000] Modules linked in:
[ 70.505000] CPU: 0 PID: 1 Comm: sh Not tainted 3.12.0-rc6-next-20131024-00012-gd4aec04-dirty #58
[ 70.515000] [<c0014ddc>] (unwind_backtrace+0x0/0xf4) from [<c0011784>] (show_stack+0x10/0x14)
[ 70.525000] [<c0011784>] (show_stack+0x10/0x14) from [<c03a3cbc>] (dump_stack+0x7c/0xb0)
[ 70.530000] [<c03a3cbc>] (dump_stack+0x7c/0xb0) from [<c001de68>] (warn_slowpath_common+0x6c/0x88)
[ 70.540000] [<c001de68>] (warn_slowpath_common+0x6c/0x88) from [<c001df20>] (warn_slowpath_null+0x1c/0x24)
[ 70.550000] [<c001df20>] (warn_slowpath_null+0x1c/0x24) from [<c01d1af8>] (pwm_put+0x48/0x80)
[ 70.560000] [<c01d1af8>] (pwm_put+0x48/0x80) from [<c01d21c8>] (pwm_unexport_store+0x94/0xac)
[ 70.565000] [<c01d21c8>] (pwm_unexport_store+0x94/0xac) from [<c010991c>] (sysfs_write_file+0x148/0x1d8)
[ 70.575000] [<c010991c>] (sysfs_write_file+0x148/0x1d8) from [<c00b2a80>] (vfs_write+0xb4/0x1a0)
[ 70.585000] [<c00b2a80>] (vfs_write+0xb4/0x1a0) from [<c00b3068>] (SyS_write+0x3c/0x78)
[ 70.595000] [<c00b3068>] (SyS_write+0x3c/0x78) from [<c000e2e0>] (ret_fast_syscall+0x0/0x30)
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Remove the non-standard EP93xx PWM driver in drivers/misc and add
a new driver for the PWM controllers on the EP93xx platform based
on the PWM framework.
These PWM controllers each support 1 PWM channel with programmable
duty cycle, frequency, and polarity inversion.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Since commit ab78029 (drivers/pinctrl: grab default handles from device core),
we can rely on device core for setting the default pins. Compile tested only.
Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13)
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The data structure of_match_ptr() protects is always compiled in.
Hence of_match_ptr() is not needed.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The data structure of_match_ptr() protects is always compiled in.
Hence of_match_ptr() is not needed.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The data structure of_match_ptr() protects is always compiled in.
Hence of_match_ptr() is not needed.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
'of_match_ptr' is defined in linux/of.h. Include it explicitly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
'of_match_ptr' is defined in linux/of.h. Include it explicitly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
'of_match_ptr' is defined in linux/of.h. Include it explicitly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
'of_match_ptr' is defined in linux/of.h. Include it explicitly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use the the tcb counter width to compute the maximum time that can be
represented using the slow clock source instead of the static 16 bit width.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Clock source changes are never applied to the CMR register.
This may lead to wrong period/duty cycle configuration.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This branch contains code cleanups, moves and removals for 3.12.
There's a large number of various cleanups, and a nice net removal of
13500 lines of code.
Highlights worth mentioning are:
- A series of patches from Stephen Boyd removing the ARM local timer API.
- Move of Qualcomm MSM IOMMU code to drivers/iommu.
- Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM driver
and switching over to the drivers/pwm one.
- Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM).
There's also a move of a header file out of include/linux/i2c/ to
platform_data, where it really belongs. It touches mostly ARM platform
code for include changes so we took it through our tree.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSKg/NAAoJEIwa5zzehBx3vxIP/19ouV4WrzOeEMz2Id8bYT5/
Tu9HRm+PJJ2O+4P+DYlycRAEHsbuDbwgdcqToH3quca1YnIcoJgY0FA6D0ihQ5uE
EvTgFIpkNMLnR43GYDOE3a/rR3hYPg5oQabKFn7ZGLG2ND3D3d2N05WT8XNbTYDk
nvCXvyRRT1ynCEzbxRBiE8x62ao4bqa5dZ1zrHHIEoakqciXEng8IU0nxx7SUarv
61GBJHVoGFpwOWXdgt2uxyXFbn6nMrhf33ynB+RRAZhqlrC8FROj8Iz+3EoKSAHc
fMJSw6jgdjMCfTDvi0j/eemoNC4fm0eP17Dz9WcwxtIrJPNFVrxZq+biDnpb49nM
IHsbNrILosw9AbHr3C0kTU9tp+Jie2cE1RWHqTIN3S3zb4qN+fIJiU6o6LMhsNP5
+ZxL4M5IYmvZYbU3a+A00TPwVRqBbsZB+et9RtYZsdpepovDiN4XcixEoT7ffqrt
VLjJyoX7Aqmds46lMdsdD3bpPkREmMdf8aMm5fvdIqwbJi1pFMMGMdTgN2WLG5aM
r0bj/DizxL7Brs8RHwOScUgXteZs3gg87v5Ns/3zAyJZvE4norPAiT+EJeXylpRO
LDqqaypFs75nU+mWLNo8Fzck4Xue55SBqx5Bo3aD/Smk8B6r4KMqnMKVsV5RFHAU
XfWb49HulUwHHdn5DAPx
=1vE4
-----END PGP SIGNATURE-----
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"This branch contains code cleanups, moves and removals for 3.12.
There's a large number of various cleanups, and a nice net removal of
13500 lines of code.
Highlights worth mentioning are:
- A series of patches from Stephen Boyd removing the ARM local timer
API.
- Move of Qualcomm MSM IOMMU code to drivers/iommu.
- Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM
driver and switching over to the drivers/pwm one.
- Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM).
There's also a move of a header file out of include/linux/i2c/ to
platform_data, where it really belongs. It touches mostly ARM
platform code for include changes so we took it through our tree"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
gpio: (gpio-pca953x) move header to linux/platform_data/
arm: zynq: hotplug: Remove unreachable code
ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
tegra: simplify use of devm_ioremap_resource
ARM: SAMSUNG: Remove plat/regs-timer.h header
ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
ARM: SAMSUNG: Remove pwm-clock infrastructure
ARM: SAMSUNG: Remove old PWM timer platform devices
pwm: Remove superseded pwm-samsung-legacy driver
ARM: SAMSUNG: Modify board files to use new PWM platform device
ARM: SAMSUNG: Rework private data handling in dev-backlight
pwm: Add new pwm-samsung driver
ARM: mach-mvebu: remove redundant DT parsing and validation
ARM: msm: Only compile io.c on platforms that use it
iommu/msm: Move mach includes to iommu directory
ARM: msm: Remove devices-iommu.c
ARM: msm: Move mach/board.h contents to common.h
ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE
ARM: msm: Remove TMR and TMR0 static mappings
...
Commit 76abbdde2d
pwm: Add sysfs interface
causes a kernel oops due to a null pointer dereference on PXA platforms.
This happens because the class added by the patch is registered in a
subsys_initcall (initcall4), but the pxa pwm driver is registered in
arch_initcall (initcall3). If the class is not registered before the
driver probe function runs, the oops occurs in device_add() when the
uninitialized pointers in struct class are dereferenced. I don't see a
reason that the driver must be an arch_initcall, so this patch makes it
a regular module_platform_driver (initcall6), preventing the oops.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
ecap_pwm_save_context() and ecap_pwm_restore_context() are only used
when CONFIG_PM_SLEEP is selected.
drivers/pwm/pwm-tiecap.c:293:13: warning: 'ecap_pwm_save_context' defined but not used [-Wunused-function]
drivers/pwm/pwm-tiecap.c:302:13: warning: 'ecap_pwm_restore_context' defined but not used [-Wunused-function]
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Remove unneeded error handling on the result of a call to
platform_get_resource when the value is passed to devm_ioremap_resource.
Move the call to platform_get_resource adjacent to the call to
devm_ioremap_resource to make the connection between them more clear.
A simplified version of the semantic patch that makes this change is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression pdev,res,n,e,e1;
expression ret != 0;
identifier l;
@@
- res = platform_get_resource(pdev, IORESOURCE_MEM, n);
... when != res
- if (res == NULL) { ... \(goto l;\|return ret;\) }
... when != res
+ res = platform_get_resource(pdev, IORESOURCE_MEM, n);
e = devm_ioremap_resource(e1, res);
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Specify DT bindings for the TPU PWM controller and add OF support to the
driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Don't redefine a PWM_SPEC_POLARITY macro with a value identical to
PWM_POLARITY_INVERTED, use the PWM DT macro directly.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
stmp_reset_block() may fail, so let's check its return value and
propagate it in the case of error.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch removes the now unused pwm-samsung-legacy driver, which was
replaced by new pwm-samsung driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mark Brown <broonie@linaro.org>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
This patch introduces new Samsung PWM driver, which is completely
rewritten to be multiplatform- and DeviceTree-aware.
In addition, remaining problems of old driver are fixed, such as:
- proper handling of hardware variants,
- synchronization on SMP systems,
- handling of boundary parameter values,
- hardware sharing with PWM clocksource driver,
- undefined state of PWM output after stopping PWM channel.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mark Brown <broonie@linaro.org>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
This patch renames the old pwm-samsung driver to pwm-samsung-legacy to
create place for the new, rewritten, DT-aware pwm-samsung driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mark Brown <broonie@linaro.org>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
The dev_attrs field of struct class is going away soon, dev_groups
should be used instead. This converts the PWM class code to use the
correct field.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Current code actually does not set MODE1_SLEEP bit because the new value for
bitmask (0x1) is wrong. To set MODE1_SLEEP bit, we should pass MODE1_SLEEP
as the new value for bitmask.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This driver can be built as module, add MODULE_ALIAS to make module auto loading
work.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
In case of error, the function devm_ioremap_resource() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should
be replaced with IS_ERR().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The Timer Pulse Unit (TPU) is a 4-channels 16-bit timer used to generate
waveforms. This driver exposes PWM functions through the PWM API for
other drivers to use.
The code is loosely based on the leds-renesas-tpu driver by Magnus Damm
and the TPU PWM driver shipped in the Armadillo EVA 800 kernel sources.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add a simple sysfs interface to the generic PWM framework.
/sys/class/pwm/
`-- pwmchipN/ for each PWM chip
|-- export (w/o) ask the kernel to export a PWM channel
|-- npwm (r/o) number of PWM channels in this PWM chip
|-- pwmX/ for each exported PWM channel
| |-- duty_cycle (r/w) duty cycle (in nanoseconds)
| |-- enable (r/w) enable/disable PWM
| |-- period (r/w) period (in nanoseconds)
| `-- polarity (r/w) polarity of PWM (normal/inversed)
`-- unexport (w/o) return a PWM channel to the kernel
Based on work by Lars Poeschel.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Rob Landley <rob@landley.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Some drivers don't set the .owner fields of the struct device_driver or
struct pwm_ops, which causes the module usage count to become wrong.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add pwm driver for the NXP pca9685 16 channel pwm-led controller.
The driver is really barebones at this stage. E.g. the OE' pin and
therefore the corresponding registers are not supported.
The driver was tested on a HW where this pin is tied to GND.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
[thierry.reding@gmail.com: style and whitespace cleanups]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The allocated object should be the size of what the pointer is pointing
to and not the size of the pointer itself.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
