Commit Graph

673 Commits

Author SHA1 Message Date
Bjorn Andersson
dfaf16014f arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware
Update the firmware-name of the remoteproc nodes to mimic the firmware
structure on other 845 devices.

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200302020757.551483-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-16 22:20:34 -07:00
Alex Elder
392a585583 arm64: dts: sdm845: add IPA information
Add IPA-related nodes and definitions to "sdm845.dtsi".

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20200313115237.10491-2-elder@linaro.org
[bjorn: Moved modem-init to cheza.dtsi]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-16 22:16:35 -07:00
Srinivas Kandagatla
89a32a4e76 arm64: dts: qcom: db845c: add analog audio support
This patch adds support to Analog audio via WSA881x speakers.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200312143024.11059-6-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:18:57 -07:00
Srinivas Kandagatla
606057bd89 arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s
Add pinctrl nodes required for QUAT I2S

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200312143024.11059-5-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:15:25 -07:00
Srinivas Kandagatla
45021d35fc arm64: dts: qcom: c630: Enable audio support
This patch add support to audio via WSA881x Speakers and Headset.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200312143024.11059-4-srinivas.kandagatla@linaro.org
[bjorn: Sorted nodes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:14:47 -07:00
Srinivas Kandagatla
3898fdc1c0 arm64: dts: qcom: sdm845: add apr nodes
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200312143024.11059-3-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:13:38 -07:00
Srinivas Kandagatla
27ca1de07d arm64: dts: qcom: sdm845: add slimbus nodes
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200312143024.11059-2-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:13:29 -07:00
Veerabhadrarao Badiganti
f4820fd37b arm64: dts: qcom: sc7180: Update reg names for SDHC
Remove the redundant _mem suffix for SDHC reg names.

For SDcard instance, no need supply reg names since hc reg map
is accessed with index. So remove reg names for SDcard.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/1583946863-24308-2-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-11 22:43:44 -07:00
Veerabhadrarao Badiganti
557a2aba5b arm64: dts: qcom: qcs404: Enable CQE support for eMMC
Enabling CQE support for eMMC by supplying the correct reg name
and flag which indicates CQE support.

Also remove the redundant _mem suffix for reg names.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Link: https://lore.kernel.org/r/1583946863-24308-1-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-11 22:43:43 -07:00
Srinivas Kandagatla
5bcdf1009f arm64: dts: msm8916: Add fastrpc node
Add fastrpc device node for adsp with one compute bank.

Tested-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200310175452.7503-1-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-11 17:54:32 -07:00
Venkata Narendra Kumar Gutta
60378f1a17 arm64: dts: qcom: sm8250: Add sm8250 dts file
Add sm8250 devicetree file for SM8250 SoC and SM8250 MTP platform.
This file adds the basic nodes like cpu, psci and other required
configuration for booting up to the serial console.

Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200310050910.506854-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-09 23:03:48 -07:00
Bjorn Andersson
3498d9c05f arm64: dts: qcom: msm8998-mtp: Disable funnel 4 and 5
Disable Coresight funnel 4 and 5, for now, as these causes the MTP to
crash when clock late_initcall disables unused clocks.

Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200308055445.1992189-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-09 12:52:06 -07:00
Srinivas Kandagatla
8d23a00404 arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes
This patch adds support UART0, I2C0, I2C1 and SPI0 available
on Low Speed expansion connector.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200305145344.14670-5-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-06 18:44:49 -08:00
Loic Poulain
4086e48084 arm64: dts: qcom: apq8016-sbc: Remove wrong regulator supply
As specified in the smd-rpm-regulator binding and confirmed by the
pm8616 device specification, there is no vdd_l5. l5 vdd comes from
vdd_l4_l5_l6. Fix that (though it does not cause any issue since
the supply is not requested).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1583516368-29593-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-06 17:04:33 -08:00
Rajeshwari
54c22ae53d arm64: dts: qcom: sc7180: Added critical trip point Thermal-zones node
To enable kernel critical shutdown feature added critical trip point to
all non CPU sensors to perform shutdown in orderly manner.

Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Rajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1583394547-12779-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:53:05 -08:00
Amit Kucheria
663b7d41d5 arm64: dts: qcom: msm8998: Fix cpu compatible
"arm,armv8" compatible should only be used for software models. Replace
it with the real cpu type.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/0535d640e9cd01887b5532f893ce4d61feca6d6d.1583445235.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:50:07 -08:00
Sibi Sankar
b21bb61d24 arm64: dts: qcom: sc7180: Add OSM L3 interconnect provider
Add Operation State Manager (OSM) L3 interconnect provider on SC7180 SoCs.

Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200227105632.15041-8-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:47:05 -08:00
Sibi Sankar
74f2659980 arm64: dts: qcom: sdm845: Add OSM L3 interconnect provider
Add Operation State Manager (OSM) L3 interconnect provider on SDM845 SoCs.

Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200227105632.15041-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:45:27 -08:00
Odelu Kukatla
b1b24dd7a6 arm64: dts: sc7180: Add interconnect provider DT nodes
Add the DT nodes for the network-on-chip interconnect buses found
on sc7180-based platforms.

Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Link: https://lore.kernel.org/r/1582646384-1458-4-git-send-email-okukatla@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:43:30 -08:00
Bjorn Andersson
27520210e8 arm64: dts: qcom: msm8996: Use generic QMP driver for UFS
With support for the MSM8996 UFS PHY added to the common QMP driver,
migrate the DTS to use the common QMP binding.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200125001234.435384-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:37:36 -08:00
Bjorn Andersson
950d3fb6fb arm64: dts: qcom: msm8996: Define parent clocks for gcc
The CLKREF clocks in GCC are parented by RPM_SMD_LN_BB_CLK, through the
CXO2 pad. Wire this up so that this is properly enabled when need by the
various PHYs.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200106080546.3192125-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-05 21:37:32 -08:00
David Dai
b303f9f005 arm64: dts: sdm845: Redefine interconnect provider DT nodes
Add the DT nodes for each of the Network-On-Chip interconnect
buses found on SDM845 based platform and redefine the rsc_hlos
child node as a bcm-voter device to better represent the hardware.

Reviewed-by: Evan Green <evgreen@chromium.org>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200209183411.17195-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-04 21:13:02 -08:00
Douglas Anderson
30162dce8b arm64: dts: sc7180: Add unit name to soc node
This is just like commit a1875bf982 ("arm64: dts: qcom: sdm845: Add
unit name to soc node") but for sc7180.

For reference, the warning being fixed was:
  Warning (unit_address_vs_reg): /soc:
  node has a reg or ranges property, but no unit name

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200304105638.1.I9ea0d337fcb927f52a28b20613b2377b6249c222@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-04 21:09:16 -08:00
Amit Kucheria
946f80074a arm64: dts: qcom: msm8996:: Add qcom,tsens-v2 to msm8996.dtsi compatible
The qcom-tsens binding requires a SoC-specific and a TSENS
family-specific binding to be specified in the compatible string.

Since them family-specific binding is not listed in the .dtsi file, we
see the following warnings in 'make dtbs_check'. Fix them.

/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4a9000: compatible: ['qcom,msm8996-tsens'] is not valid
under any of the given schemas (Possible causes of the failure):
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4a9000: compatible: ['qcom,msm8996-tsens'] is too short
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4a9000: compatible:0: 'qcom,msm8996-tsens' is not one of
['qcom,msm8916-tsens', 'qcom,msm8974-tsens']
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4a9000: compatible:0: 'qcom,msm8996-tsens' is not one of
['qcom,msm8976-tsens', 'qcom,qcs404-tsens']

/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4ad000: compatible: ['qcom,msm8996-tsens'] is not valid
under any of the given schemas (Possible causes of the failure):
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4ad000: compatible: ['qcom,msm8996-tsens'] is too short
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4ad000: compatible:0: 'qcom,msm8996-tsens' is not one of
['qcom,msm8916-tsens', 'qcom,msm8974-tsens']
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml:
thermal-sensor@4ad000: compatible:0: 'qcom,msm8996-tsens' is not one of
['qcom,msm8976-tsens', 'qcom,qcs404-tsens']

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/ebaa801adade53c567857db2f74af7d2e00f935b.1582871139.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-27 22:44:42 -08:00
Amit Kucheria
ef82b925e7 arm64: dts: qcom: msm8916:: Add qcom,tsens-v0_1 to msm8916.dtsi compatible
The qcom-tsens binding requires a SoC-specific and a TSENS
family-specific binding to be specified in the compatible string.

Since them family-specific binding is not listed in the .dtsi file, we
see the following warnings in 'make dtbs_check'. Fix them.

/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml:
thermal-sensor@4a9000: compatible: ['qcom,msm8916-tsens'] is not valid
under any of the given schemas (Possible causes of the failure):
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml:
thermal-sensor@4a9000: compatible: ['qcom,msm8916-tsens'] is too short
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml:
thermal-sensor@4a9000: compatible:0: 'qcom,msm8916-tsens' is not one of
['qcom,msm8976-tsens', 'qcom,qcs404-tsens']
/home/amit/work/builds/build-aarch64/arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml:
thermal-sensor@4a9000: compatible:0: 'qcom,msm8916-tsens' is not one of
['qcom,msm8996-tsens', 'qcom,msm8998-tsens', 'qcom,sdm845-tsens']

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/8cea8c0036703bcc4dd2b87a8ca3913c4a28d16e.1582871139.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-27 22:44:41 -08:00
Bjorn Andersson
0407fad060 arm64: dts: qcom: sdm845-mtp: Add Truly display
Bring in the Truly display and enable the DSI channels to make the
mdss/gpu probe, even though we're lacking LABIB, preventing us from
seeing anything on the screen.

Tested-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Link: https://lore.kernel.org/r/20190513210747.22429-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-27 22:27:57 -08:00
Sivaprakash Murugesan
5bf6356212 arm64: dts: ipq6018: Add a few device nodes
add i2c, spi, crypto, rng, watchdog, peripheral nodes, also add
support for wcss Q6 remoteproc driver and enable hw mutex, smem,
mailbox, smp2p and rpmsg drivers

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1582199446-29890-1-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-27 22:02:25 -08:00
Matthias Kaehlcke
058bd0a689 arm64: dts: sc7180: Move venus node to the correct position
Per convention device nodes for SC7180 should be ordered by address.
This is currently not the case for the venus node, move it to the
correct position.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20200227092649.v3.1.I15e0f7eff0c67a2b49d4992f9d80fc1d2fdadf63@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-27 21:59:56 -08:00
Stanimir Varbanov
1222783ecf arm64: dts: sdm845: follow venus-sdm845v2 DT binding
Move all pmdomain and clock resources to Venus DT node. And make
possible to support dynamic core assignment on v4.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Link: https://lore.kernel.org/r/20200106154929.4331-12-stanimir.varbanov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-27 21:58:42 -08:00
Harigovindan P
a3db7ad1af arm64: dts: sc7180: add display dt nodes
Add display, DSI hardware DT nodes for sc7180.

Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Co-developed-by: Kalyan Thota <kalyan_t@codeaurora.org>
Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Link: https://lore.kernel.org/r/1580825707-27115-1-git-send-email-harigovi@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Sandeep Maheswaram
129ff51d8e arm64: dts: qcom: sc7180: Correct qmp phy reset entries
The phy reset entries were incorrect.so swapped them.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Link: https://lore.kernel.org/r/1581506488-26881-5-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Dikshita Agarwal
2fefa8a169 arm64: dts: sc7180: Add Venus firmware subnode
This adds Venus firmware subnode for non-TZ platform.

Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org>
Link: https://lore.kernel.org/r/1579006416-11599-5-git-send-email-dikshita@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Dikshita Agarwal
0e4621a471 arm64: dts: sc7180: Add Venus video codec DT node
This adds Venus video codec DT node for sc7180.

Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org>
Link: https://lore.kernel.org/r/1579006416-11599-2-git-send-email-dikshita@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Rajendra Nayak
83e5e33eab arm64: dts: qcom: sc7180: Add CPU topology
SC7180 has 2 big cores and 6 LITTLE ones in a single cluster
with shared L3.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-3-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Rajendra Nayak
e7bb680f91 arm64: dts: qcom: sc7180: Add CPU capacity values
Specify the relative CPU capacity of all SC7180 cpu cores.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Rajendra Nayak
71f873169a arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients
Add dynamic power coefficients for Silver and Gold CPUs on
SC7180 SoC.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-1-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-25 20:52:55 -08:00
Sricharan R
1e8277854b arm64: dts: Add ipq6018 SoC and CP01 board support
Add initial device tree support for the Qualcomm IPQ6018 SoC and
CP01 evaluation board.

Co-developed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lore.kernel.org/r/1579439601-14810-5-git-send-email-sricharan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 21:06:24 -08:00
Taniya Das
e07f83544e arm64: dts: sc7180: Add clock controller nodes
Add the display, video & graphics clock controller nodes supported on
SC7180.

NOTE: the dispcc needs input clocks from various PHYs that aren't in
the device tree yet.  For now we'll leave these stubbed out with <0>,
which is apparently the magic way to do this.  These clocks aren't
really "optional" and this stubbing out method is apparently the best
way to handle it.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200203103049.v4.15.I1a4b93fb005791e29a9dcf288fc8bd459a555a59@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 21:03:03 -08:00
Douglas Anderson
af85ef13a5 arm64: dts: qcom: sdm845: Add the missing clock on the videocc
We're transitioning over to requiring the Qualcomm Video Clock
Controller to specify all the input clocks.  Let's add the one input
clock for the videocc for sdm845.

NOTE: Until the Linux driver for sdm845's video is updated, this clock
will not actually be used in Linux.  It will continue to use global
clock names to match things up.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200203103049.v4.14.Id0599319487f075808baba7cba02c4c3c486dc80@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 21:02:32 -08:00
Douglas Anderson
bb2bd9bffb arm64: dts: qcom: sdm845: Add missing clocks / fix names on the gpucc
We're transitioning over to requiring the Qualcomm GPU Clock
Controller to specify all the input clocks.  Let's add them for
sdm845.

As part of this we've decided that the xo clock should be referred to
in the bindings as "bi_tcxo".  Change the dts.

NOTE: Until the Linux driver for sdm845's gpucc is updated, these
clocks will not actually be used in Linux.  It will continue to use
global clock names to match things up.  Of course, Linux didn't use
the old "xo" clock anyway.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200203103049.v4.8.If8596faf02408cef4bb9f52296b911eb9ba49287@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 21:02:30 -08:00
Douglas Anderson
0997882f96 arm64: dts: qcom: sdm845: Add the missing clocks on the dispcc
We're transitioning over to requiring the Qualcomm Display Clock
Controller to specify all the input clocks.  Let's add them for
sdm845.

NOTES:
- Until the Linux driver for sdm845's dispcc is updated, these clocks
  will not actually be used in Linux.  It will continue to use global
  clock names to match things up.
- Although the clocks from the DP PHY are required, the DP PHY isn't
  represented in the dts yet.  Apparently the magic for this is just
  to use <0>.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200203103049.v4.3.Ie80fa74e1774f4317d80d70d30ef4b78f16cc8df@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 21:02:28 -08:00
Douglas Anderson
f8c8481341 arm64: dts: qcom: qcs404: Fix sdhci compat string
As per the bindings, the SDHCI controller should have a SoC-specific
compatible string in addition to the generic version-based one.  Add
it.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Fixes: 7241ab944d ("arm64: dts: qcom: qcs404: Add sdcc1 node")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200127082331.1.I402470e4a162d69fde47ee2ea708b15bde9751f9@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 20:55:13 -08:00
Christian Lamparter
297177a45b ARM64: dts: qcom: add gpio-ranges property
This patch adds the gpio-ranges property to almost all of
the Qualcomm ARM platforms that utilize the pinctrl-msm
framework.

The gpio-ranges property is part of the gpiolib subsystem.
As a result, the binding text is available in section
"2.1 gpio- and pin-controller interaction" of
Documentation/devicetree/bindings/gpio/gpio.txt

For more information please see the patch titled:
"pinctrl: msm: fix gpio-hog related boot issues" from
this series.

Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019]
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Tested-by: Robert Marko <robert.marko@sartura.hr> [ipq4019]
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20200108125455.308969-2-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 20:54:54 -08:00
Stephen Boyd
f855a9224f arm64: dts: qcom: pm6150: Add label to pwrkey node
Some platforms don't want to use the pmic power key as the power key
event. Add a label so platforms can easily reference and mark this node
as status = "disabled".

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Kiran Gunda <kgunda@codeaurora.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200115025314.3054-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 20:52:23 -08:00
Alexandre Courbot
48a0585b53 arm64: dts: qcom: add Venus firmware node on Cheza
Cheza boards require this node to probe, so add it.

Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Alexandre Courbot <acourbot@chromium.org>
Link: https://lore.kernel.org/r/20200108032623.113921-1-acourbot@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 20:51:23 -08:00
Bjorn Andersson
4a657c264b arm64: dts: qcom: db845c: Enable PCIe controllers
Enable the two PCIe controllers found on the Dragonboard845c.

Tested-by: Julien Massot <jmassot@softbankrobotics.com>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191107002247.1127689-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 16:11:22 -08:00
Bjorn Andersson
42ad231338 arm64: dts: qcom: sdm845: Add second PCIe PHY and controller
Add the second PCIe controller and the associated QHP PHY found on
SDM845.

Tested-by: Julien Massot <jmassot@softbankrobotics.com>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191107002247.1127689-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 16:11:18 -08:00
Bjorn Andersson
5c538e09cb arm64: dts: qcom: sdm845: Add first PCIe controller and PHY
Add the GEN2 PCIe controller and PHY found on SDM845.

Tested-by: Julien Massot <jmassot@softbankrobotics.com>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191107002247.1127689-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24 16:11:05 -08:00
Mathieu Poirier
ef71fdb266 arm64: dts: msm8916: Properly deal with ETMv4 power management
Properly deal with ETMv4 power management by adding the
"coresight-loses-context-with-cpu" property.  Otherwise tracer
configuration is lost when CPUs enter deep idle states, resulting
in the failure of the trace session.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200211183011.24720-1-mathieu.poirier@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-13 21:31:08 -08:00
Veerabhadrarao Badiganti
24254a8edf arm64: dts: qcom: sc7180: Add nodes for eMMC and SD card
Add sdhc instances for supporting eMMC and SD-card on sc7180.
The regulators should be in HPM state for proper functionality of
eMMC and SD-card. Updating corresponding regulators accordingly.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Link: https://lore.kernel.org/r/1578495250-10672-1-git-send-email-sbhanu@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-13 21:28:53 -08:00