Commit Graph

6644 Commits

Author SHA1 Message Date
Rob Herring
562bbb2335 clk: versatile: Only enable SP810 on 32-bit by default
While 64-bit Arm reference platforms have SP810 for clocks for SP804
timers, they are not needed since the arch timers are used instead.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-clk@vger.kernel.org
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-05 11:43:24 -05:00
Rob Herring
81134fb541 clk: versatile: Rework kconfig structure
CONFIG_COMMON_CLK_VERSATILE doesn't really do anything other than hiding
Arm Ltd reference platform clock drivers. It is both selected by the
platforms that need it and has a 'depends on' for those platforms. Let's
drop the selects and convert CONFIG_COMMON_CLK_VERSATILE into a
menuconfig entry. With this make CONFIG_ICST visible.

Move the 'select REGMAP_MMIO' to the drivers that require it (SP810 did
not).

This also has the side effect of enabling CONFIG_ICST for COMPILE_TEST
as it was not visible before.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-05 11:43:14 -05:00
Chunyan Zhang
ca6df49d62 clk: sprd: don't gate uart console clock
Don't gate uart1_eb which provides console clock, gating that clock would
make serial stop working if serial driver didn't enable that explicitly.

Fixes: 0e4b8a2349 ("clk: sprd: add clocks support for SC9863A")
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200408020234.31764-1-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-04-13 12:20:07 -07:00
Arnd Bergmann
742b50f9dc clk: mmp2: fix link error without mmp2
The newly added function is only built into the kernel if mmp2
is enabled, causing a link error otherwise.

arm-linux-gnueabi-ld: drivers/clk/mmp/clk.o: in function `mmp_register_pll_clks':
clk.c:(.text+0x6dc): undefined reference to `mmp_clk_register_pll'

Move it to a different file to get it to link.

Fixes: 5d34d0b32d ("clk: mmp2: Add support for PLL clock sources")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/20200408160518.2798571-1-arnd@arndb.de
Reported-by: Guenter Roeck <linux@roeck-us.net>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-04-13 12:20:06 -07:00
Arnd Bergmann
924ed1f5c1 clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo
The __clk_hw_register_fixed_rate_with_accuracy() function (with two '_')
does not exist, and apparently never did:

drivers/clk/clk-asm9260.c: In function 'asm9260_acc_init':
drivers/clk/clk-asm9260.c:279:7: error: implicit declaration of function '__clk_hw_register_fixed_rate_with_accuracy'; did you mean 'clk_hw_register_fixed_rate_with_accuracy'? [-Werror=implicit-function-declaration]
  279 |  hw = __clk_hw_register_fixed_rate_with_accuracy(NULL, NULL, pll_clk,
      |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      |       clk_hw_register_fixed_rate_with_accuracy
drivers/clk/clk-asm9260.c:279:5: error: assignment to 'struct clk_hw *' from 'int' makes pointer from integer without a cast [-Werror=int-conversion]
  279 |  hw = __clk_hw_register_fixed_rate_with_accuracy(NULL, NULL, pll_clk,
      |     ^

From what I can tell, __clk_hw_register_fixed_rate() is the correct
API here, so use that instead.

Fixes: 728e309674 ("clk: asm9260: Use parent accuracy in fixed rate clk")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/20200408155402.2138446-1-arnd@arndb.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-04-13 12:20:06 -07:00
Linus Torvalds
3476195651 There's not much to see in the core framework this time around. Instead the
majority of the diff is the normal collection of driver additions for new SoCs
 and non-critical clk data fixes and updates. The framework must be middle aged.
 
 The two biggest directories in the diffstat show that the Qualcomm and Unisoc
 support added a handful of big drivers for new SoCs but that's not really the
 whole story because those new drivers tend to add large numbers of lines of clk
 data. There's a handful of AT91 clk drivers added this time around too and a
 bunch of improvements to drivers like the i.MX driver. All around lots of
 updates and fixes in various clk drivers which is good to see.
 
 The core framework has only one real major change which has been baking in next
 for the past couple months. It fixes the framework so that it stops caching a
 clk's phase when the phase clk_op returns an error. Before this change we would
 consider some negative errno as a phase and that just doesn't make sense.
 
 Core:
  - Don't show clk phase when it is invalid
 
 New Drivers:
  - Add support for Unisoc SC9863A clks
  - Qualcomm SM8250 RPMh and MSM8976 RPM clks
  - Qualcomm SM8250 Global Clock Controller (GCC) support
  - Qualcomm SC7180 Modem Clock Controller (MSS CC) support
  - EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs
  - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and at91sam9g45 SoCs
 
 Updates:
  - GPU GX GDSC support on Qualcomm sc7180
  - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers
  - A series from Anson to convert i.MX8 clock bindings to json-schema
  - Update i.MX pll14xx driver to include new frequency entries for pll1443x table,
    and return error for invalid PLL type
  - Add missing of_node_put() call for a number of i.MX clock drivers
  - Drop flag CLK_IS_CRITICAL from 'A53_CORE' mux clock, as we already
    have the flag on its child cpu clock
  - Fix a53 cpu clock for i.MX8 drivers to get it source from ARM PLL
    via CORE_SEL slice, and source from A53 CCM clk root when we need to
    change ARM PLL frequency. Thus, we can support core running above
    1GHz safely
  - Update i.MX pfdv2 driver to check zero rate and use determine_rate for
    getting the best rate
  - Add CLKO2 for imx8mm, SNVS clock for imx8mn, and PXP clock for imx7d
  - Remove PMC clks from Tegra clk driver
  - Improved clock/reset handling for the Renesas R-Car USB2 Clock Selector
  - Conversion to json-schema of the Renesas CPG/MSSR DT bindings
  - Add Crypto clocks on Renesas R-Car M3-W/W+, M3-N, E3, and D3
  - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car H3, M3-W/W+, and M3-N
  - Update Amlogic audio clock gate hierarchy for meson8 and gxbb
  - Update Amlogic g12a spicc clock sources
  - Support for Ingenic X1000 TCU clks
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "There's not much to see in the core framework this time around.
  Instead the majority of the diff is the normal collection of driver
  additions for new SoCs and non-critical clk data fixes and updates.
  The framework must be middle aged.

  The two biggest directories in the diffstat show that the Qualcomm and
  Unisoc support added a handful of big drivers for new SoCs but that's
  not really the whole story because those new drivers tend to add large
  numbers of lines of clk data. There's a handful of AT91 clk drivers
  added this time around too and a bunch of improvements to drivers like
  the i.MX driver. All around lots of updates and fixes in various clk
  drivers which is good to see.

  The core framework has only one real major change which has been
  baking in next for the past couple months. It fixes the framework so
  that it stops caching a clk's phase when the phase clk_op returns an
  error. Before this change we would consider some negative errno as a
  phase and that just doesn't make sense.

  Core:
   - Don't show clk phase when it is invalid

  New Drivers:
   - Add support for Unisoc SC9863A clks
   - Qualcomm SM8250 RPMh and MSM8976 RPM clks
   - Qualcomm SM8250 Global Clock Controller (GCC) support
   - Qualcomm SC7180 Modem Clock Controller (MSS CC) support
   - EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs
   - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and
     at91sam9g45 SoCs

  Updates:
   - GPU GX GDSC support on Qualcomm sc7180
   - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers
   - A series from Anson to convert i.MX8 clock bindings to json-schema
   - Update i.MX pll14xx driver to include new frequency entries for
     pll1443x table, and return error for invalid PLL type
   - Add missing of_node_put() call for a number of i.MX clock drivers
   - Drop flag CLK_IS_CRITICAL from 'A53_CORE' mux clock, as we already
     have the flag on its child cpu clock
   - Fix a53 cpu clock for i.MX8 drivers to get it source from ARM PLL
     via CORE_SEL slice, and source from A53 CCM clk root when we need
     to change ARM PLL frequency. Thus, we can support core running
     above 1GHz safely
   - Update i.MX pfdv2 driver to check zero rate and use determine_rate
     for getting the best rate
   - Add CLKO2 for imx8mm, SNVS clock for imx8mn, and PXP clock for
     imx7d
   - Remove PMC clks from Tegra clk driver
   - Improved clock/reset handling for the Renesas R-Car USB2 Clock
     Selector
   - Conversion to json-schema of the Renesas CPG/MSSR DT bindings
   - Add Crypto clocks on Renesas R-Car M3-W/W+, M3-N, E3, and D3
   - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car H3, M3-W/W+, and
     M3-N
   - Update Amlogic audio clock gate hierarchy for meson8 and gxbb
   - Update Amlogic g12a spicc clock sources
   - Support for Ingenic X1000 TCU clks"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (146 commits)
  clk: sprd: fix to get a correct ibias of pll
  dt-bindings: imx8mm-clock: Fix the file path
  dt-bindings: imx8mq-clock: Fix the file path
  clk: qcom: rpmh: Drop unnecessary semicolons
  clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd()
  clk: tegra: Use NULL for pointer initialization
  clk: sprd: add clocks support for SC9863A
  clk: sprd: support to get regmap from parent node
  clk: sprd: Add macros for referencing parents without strings
  clk: sprd: Add dt-bindings include file for SC9863A
  dt-bindings: clk: sprd: add bindings for sc9863a clock controller
  dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific
  clk: sprd: add gate for pll clocks
  MAINTAINERS: dt: update reference for arm-integrator.txt
  clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks
  clk: mmp2: Add clock for fifth SD HCI on MMP3
  dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3
  clk: mmp2: Add clocks for the thermal sensors
  dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors
  clk: mmp2: add the GPU clocks
  ...
2020-04-05 10:43:32 -07:00
Linus Torvalds
854e80bcfd ARM: devicetree updates for v5.7
Most of the commits are for additional hardware support and minor fixes
 for existing machines for all the usual platforms: qcom, amlogic, at91,
 gemini, mediatek, ti, socfpga, i.mx, layerscape, uniphier, rockchip,
 exynos, ux500, mvebu, tegra, stm32, renesas, sunxi, broadcom, omap,
 and versatile.
 
 The conversion of binding files to machine-readable yaml format
 continues, along with fixes found during the validation.
 Andre Przywara takes over maintainership for the old Calxeda Highbank
 platform and provides a number of updates.
 
 The OMAP2+ platforms see a continued move from platform data into
 dts files, for many devices that relied on a mix of auxiliary data
 in addition to the DT description
 
 A moderate number of new SoCs and machines are added, here is a full
 list:
 
 - Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865
   (SM8250) is the current high-end phone chip, and IPQ6018 is a new
   WiFi-6 router chip.
 
 - Mediatek MT8516 application processor SoC for voice assistants, along
   with the "pumpkin" development board
 
 - NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an
   evaluation board.
 
 - Kontron "sl28" board family based on NXP LS1028A
 
 - Eleven variations of the new i.MX6 TechNexion Pico board, combining
   the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7
   SoM carriers
 
 - Three additional variants of the Toradex Colibri board family, all
   based on versions of the NXP i.MX7.
 
 - The Pinebook Pro laptop based on Rockchip RK3399
 
 - Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based on
   the ST-Ericsson u8500 platform
 
 - DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on
   STMicroelectronics stm32mp157
 
 - Renesas M3ULCB starter kit for R-Car M3-W+
 
 - Hoperun HiHope development board with Renesas RZ/G2M
 
 - Pine64 PineTab tablet and PinePhone phone, both based on Allwinner A64
 
 - Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner A20
 
 - PocketBook Touch Lux 3 ebook reader, based on Allwinner A13
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "Most of the commits are for additional hardware support and minor
  fixes for existing machines for all the usual platforms: qcom,
  amlogic, at91, gemini, mediatek, ti, socfpga, i.mx, layerscape,
  uniphier, rockchip, exynos, ux500, mvebu, tegra, stm32, renesas,
  sunxi, broadcom, omap, and versatile.

  The conversion of binding files to machine-readable yaml format
  continues, along with fixes found during the validation. Andre
  Przywara takes over maintainership for the old Calxeda Highbank
  platform and provides a number of updates.

  The OMAP2+ platforms see a continued move from platform data into dts
  files, for many devices that relied on a mix of auxiliary data in
  addition to the DT description

  A moderate number of new SoCs and machines are added, here is a full
  list:

   - Two new Qualcomm SoCs with their evaluation boards: Snapdragon 865
     (SM8250) is the current high-end phone chip, and IPQ6018 is a new
     WiFi-6 router chip.

   - Mediatek MT8516 application processor SoC for voice assistants,
     along with the "pumpkin" development board

   - NXP i.MX8M Plus SoC, a variant of the popular i.MX8M, along with an
     evaluation board.

   - Kontron "sl28" board family based on NXP LS1028A

   - Eleven variations of the new i.MX6 TechNexion Pico board, combining
     the "dwarf", "hobbit", "nymph" and "pi" baseboards with i.MX6/i.MX7
     SoM carriers

   - Three additional variants of the Toradex Colibri board family, all
     based on versions of the NXP i.MX7.

   - The Pinebook Pro laptop based on Rockchip RK3399

   - Samsung S7710 Galaxy Xcover 2, a 2013 vintage Android phone based
     on the ST-Ericsson u8500 platform

   - DH Electronics DHCOM SoM and PDK2 rev. 400 carrier based on
     STMicroelectronics stm32mp157

   - Renesas M3ULCB starter kit for R-Car M3-W+

   - Hoperun HiHope development board with Renesas RZ/G2M

   - Pine64 PineTab tablet and PinePhone phone, both based on Allwinner
     A64

   - Linutronix Testbox v2 for the Lamobo R1 router, based on Allwinner
     A20

   - PocketBook Touch Lux 3 ebook reader, based on Allwinner A13"

* tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (520 commits)
  ARM: dts: ux500: Fix missing node renames
  arm64: dts: Revert "specify console via command line"
  MAINTAINERS: Update Calxeda Highbank maintainership
  arm: dts: calxeda: Group port-phys and sgpio-gpio items
  arm: dts: calxeda: Fix interrupt grouping
  arm: dts: calxeda: Provide UART clock
  arm: dts: calxeda: Basic DT file fixes
  arm64: dts: specify console via command line
  ARM: dts: at91: sama5d27_wlsom1_ek: add USB device node
  ARM: dts: gemini: Add thermal zone to DIR-685
  ARM: dts: gemini: Rename IDE nodes
  ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes
  arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes
  arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node
  arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADC
  arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0
  arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADC
  arm64: dts: ti: k3-am65: Add clocks to dwc3 nodes
  arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node
  arm64: dts: khadas-vim3: add SPIFC controller node
  ...
2020-04-03 15:22:05 -07:00
Stephen Boyd
28ecaf1c30 Merge branches 'clk-unisoc', 'clk-tegra', 'clk-qcom' and 'clk-imx' into clk-next
- Add support for Unisoc SC9863A clks
 - GPU GX GDSC support on Qualcomm sc7180
 - Qualcomm SM8250 RPMh and MSM8976 RPM clks
 - Qualcomm SM8250 Global Clock Controller (GCC) support
 - Qualcomm SC7180 Modem Clock Controller (MSS CC) support

* clk-unisoc:
  clk: sprd: fix to get a correct ibias of pll
  clk: sprd: add clocks support for SC9863A
  clk: sprd: support to get regmap from parent node
  clk: sprd: Add macros for referencing parents without strings
  clk: sprd: Add dt-bindings include file for SC9863A
  dt-bindings: clk: sprd: add bindings for sc9863a clock controller
  dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific
  clk: sprd: add gate for pll clocks

* clk-tegra:
  clk: tegra: Use NULL for pointer initialization
  clk: tegra: Remove audio clocks configuration from clock driver
  clk: tegra: Remove tegra_pmc_clk_init along with clk ids
  clk: tegra: Remove CLK_M_DIV fixed clocks
  clk: tegra: Fix Tegra PMC clock out parents
  clk: tegra: Add Tegra OSC to clock lookup
  clk: tegra: Add support for OSC_DIV fixed clocks
  dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
  dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
  dt-bindings: tegra: Convert Tegra PMC bindings to YAML
  dt-bindings: clock: tegra: Add IDs for OSC clocks

* clk-qcom: (21 commits)
  clk: qcom: rpmh: Drop unnecessary semicolons
  clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd()
  clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
  ipq806x: gcc: Added the enable regs and mask for PRNG
  clk: qcom: Add modem clock controller driver for SC7180
  clk: qcom: gcc: Add support for modem clocks in GCC
  dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings
  clk: qcom: clk-rpm: add missing rpm clk for ipq806x
  clk: qcom: gcc: Add global clock controller driver for SM8250
  dt-bindings: clock: Add SM8250 GCC clock bindings
  clk: qcom: clk-alpha-pll: Add support for controlling Lucid PLLs
  clk: qcom: clk-alpha-pll: Refactor trion PLL
  clk: qcom: clk-alpha-pll: Use common names for defines
  dt-bindings: clock: rpmcc: Document msm8976 compatible
  clk: qcom: smd: Add support for MSM8976 rpm clocks
  clk: qcom: clk-rpmh: Wait for completion when enabling clocks
  clk: qcom: rpmh: Add support for RPMH clocks on SM8250
  dt-bindings: clock: Add RPMHCC bindings for SM8250
  clk: qcom: alpha-pll: Make error prints more informative
  clk: qcom: gpucc: Add support for GX GDSC for SC7180
  ...

* clk-imx: (43 commits)
  dt-bindings: imx8mm-clock: Fix the file path
  dt-bindings: imx8mq-clock: Fix the file path
  clk: imx: clk-gate2: Pass the device to the register function
  clk: imx7d: Add PXP clock
  clk: imx8mq: A53 core clock no need to be critical
  clk: imx8mp: A53 core clock no need to be critical
  clk: imx8mm: A53 core clock no need to be critical
  clk: imx8mn: A53 core clock no need to be critical
  clk: imx: pllv4: use prepare/unprepare
  clk: imx: pfdv2: determine best parent rate
  clk: imx: pfdv2: switch to use determine_rate
  clk: imx: Fix division by zero warning on pfdv2
  clk: imx: clk-sscg-pll: Drop unnecessary initialization
  clk: imx: pll14xx: Return error if pll type is invalid
  clk: imx: imx8mp: fix a53 cpu clock
  clk: imx: imx8mn: fix a53 cpu clock
  clk: imx: imx8mm: fix a53 cpu clock
  clk: imx: imx8mq: fix a53 cpu clock
  clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock
  clk: imx8mn: Remove unused includes
  ...
2020-04-03 15:10:19 -07:00
Stephen Boyd
53a2cc5cc3 Merge branches 'clk-ti', 'clk-ingenic', 'clk-typo', 'clk-at91', 'clk-mmp2' and 'clk-arm-icst' into clk-next
- EHRPWM's TimeBase clock(TBCLK) for TI AM654 SoCs
 - Support PMC clks on at91sam9n12, at91rm9200, sama5d3, and at91sam9g45 SoCs
 - Fixes and improvements for the Marvell MMP2/MMP3 SoC clk drivers

* clk-ti:
  clk: keystone: Add new driver to handle syscon based clocks
  dt-bindings: clock: Add binding documentation for TI EHRPWM TBCLK

* clk-ingenic:
  clk: ingenic/TCU: Fix round_rate returning error
  clk: ingenic/jz4770: Exit with error if CGU init failed
  clk: JZ4780: Add function for enable the second core.
  clk: Ingenic: Add support for TCU of X1000.

* clk-typo:
  clk: Fix trivia typo in comment exlusive => exclusive

* clk-at91:
  clk: at91: add at91rm9200 pmc driver
  clk: at91: add at91sam9n12 pmc driver
  clk: at91: add sama5d3 pmc driver
  clk: at91: add at91sam9g45 pmc driver
  clk: at91: usb: introduce num_parents in driver's structure
  clk: at91: usb: use proper usbs_mask
  clk: at91: sam9x60: fix usb clock parents
  clk: at91: usb: continue if clk_hw_round_rate() return zero
  clk: at91: sam9x60: Don't use audio PLL

* clk-mmp2:
  clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks
  clk: mmp2: Add clock for fifth SD HCI on MMP3
  dt-bindings: marvell,mmp2: Add clock id for the fifth SD HCI on MMP3
  clk: mmp2: Add clocks for the thermal sensors
  dt-bindings: marvell,mmp2: Add clock ids for the thermal sensors
  clk: mmp2: add the GPU clocks
  dt-bindings: marvell,mmp2: Add clock ids for the GPU clocks
  clk: mmp2: Add PLLs that are available on MMP3
  dt-bindings: marvell,mmp2: Add clock ids for MMP3 PLLs
  clk: mmp2: Check for MMP3
  dt-bindings: clock: Add MMP3 compatible string
  clk: mmp2: Stop pretending PLL outputs are constant
  clk: mmp2: Add support for PLL clock sources
  dt-bindings: clock: Convert marvell,mmp2-clock to json-schema
  clk: mmp2: Constify some strings
  clk: mmp2: Remove a unused prototype

* clk-arm-icst:
  MAINTAINERS: dt: update reference for arm-integrator.txt
  clk: versatile: Add device tree probing for IM-PD1 clocks
  clk: versatile: Export icst_clk_setup()
  dt-bindings: clock: Create YAML schema for ICST clocks
2020-04-03 15:09:55 -07:00
Stephen Boyd
2d11e9a1fd Merge branches 'clk-phase-errors', 'clk-amlogic', 'clk-renesas' and 'clk-allwinner' into clk-next
- Don't show clk phase when it is invalid

* clk-phase-errors:
  clk: rockchip: fix mmc get phase
  clk: Fix phase init check
  clk: Bail out when calculating phase fails during clk registration
  clk: Move rate and accuracy recalc to mostly consumer APIs
  clk: Use 'parent' to shorten lines in __clk_core_init()
  clk: Don't cache errors from clk_ops::get_phase()

* clk-amlogic:
  clk: meson: meson8b: set audio output clock hierarchy
  clk: meson: g12a: add support for the SPICC SCLK Source clocks
  dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs
  clk: meson: gxbb: set audio output clock hierarchy
  clk: meson: gxbb: add the gxl internal dac gate
  dt-bindings: clk: meson: add the gxl internal dac gate

* clk-renesas:
  dt-bindings: clock: renesas: cpg-mssr: Convert to json-schema
  clk: renesas: rcar-usb2-clock-sel: Add reset_control
  clk: renesas: rcar-usb2-clock-sel: Add multiple clocks management
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add power-domains and resets properties
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix clock[-name]s properties
  clk: renesas: Remove use of ARCH_R8A7795
  clk: renesas: r8a77965: Add RPC clocks
  clk: renesas: r8a7796: Add RPC clocks
  clk: renesas: r8a7795: Add RPC clocks
  clk: renesas: rcar-gen3: Add CCREE clocks

* clk-allwinner:
  clk: sunxi-ng: sun8i-de2: Sort structures
  clk: sunxi-ng: sun8i-de2: Add R40 specific quirks
  clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T
  clk: sunxi-ng: sun8i-de2: Don't reuse A83T resets
  clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate core
  clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64
  clk: sunxi-ng: sun8i-de2: Split out H5 definitions
  clk: sunxi-ng: a64: Export MBUS clock
2020-04-03 15:09:32 -07:00
Stephen Boyd
ea0a1fb716 Merge branches 'clk-samsung', 'clk-formatting', 'clk-si5341' and 'clk-socfpga' into clk-next
* clk-samsung:
  clk: samsung: Remove redundant check in samsung_cmu_register_one

* clk-formatting:
  clk: Fix continuation of of_clk_detect_critical()

* clk-si5341:
  clk, clk-si5341: Support multiple input ports

* clk-socfpga:
  clk: socfpga: stratix10: simplify parameter passing
  clk: stratix10: use do_div() for 64-bit calculation
2020-04-03 15:09:22 -07:00
Linus Torvalds
0e8fb69f28 ARM: SoC updates
The code changes are mostly for 32-bit platforms and include:
 
 - Lots of updates for the Nvidia Tegra platform, including
   cpuidle, pmc, and dt-binding changes
 
 - Microchip at91 power management updates for the recently added
   sam9x60 SoC
 
 - Treewide setup_irq deprecation by afzal mohammed
 
 - STMicroelectronics stm32 gains earlycon support
 
 - Renesas platforms with Cortex-A9 can now use the global timer
 
 - Some TI OMAP2+ platforms gain cpuidle support
 
 - Various cleanups for the i.MX6 and Orion platforms, as well as
   Kconfig files across all platforms
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "The code changes are mostly for 32-bit platforms and include:

   - Lots of updates for the Nvidia Tegra platform, including cpuidle,
     pmc, and dt-binding changes

   - Microchip at91 power management updates for the recently added
     sam9x60 SoC

   - Treewide setup_irq deprecation by afzal mohammed

   - STMicroelectronics stm32 gains earlycon support

   - Renesas platforms with Cortex-A9 can now use the global timer

   - Some TI OMAP2+ platforms gain cpuidle support

   - Various cleanups for the i.MX6 and Orion platforms, as well as
     Kconfig files across all platforms"

* tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
  ARM: qcom: Add support for IPQ40xx
  ARM: mmp: replace setup_irq() by request_irq()
  ARM: cns3xxx: replace setup_irq() by request_irq()
  ARM: spear: replace setup_irq() by request_irq()
  ARM: ep93xx: Replace setup_irq() by request_irq()
  ARM: iop32x: replace setup_irq() by request_irq()
  arm: mach-dove: Mark dove_io_desc as __maybe_unused
  ARM: orion: replace setup_irq() by request_irq()
  ARM: debug: stm32: add UART early console support for STM32MP1
  ARM: debug: stm32: add UART early console support for STM32H7
  ARM: debug: stm32: add UART early console configuration for STM32F7
  ARM: debug: stm32: add UART early console configuration for STM32F4
  cpuidle: tegra: Disable CC6 state if LP2 unavailable
  cpuidle: tegra: Squash Tegra114 driver into the common driver
  cpuidle: tegra: Squash Tegra30 driver into the common driver
  cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
  ARM: tegra: cpuidle: Remove unnecessary memory barrier
  ARM: tegra: cpuidle: Make abort_flag atomic
  ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
  ARM: tegra: Make outer_disable() open-coded
  ...
2020-04-03 15:02:35 -07:00
Arnd Bergmann
8bdbf16908 Merge branch 'arm/late' into arm/dt
Include originally "late" updates for OMAP and Qualcomm,
now that it's not late any more.

* arm/late: (122 commits)
  ARM: OMAP2+: Drop legacy platform data for ti81xx edma
  ARM: dts: Configure interconnect target module for ti816x edma
  ARM: dts: Configure interconnect target module for dm814x tptc3
  ARM: dts: Configure interconnect target module for dm814x tptc2
  ARM: dts: Configure interconnect target module for dm814x tptc1
  ARM: dts: Configure interconnect target module for dm814x tptc0
  ARM: dts: Configure interconnect target module for dm814x tpcc
  ARM: OMAP2+: Drop legacy platform data for dm814x cpsw
  ARM: dts: Configure interconnect target module for dm814x cpsw
  clk: ti: Fix dm814x clkctrl for ethernet
  arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware
  arm64: dts: sdm845: add IPA information
  arm64: dts: qcom: db845c: add analog audio support
  arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s
  arm64: dts: qcom: c630: Enable audio support
  arm64: dts: qcom: sdm845: add apr nodes
  arm64: dts: qcom: sdm845: add slimbus nodes
  arm64: dts: qcom: sc7180: Update reg names for SDHC
  arm64: dts: qcom: qcs404: Enable CQE support for eMMC
  arm64: dts: msm8916: Add fastrpc node
  ...
2020-04-03 22:45:37 +02:00
Chunyan Zhang
39d1c90665 clk: sprd: fix to get a correct ibias of pll
The current driver is getting a wrong ibias index of pll clocks from
number 1. This patch fix that issue, then getting ibias index from 0.

Fixes: 3e37b00558 ("clk: sprd: add adjustable pll support")
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200330021640.14133-1-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-04-02 18:07:58 -07:00
Leonard Crestez
8400ab8896 clk: imx: Align imx sc clock parent msg structs to 4
The imx SC api strongly assumes that messages are composed out of
4-bytes words but some of our message structs have odd sizeofs.

This produces many oopses with CONFIG_KASAN=y.

Fix by marking with __aligned(4).

Fixes: 666aed2d13 ("clk: imx: scu: add set parent support")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lkml.kernel.org/r/aad021e432b3062c142973d09b766656eec18fde.1582216144.git.leonard.crestez@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-25 18:46:05 -07:00
Leonard Crestez
a0ae04a256 clk: imx: Align imx sc clock msg structs to 4
The imx SC api strongly assumes that messages are composed out of
4-bytes words but some of our message structs have odd sizeofs.

This produces many oopses with CONFIG_KASAN=y.

Fix by marking with __aligned(4).

Fixes: fe37b48204 ("clk: imx: add scu clock common part")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lkml.kernel.org/r/10e97a04980d933b2cfecb6b124bf9046b6e4f16.1582216144.git.leonard.crestez@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-25 18:45:59 -07:00
Stephen Boyd
751d792343 clk: qcom: rpmh: Drop unnecessary semicolons
Some functions end in }; which is just bad style. Remove the extra
semicolon.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20200309221232.145630-3-sboyd@kernel.org
2020-03-24 19:35:02 -07:00
Stephen Boyd
2cf7a4cbcb clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd()
This function has some duplication in unlocking a mutex and returns in a
few different places. Let's use some if statements to consolidate code
and make this a bit easier to read.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
CC: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20200309221232.145630-2-sboyd@kernel.org
2020-03-24 19:35:00 -07:00
Stephen Boyd
ba0eb9d57a clk: tegra: Use NULL for pointer initialization
This silences a sparse warning about using a plain integer instead of
NULL for a pointer.

Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-24 19:14:12 -07:00
Chunyan Zhang
0e4b8a2349 clk: sprd: add clocks support for SC9863A
Add the list of clocks for the Unisoc SC9863A, along with clock
initialization.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200304072730.9193-8-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-24 19:03:57 -07:00
Chunyan Zhang
f95e8c7923 clk: sprd: support to get regmap from parent node
Some SC9863a clock nodes would be the child of a syscon node, clocks can
use the regmap of syscon device directly for this kind of cases.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200304072730.9193-7-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-24 19:03:57 -07:00
Chunyan Zhang
ea8ca3109d clk: sprd: Add macros for referencing parents without strings
With the new clk parenting code, clk_init_data was expanded to include
.parent_hws and .parent_data, for clk drivers to specify parents without
name strings of clocks.

Also some macros were added for using these two items to reference
clock parents. Based on that to expand macros for sprd clocks:

- SPRD_*_DATA, take an array of struct clk_parent_data * as its parents
  which should be a combination of .fw_name (devicetree clock-names),
  .hw (pointers to a local struct clk_hw).

- SPRD_*_HW, take a local struct clk_hw pointer, instead of a string, as
  its parent.

- SPRD_*_FW_NAME, take a string of clock-names decleared in the device
  tree as the clock parent.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200304072730.9193-6-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-24 19:03:57 -07:00
Xiaolong Zhang
187e5cd2d1 clk: sprd: add gate for pll clocks
Some sprd's gate clocks are used to the switch of pll, which
need to wait a certain time for stable after being enabled.

Signed-off-by: Xiaolong Zhang <xiaolong.zhang@unisoc.com>
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200304072730.9193-2-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-24 19:03:56 -07:00
Lubomir Rintel
de17be999c clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks
They were reversed because I read the datasheet upside down.
Actually there is no datasheet, but I ended up understanding the
comments in Open Firmware driver wrong.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-18-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:41 -07:00
Lubomir Rintel
54198276ba clk: mmp2: Add clock for fifth SD HCI on MMP3
There's one extra SDHCI on MMP3, used by the internal SD card on OLPC
XO-4. Add a clock for it.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-17-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:40 -07:00
Lubomir Rintel
82d59c382c clk: mmp2: Add clocks for the thermal sensors
The register definitions gotten from OLPC Open Firmware.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-15-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:40 -07:00
Lubomir Rintel
bfa851b60c clk: mmp2: add the GPU clocks
MMP2 has a single GC860 core while MMP3 has a GC2000 and a GC300.
On both platforms there's an AXI bus interface clock that's common for
all GPUs and each GPU core has a separate clock.

Meaning of the relevant APMU_GPU bits were gotten from James Cameron's
message and [1], the OLPC OS kernel source [2] and Marvell's MMP3 tree.

[1] http://lists.laptop.org/pipermail/devel/2019-April/039053.html
[2] http://dev.laptop.org/git/olpc-kernel/commit/arch/arm/mach-mmp/mmp2.c?h=arm-3.0-wip&id=8ce9f6122

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-13-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:40 -07:00
Lubomir Rintel
a70812b188 clk: mmp2: Add PLLs that are available on MMP3
There are more PLLs on MMP3 and are configured slightly differently.
Tested on a MMP3-based Dell Wyse 3020 machine.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-10-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:32 -07:00
Lubomir Rintel
391bbbd2b2 clk: mmp2: Check for MMP3
The MMP3's are similar enough to MMP2, but there are differencies, such
are more clocks available on the newer model. We want to tell which
platform are we on.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-8-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:32 -07:00
Lubomir Rintel
ea56ad6026 clk: mmp2: Stop pretending PLL outputs are constant
The hardcoded values for PLL1 and PLL2 are wrong. PLL1 is slightly
off -- it defaults to 797.33 MHz, not 800 MHz. PLL2 is disabled by default,
but also configurable.

Tested on a MMP2-based OLPC XO-1.75 laptop, with PLL1=797.33 and various
values of PLL2 set via set-pll2-520mhz, set-pll2-910mhz and
set-pll2-988mhz Open Firmware words.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-6-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:31 -07:00
Lubomir Rintel
5d34d0b32d clk: mmp2: Add support for PLL clock sources
The clk-of-mmp2 driver pretends that the clock outputs from the PLLs are
constant, but in fact they are configurable.

Add logic for obtaining the actual clock rates on MMP2 as well as MMP3.
There is no documentation for either SoC, but the "systemsetting" drivers
from Marvell GPL code dump provide some clue as far as MPMU registers on
MMP2 [1] and MMP3 [2] go.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp2_systemsetting.c
[2] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp3_systemsetting.c

A separate commit will adjust the clk-of-mmp2 driver.

Tested on a MMP3-based Dell Wyse 3020 as well as MMP2-based OLPC
XO-1.75 laptop.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-5-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:31 -07:00
Lubomir Rintel
cb8dbfe831 clk: mmp2: Constify some strings
All the parent clock names for the muxes are constant. Add const.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-3-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:30 -07:00
Lubomir Rintel
b3296386c5 clk: mmp2: Remove a unused prototype
There is no mmp_clk_register_pll2() routine.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-2-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:19:30 -07:00
Alexandre Belloni
02ff48e4d7 clk: at91: add at91rm9200 pmc driver
Add a driver for the PMC clocks of the at91rm9200.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lkml.kernel.org/r/20200214145934.53648-1-alexandre.belloni@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 18:18:58 -07:00
Linus Walleij
84655b762a clk: versatile: Add device tree probing for IM-PD1 clocks
As we want to move these clocks over to probe from the device
tree we add a device tree probing path.

The old platform data path will be deleted once we have the
device tree overall code in place.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lkml.kernel.org/r/20200219103326.81120-3-linus.walleij@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:55:31 -07:00
Linus Walleij
eb9d6428a7 clk: versatile: Export icst_clk_setup()
Export this clock setup method so we can register the
IM-PD1 clocks with common code in the next step.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lkml.kernel.org/r/20200219103326.81120-2-linus.walleij@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:55:31 -07:00
Andy Shevchenko
a37a5a9d71 clk: Fix trivia typo in comment exlusive => exclusive
Fix trivia typo in comment exlusive => exclusive.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lkml.kernel.org/r/20200310135507.87959-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:12:48 -07:00
Paul Cercueil
edcc42945d clk: ingenic/TCU: Fix round_rate returning error
When requesting a rate superior to the parent's rate, it would return
-EINVAL instead of simply returning the parent's rate like it should.

Fixes: 4f89e4b8f1 ("clk: ingenic: Add driver for the TCU clocks")
Cc: stable@vger.kernel.org
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lkml.kernel.org/r/20200213161952.37460-2-paul@crapouillou.net
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:08:40 -07:00
Paul Cercueil
c067b46d73 clk: ingenic/jz4770: Exit with error if CGU init failed
Exit jz4770_cgu_init() if the 'cgu' pointer we get is NULL, since the
pointer is passed as argument to functions later on.

Fixes: 7a01c19007 ("clk: Add Ingenic jz4770 CGU driver")
Cc: stable@vger.kernel.org
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lkml.kernel.org/r/20200213161952.37460-1-paul@crapouillou.net
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:08:40 -07:00
Vignesh Raghavendra
1aa0817e43 clk: keystone: Add new driver to handle syscon based clocks
On TI's AM654/J721e SoCs, certain clocks can be gated/ungated by setting
a single bit in SoC's System Control Module registers. Sometime more
than one clock control can be in the same register.

Add a driver to support such clocks using syscon framework. Driver
currently supports controlling EHRPWM's TimeBase clock(TBCLK) for AM654
SoC.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lkml.kernel.org/r/20200227053529.16479-3-vigneshr@ti.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:07:21 -07:00
周琰杰 (Zhou Yanjie)
6673db4f3f clk: JZ4780: Add function for enable the second core.
Add "jz4780_core1_enable()" for enable the second core of JZ4780,
prepare for later commits.

Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Link: https://lkml.kernel.org/r/1582215889-113034-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:02:03 -07:00
周琰杰 (Zhou Yanjie)
dc6a81c338 clk: Ingenic: Add support for TCU of X1000.
X1000 has a different TCU, since X1000 OST has been independent of TCU.
This patch is add TCU support of X1000, and prepare for later OST driver.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lkml.kernel.org/r/1584457893-40418-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 17:01:38 -07:00
Wesley Cheng
8411aa5059 clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150
This adds the USB3 PIPE clock and GDSC structures, so
that the USB driver can vote for these resources to be
enabled/disabled when required.  Both are needed for SS
and HS USB paths to operate properly.  The GDSC will
allow the USB system to be brought out of reset, while
the PIPE clock is needed for data transactions between
the PHY and controller.

Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Link: https://lkml.kernel.org/r/1584478412-7798-2-git-send-email-wcheng@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 16:33:56 -07:00
Abhishek Sahu
1aec193ea4 ipq806x: gcc: Added the enable regs and mask for PRNG
Kernel got hanged while reading from /dev/hwrng at the
time of PRNG clock enable

Fixes: 24d8fba44a "clk: qcom: Add support for IPQ8064's global clock controller (GCC)"
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lkml.kernel.org/r/20200318131657.345-1-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 16:29:02 -07:00
Taniya Das
8def929c40 clk: qcom: Add modem clock controller driver for SC7180
Add support for the modem clock controller found on SC7180
based devices. This would allow modem drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1584596131-22741-4-git-send-email-tdas@codeaurora.org
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 16:28:05 -07:00
Taniya Das
253a0af508 clk: qcom: gcc: Add support for modem clocks in GCC
Add the required modem clocks in global clock controller which are
required to bring the modem out of reset.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1584596131-22741-3-git-send-email-tdas@codeaurora.org
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-20 16:28:02 -07:00
Tony Lindgren
1bf4b15b19 clk: ti: Fix dm814x clkctrl for ethernet
We are missing alwon ethernet clock for dm814x and this prevents us
from probing the CPSW with device tree only data. Looks like Ethernet
currently only works if it has been enabled in the bootloader.

Looks like relying on the bootloader clocks is not an issue with the
mainline kernel currently, but it will be an issue when configuring
CPSW Ethernet to probe with device tree data only as we will be managing
the clocks.

Fixes: 26ca2e9738 ("clk: ti: dm814: add clkctrl clock data")
Cc: linux-clk@vger.kernel.org
Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-17 09:45:24 -07:00
Tony Lindgren
5f3d9b07b9 clk: ti: am43xx: Fix clock parent for RTC clock
Currently enabling clkctrl clock on am4 can fail for RTC as the clock
parent is wrong for RTC.

Fixes: 76a1049b84 ("clk: ti: am43xx: add new clkctrl data for am43xx")
Signed-off-by: Tony Lindgren <tony@atomide.com>
Link: https://lkml.kernel.org/r/20200221171030.39326-1-tony@atomide.com
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-16 11:28:05 -07:00
Stephen Boyd
7aaec82fef i.MX clock fixes for 5.6, round 2:
- A couple of fixes on i.MX8MP clock driver to correct HDMI_AXI and
    ENET_QOS_ROOT parent clock.
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Merge tag 'imx-clk-fixes-5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-fixes

Pull a few more i.MX clk fixes for 5.6:

 - A couple of fixes on i.MX8MP clock driver to correct HDMI_AXI and
   ENET_QOS_ROOT parent clock

* tag 'imx-clk-fixes-5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx8mp: Correct the enet_qos parent clock
  clk: imx8mp: Correct IMX8MP_CLK_HDMI_AXI clock parent
2020-03-16 11:26:05 -07:00
Abel Vesa
b5881e8019 clk: imx: clk-gate2: Pass the device to the register function
The device needs to be passed on to the clk_hw_register.

Fixes: 1f9aec9662 ("clk: imx: clk-gate2: Switch to clk_hw based API")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 09:38:30 +08:00