For a given ir and fs, there is at most one possible match for the case
mclk_ratios[ir][j].ratio * fs == freq.
Thus we can break from the inner loop once a match is found.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The existence of this parameter is purely historical. None of the CODEC drivers
uses it and we always pass in the same value anyway, so it should be safe to
remove it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Commit 1ee46ebd("ASoC: Make the DAI ops constant in the DAI structure")
introduced the possibility to have constant DAI ops structures, yet this is
barley used in both existing drivers and also new drivers being submitted,
although none of them modifies its DAI ops structure. The later is not
surprising since existing drivers are often used as templates for new drivers.
So this patch just constifies all existing snd_soc_dai_ops structs to eliminate
the issue altogether.
The patch was generated with the following coccinelle semantic patch:
// <smpl>
@@
identifier ops;
@@
-struct snd_soc_dai_ops ops =
+const struct snd_soc_dai_ops ops =
{ ... };
// </smpl>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sta32x resets and loses all configuration during ESD test.
Work around by polling the CONFA register once a second
and restore all coeffcients and registers when CONFA
changes unexpectedly.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add a structure for platform specific configuration and use it,
thereby removing a few FIXMEs which marked hard-coded values.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The coefficient RAM must be saved in a shadow so it can
be restored when the codec is powered on using
regulator_bulk_enable().
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
Chip documentation explicitly requires that the reset values
of reserved register bits are left untouched.
codec->hw_read is broken now.
Here we use below trick to avoid writing to reserved registers while resume.
Write the register default value to cache for reserved registers,
so the write to the these registers are suppressed by the cache
restore code when it skips writes of default registers.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch includes below small fixes:
1. Move sta32x_set_bias_level() from sta32x_i2c_remove() to sta32x_remove().
2. Remove a redundant regulator_bulk_free() call in sta32x_i2c_remove(),
as we will call regulator_bulk_free() in sta32x_remove().
3. Remove unneeded snd_soc_codec_set_drvdata(codec, NULL) in sta32x_i2c_remove.
The i2c core will set the clientdata to NULL.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Johannes Stezenbach <js@sig21.net>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
There is exactly one match or no match at all during the for loop iteration,
thus we can break from the for loop once a match is found.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Chip documentation explicitly requires that the reset values
of reserved register bits are left untouched. It is possible
there are differences between STA326 and STA328 or future
chip revisions in these bits, and clobbering them might
cause malfunction.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The STA32x has a number of preset EQ settings, but also
allows full user control of the biquad filter coeffcients
(when "Automode EQ" is set to "User").
Each biquad has five signed, 24bit, fixed-point coefficients
representing the range -1...1. The five biquad coefficients
can be uploaded in one atomic operation into on-chip
coefficient RAM.
There are also a few prescale, postscale and mixing
coefficients, in the same numeric format and range
(a negative coefficient inverts phase).
These coefficients are made available as SNDRV_CTL_ELEM_TYPE_BYTES
mixer controls.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Johannes Stezenbach <js@sig21.net>
[zonque@gmail.com: transform to new ASoC structure]
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
