Commit Graph

24 Commits

Author SHA1 Message Date
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Max Filippov
3863c58cc7 xtensa: move S32C1I self-test to a separate file
The test is not called from any of the setup functions, so there's no
reason keeping it in the setup.c. Move it to s32c1i_selftest.c and drop
related #include directives.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-11-16 15:08:28 -08:00
Max Filippov
c91e02bd97 xtensa: support hardware breakpoints/watchpoints
Use perf framework to manage hardware instruction and data breakpoints.
Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to
query and set instruction and data breakpoints.
Address bit 0 choose instruction (0) or data (1) break register, bits
31..1 are the register number.
Both calls transfer two 32-bit words: address (0) and control (1).
Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
'trigger on load, bits 29..0 are length. Length 0 is used to clear a
breakpoint. To set a breakpoint length must be a power of 2 in the range
1..64 and the address must be length-aligned.

Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug
exception is raised by the kernel code accessing watched userspace
address and disable corresponding data breakpoint. On exit to userspace
check that flag and, if set, restore all data breakpoints.

Handle debug exceptions raised with PS.EXCM set. This may happen when
window overflow/underflow handler or fast exception handler hits data
breakpoint, in which case save and disable all data breakpoints,
single-step faulting instruction and restore data breakpoints.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:32 +00:00
Max Filippov
816aa58895 xtensa: remove remaining non-functional KGDB bits
KGDB is not supported on xtensa, but there are bits of related code
under arch/xtensa/kernel. Remove these bits.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:32 +00:00
Max Filippov
ab45fb1450 xtensa: fix secondary core boot in SMP
There are multiple factors adding to the issue in different
configurations:

- commit 17290231df ("xtensa: add fixup for double exception raised
  in window overflow") added function window_overflow_restore_a0_fixup to
  double exception vector overlapping reset vector location of secondary
  processor cores.
- on MMUv2 cores RESET_VECTOR1_VADDR may point to uncached kernel memory
  making code overlapping depend on cache type and size, so that without
  cache or with WT cache reset vector code overwrites double exception
  code, making issue even harder to detect.
- on MMUv3 cores RESET_VECTOR1_VADDR may point to unmapped area, as
  MMUv3 cores change virtual address map to match MMUv2 layout, but
  reset vector virtual address is given for the original MMUv3 mapping.
- physical memory region of the secondary reset vector is not reserved
  in the physical memory map, and thus may be allocated and overwritten
  at arbitrary moment.

Fix it as follows:

- move window_overflow_restore_a0_fixup code to .text section.
- define RESET_VECTOR1_VADDR so that it points to reset vector in the
  cacheable MMUv2 map for cores with MMU.
- reserve reset vector region in the physical memory map. Drop separate
  literal section and build mxhead.S with text section literals.

Cc: <stable@vger.kernel.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-11-03 17:19:38 +03:00
Max Filippov
895fb31592 xtensa: improve vmlinux.lds.S sed post-processing
Current sed script makes assumptions about the structure of rules that
group .text sections in the vmlinux linker script. These assumptions
get broken occasionally, e.g.: 779c88c94c "ARM: 8321/1: asm-generic:
introduce.text.fixup input section", or 9bebe9e5b0 "kbuild: Fix
.text.unlikely placement".

Rewrite sed rules so that they don't depend on number/arrangement of text
sections in *(...) blocks.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-20 15:28:42 +00:00
Max Filippov
9bd46da45e xtensa: implement counting and sampling perf events
Xtensa Performance Monitor Module has up to 8 32 bit wide performance
counters. Each counter may be enabled independently and can count any
single type of hardware performance events. Event counting may be enabled
and disabled globally (per PMM).
Each counter has status register with bits indicating if the counter has
been overflown and may be programmed to raise profiling IRQ on overflow.
This IRQ is used to rewind counters and allow for counting more than 2^32
samples for counting events and to report samples for sampling events.

For more details see Tensilica Debug User's Guide, chapter 8
"Performance monitor module".

Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-17 07:33:30 +03:00
Guenter Roeck
834a316eee xtensa: Fix fix linker script transformation for .text / .text.fixup
Commit 779c88c94c ("ARM: 8321/1: asm-generic: introduce .text.fixup
input section") introduced a new .text.fixup section which is merged
with .text at link time. This causes xtensa builds to fail with lots
of error messages similar to the following.

lib/lib.a(kobject.o): In function `kobject_create':
(.text+0x498): dangerous relocation: l32r: literal placed after use:
				     (.literal+0x150)

Linker script transformation needs to be updated to detect and handle
the new section.

Fixes: 779c88c94c ("ARM: 8321/1: asm-generic: introduce .text.fixup
		     input section")
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Chris Zankel <chris@zankel.net>
2015-04-10 07:31:21 +00:00
Max Filippov
f615136c06 xtensa: add SMP support
This is largely based on SMP code from the xtensa-2.6.29-smp tree by
Piet Delaney, Marc Gauthier, Joe Taylor, Christian Zankel (and possibly
other Tensilica folks).

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2014-01-14 10:19:58 -08:00
Max Filippov
478ba61afc xtensa: add static function tracer support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08 01:18:57 -07:00
Max Filippov
3e4196a5cc xtensa: add stacktrace support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:10 -07:00
Max Filippov
e85e335f8f xtensa: add MMU v3 support
MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB
way 6:

Way 6 (512 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0x00000000  0x00000000  0x01  0x03 RWX Bypass
        0x20000000  0x20000000  0x01  0x03 RWX Bypass
        0x40000000  0x40000000  0x01  0x03 RWX Bypass
        0x60000000  0x60000000  0x01  0x03 RWX Bypass
        0x80000000  0x80000000  0x01  0x03 RWX Bypass
        0xa0000000  0xa0000000  0x01  0x03 RWX Bypass
        0xc0000000  0xc0000000  0x01  0x03 RWX Bypass
        0xe0000000  0xe0000000  0x01  0x03 RWX Bypass

This patch adds remapping code at the reset vector or at the kernel
_start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that
reconfigures MMUv3 as MMUv2:

Way 5 (128 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0xd0000000  0x00000000  0x01  0x07 RWX WB
        0xd8000000  0x00000000  0x01  0x03 RWX Bypass
Way 6 (256 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0xe0000000  0xf0000000  0x01  0x07 RWX WB
        0xf0000000  0xf0000000  0x01  0x03 RWX Bypass

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Chris Zankel
c4c4594b00 xtensa: clean up files to make them code-style compliant
Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
d38efc1f15 xtensa: adopt generic io routines
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-03 15:11:42 -07:00
Max Filippov
f6a03a12ec xtensa: fix linker script transformation for .text.unlikely
Now that binutils generate *.unlikely sections which don't follow
documented (info as) literal section naming rules, section name
transformation script doesn't work well resulting in the following
errors at vmlinux link time:

	main.c:(.text.unlikely+0x3): dangerous relocation: l32r: literal
				     placed after use: .literal.unlikely

Fix section name transformation script by adding specific rule for
.text.unlikely sections.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-03 15:11:04 -07:00
Thomas Gleixner
e4d5962192 xtensa: Use generic init_task
Same code. Use the generic version.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Chris Zankel <chris@zankel.net>
Link: http://lkml.kernel.org/r/20120503085035.804059531@linutronix.de
2012-05-05 13:00:26 +02:00
Chris Zankel
ed5010ea46 xtensa: Fix linker script patch-up
The Xtensa architecture requires to patch the generated linker script
to insert precede certain sections with a .literal section. Ammend the
sed script to fix-up only sequences that start with a '*':
'*(.init.text)' -> '*(.init.literal .init.text)'

Signed-off-by: Chris Zankel <chris@zankel.net>
2010-05-01 23:00:07 -07:00
Sam Ravnborg
51b563fc93 arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0
Albin Tonnerre <albin.tonnerre@free-electrons.com> reported:

    Bash 4 filters out variables which contain a dot in them.
    This happends to be the case of CPPFLAGS_vmlinux.lds.
    This is rather unfortunate, as it now causes
    build failures when using SHELL=/bin/bash to compile,
    or when bash happens to be used by make (eg when it's /bin/sh)

Remove the common definition of CPPFLAGS_vmlinux.lds by
pushing relevant stuff to either Makefile.build or the
arch specific kernel/Makefile where we build the linker script.

This is also nice cleanup as we move the information out where
it is used.

Notes for the different architectures touched:

arm - we use an already exported symbol
cris - we use a config symbol aleady available
       [Not build tested]
mips - the jiffies complexity has moved to vmlinux.lds.S where we need it.
       Added a few variables to CPPFLAGS - they are only used by
       the linker script.
       [Not build tested]
powerpc - removed assignment that is not needed
          [not build tested]
sparc - simplified it using $(BITS)
um - introduced a few new exported variables to deal with this
xtensa - added options to CPP invocation
         [not build tested]

Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2009-09-20 12:28:22 +02:00
Chris Zankel
78f3cdfa2a xtensa: Fix linker script to include .literal sections
Fix resembles implementation from Marc Gauthier and Piet Denaly:

In the Xtensa architecture, assembly generates literals which must always
precede the code (the L32R instruction that loads them only uses negative
PC-relative offsets).  For any *.text section, literals are placed in a
corresponding *.literal section.  The linker script (vmlinux.lds) must
place these in the correct order.  It must also combine them, when the
*.text section can be larger than L32R's 256 kB range.

For example, this doesn't work:  *(.literal) *(.text) because L32R
instructions at the end of .text can't reach the literals.

The linker can solve this if they are combined in parentheses, like this:
       *(.literal .text)
because it is now allowed mix literals in .text to bring them in range.

None of this is done by standard vmlinux.lds.h macros such as TEXT_TEXT
and INIT_TEXT.  To avoid replicating the logic of that header file, we
instead post-process the generated linker script to convert *(xxx.text)
to *(xxx.literal xxx.text) for the following text sections:
       .text .ref.text .*init.text .*exit.text .text.*
using a sed script.  To do this we must override the default rule for
vmlinux.lds (see scripts/Makefile.build and the top-level Makefile)
to insert this extra step.

Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Pete Delaney <piet@tensilica.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2009-05-11 23:40:33 -07:00
Matthew Wilcox
64ac24e738 Generic semaphore implementation
Semaphores are no longer performance-critical, so a generic C
implementation is better for maintainability, debuggability and
extensibility.  Thanks to Peter Zijlstra for fixing the lockdep
warning.  Thanks to Harvey Harrison for pointing out that the
unlikely() was unnecessary.

Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
2008-04-17 10:42:34 -04:00
Chris Zankel
787a22d1d2 [XTENSA] Move string-io functions to io.c from pci.c
The string-io functions (outs{bwl}, ins{bwl}) are independent from
the PCI option and should be in a separate file.

Signed-off-by: Chris Zankel <chris@zankel.net>
2007-08-27 13:53:22 -07:00
Chris Zankel
73089cbfdf [XTENSA] Move pre-initialized structures to init_task.c
Move all initialization structures for the initial task to it's own file.

Signed-off-by: Chris Zankel <chris@zankel.net>
2007-08-27 13:53:12 -07:00
Chris Zankel
1c0350bd0c [PATCH] Xtensa: Add ktermios and minor filename fix
The kernel termios (ktermios) changes were somehow missed for Xtensa.  This
patch adds the ktermios structure and also includes some minor file name
fix that was missed in the syscall patch.

Signed-off-by: Chris Zankel <chris@zankel.net>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-13 09:05:50 -08:00
Chris Zankel
5a0015d626 [PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3
The attached patches provides part 3 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-24 00:05:21 -07:00