The local end of each SMD channel is responsible for updating the tx
head and the rx tail, as such we should not touch the tx tail during a
reset.
Reported-by: Jeremy McNicoll <jmcnicol@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
By representing each edge as its own device the channels are no longer
tied to being parented by the same smd device and as such an edge can
live as children of e.g. remoteproc instances.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The code exectued by the interrupt handler depends on the values parsed
after requesting the irq, just to be save we should therefor move the
request_irq() call to be done after parsing the properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Multi-channel clients split between several drivers need a way to close
individual channels, as these drivers might be removed individually.
With this in place the responsibility of closing additionally opened
channels to the client as well only concerning smd about the primary
channel.
With this approach we will only trigger removal of SMD devices based on
the state of the primary channel, however we get in sync with how rpmsg
works.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
If we fail to get the hwspinlock due to probe defer, we shouldn't
print an error message. Just be silent in this case.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we merge
through arm-soc for historical reasons, is also sizable this time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXnm1XAAoJEIwa5zzehBx35lcP/ApuQarIXeZCQZtjlUBV9McW
o3o7FhKFHePmEPeoYCvVeK5D8NykTkQv3WpnCknoxPJzxGJF7jbPWQJcVnXfKOXD
kTcyIK15WL2HHtSE3lYyLfyUPz8AbJyRt0l0cxgcg6jvo+uzlWooNz1y78rLIYzg
UwRssj7OiHv4dsyYRHZIsjnB8gMWw8rYMk154gP2xy6MnNXXzzOVVnOiVqxSZBm+
EgIIcROMOqkkHuFlClMYKluIgrmgz1Ypjf+FuAg7dqXZd+TGRrmGXeI7SkGThfLu
nyvY3N18NViNu7xOUkI9zg7+ifyYM8Si9ylalSICSJdIAxZfiwFqFaLJvVWKU1rY
rBOBjKckQI0/X9WYusFNFHcijhIFV8/FgGAnVRRMPdvlCss7Zp03C9mR4AEhmKMX
rLG49x81hU1C+LftC59ml3iB8dhZrrRkbxNHjLFHVGWNrKMrmJKa8JhXGRAoNM+u
LRauiuJZatqvLfISNvpfcoW2EashVoU3f+uC8ymT3QCyME3wZm0t7T4tllxhMfBl
sOgJqNkTKDmPLofwm/dASiLML7ZF1WePScrFyOACnj9K4mUD+OaCnowtWoQPu0eI
aNmT84oosJ2S9F/iUDPtFHXdzQ+1QPPfSiQ9FXMoauciVq/2F+pqq68yYgqoxFOG
vmkmG2YM4Wyq43u0BONR
=O8+y
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we
merge through arm-soc for historical reasons, is also sizable this
time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits)
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
soc: raspberrypi-power: add CONFIG_OF dependency
firmware: scpi: add CONFIG_OF dependency
video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip
input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip
pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
serial: clps711x: Changing the compatibility string to match with the smallest supported chip
irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip
clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip
clk: clps711x: Changing the compatibility string to match with the smallest supported chip
...
1. Fix size of allocation for Exynos SROM registers (too much was allocated).
2. Constify fix.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXg8EAAAoJEME3ZuaGi4PXH2kP/im4hf/QbZ6+CCjAJilbg9kn
QcvWdSQorhSPXo8WlbV1cM7RIEsZSs/GIEILEmK+CdGaFcFzzGugB96BceQR0Pkw
HQY8QbVn2YduvePYa5LXafKNEsZKRwrRknhJw0WYDbrXGaDXfWURpZVNedz7w3CS
DJDzVEw7JSYjhpeWOqg7fY9T5mZwInZhBhSJZ9FHTk3URioEX7dY+jBzLlQqfzdZ
KFEhYFY3lOHcSw6ye0Lr+PJra+F5m5kplac4WlhxAsm0v5Kr9MuT1f9tPVDpWxDX
jYIJfpD86RFwiJD39HxfJYHmfZ5sdTGVsWKRVP/3xjoTiUhxC1Takyeu3Uc0Mb45
IjgAZA0QPJoilKBAusRHq8rsc0aZkCcfu7RWQHtsXpUxaHXnUcT0s/498t74Lerg
WiSXl7HdkOkKckxHbLuB4h/FTWVZfGSHp5XM6cH/bJjwgXvzl7xol/B4bwQE6h8k
irn5SyDAAeOIvuiLgi59k9iTZpPbXwfVwWrTGSCUNavOOV5yggZqJTEsO0iqBbwc
m7B8L+tuu/DLqADHeZ+FRMfhqiWNJEZ9RMn8DaL0I+hhTesKBh8DPKCUoN1mrhb8
AkaHSB6Xdm0Uu9AlDUAPgbaTCAEr2ur8dQS7QQLHv3jnJ53B0W2ylDRFy5L2Gp96
5k51J/uD3dGZpJjbpdOt
=7gEy
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Merge "Samsung drivers/soc update for v4.8, part 3" into next/drivers:
1. Fix size of allocation for Exynos SROM registers (too much was allocated).
2. Constify fix.
* tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pmu: Constify arrays with PMU data
memory: samsung: exynos-srom: Fix wrong count of registers
of machine-local files and boardfile-type data for regulators
and ASoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXhLdvAAoJEEEQszewGV1znkoQAMJy4s/VnTrhL5PdMdYu/Zr6
rLr1EyQDJZTErmGnmRnlKoLfsxTs6of4Yka2nKJJJO13FMy4eHyHHi7Wbc+WHfbO
oYEOQSK2y44niXBhSCm0P34CrMRSJuoh0LbnFyZfCcVgwYbyyklkwok4crIxkq3b
bQg+/lA8pal2tM7Y7hC/f2u54Qi6jqPrEfzZc01PnbfS64Joiup8se5+CHTHwSeT
v3nQy8TlQFJR9Suq0D8BxPZnBIHkTIJJkzQOc8Rzg7YNqq2WsXn3JZRaK0yYn/Vg
E1BOjCypVSxSIkx46hUjCv+9xoWRfIvbJZXwYk1VYzw2vUvn9WAMJEhwWDdReJ//
PpehqKG7yn2VYCBt0WF67CZC3AIYRPyfIbG3q4pKfn80/apAHkjJXO7QupHZdWsT
QGxe/vGHjhXW+m8ptoePuIynBf4GJhN8TYbzoR9jptAgkl9/CgQmD0FQjMmrJHFo
REeTvvddPsA5wQdbFRnmlRm9CPUaU6dGx9UwEIHs79pjR7IzWGf+wRxdJg3x28Z/
Y6SVQkCcUoT1AX67XpEP2QgUo+wzUM5IObcjur+io8nLKQ1h9WfmBKZCZ3UIp8Uf
incRtLP6UvLWcbLCHGy0pGlZ/4OFFyDDW7I9t1prHBCuIOmh18pWuzkJsXZUoRXQ
FiVEOb7mF7lCTrgh65aR
=VLJl
-----END PGP SIGNATURE-----
Merge tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers
Merge "Ux500 cleanups from Arnd" from Linus Walleij:
This is a set of cleanups for the Ux500 that reduce the number
of machine-local files and boardfile-type data for regulators
and ASoC.
* tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
As the ux500 id code is basically a standalone driver, we can move it
out of the arch code into drivers/soc/ux500.
This is a user-visible change, as it moves all the devices in sysfs
from /sys/devices/soc0/ to /sys/devices/ and leaves the soc0 node as a
separate device.
Originally the idea was to put all on-chip devices under the soc node,
and ux500 was the first platform to have this device, but later platforms
almost all didn't follow that pattern, so this makes the platform do
the same thing as everyone else.
Since the platform is really obsolete now, I am optimistic that nothing
will break after moving the devices around.
As the SoC driver no longer has access to the private header files,
I'm changing the code to instead look up the address of the backupram
from devicetree, which is a good idea anyway.
Finally, having a separate Kconfig symbol means the driver is now
optional and could even be a loadable module rather than always being
built-in if we allowed that for soc_device.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Fixup mising Makefile, fixup BB_UID_BASE to fc0]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We get a harmless warning if the RASPBERRYPI_POWER driver is enabled without
CONFIG_OF during compile testing:
warning: RASPBERRYPI_POWER selects PM_GENERIC_DOMAINS_OF which has unmet direct dependencies (PM_GENERIC_DOMAINS && OF)
There is no need to select PM_GENERIC_DOMAINS_OF if OF is set, so we can
replace the 'select' with a dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Eric Anholt <eric@anholt.net>
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXdn7eAAoJEN0jrNd/PrOhDc4P/2U04qs7hhaI94NmrWBDto2O
OKHezveursISPEFZ+FebMF5mSNwdBG0RitKm813TwoYDEKk6Dc7GV4nQHwHPVYqW
7xK2VrqU3GpEXXSgGu6dupwx/W6ID/L6gkghg01yVVwuvuNOrCDqWTv5EM++9Ydg
5SPBP2Nvc3CQr/Q71WU8uQueTmtQoQanZC8an/CBzRO2nA8HDBDaXfQ+dgkP/U8l
QfM9TJbFgbg9s+gwboL9UwnFmDtNNRDFPEYU8Ij9q+VDW4LEodErrVVO2NSwVhG4
A8KlkUO6N/pHRTjWnERHXUS/kCUM7BRoOum+KjMUdz3SO6iSuZFaKUein7R2fld4
iV+ichP+DpnkdSpPtgTcFYUeGM1QWfBij+9owloCE4k1pr08hS8eYWxReZ9rsVGN
43ZBZg/ia41RhojfNDtAK0ntXhak7t5DIiDpi9OO7pvCtU6aYxZxzFu+C9UiCcZ3
zPHDxHkCVEjbSdrbd6AhkOIbQ9BKk9pab0iya+B3JSJTFensxYkLhAbYkmDgXiPA
8+pySykkmogBJjsiKBbANlz+5c0etMnjTpd9jBzBuagKahfpZndHtCL8VlA2Blhh
d7KORcCf1PCEoqALoj0NXhi7IxF9KrbonpQcFspWV4zFSdhBkj5O8wkR10J5q4zG
4iJt7/bmYoWO/dbRTjbr
=eFoM
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.8-rc1
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
* tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Stub out PCIe IRQ workaround on 64-bit ARM
soc/tegra: pmc: Enable XUSB partitions on boot
soc/tegra: pmc: Initialise power partitions early
soc/tegra: pmc: Add specific error messages
soc/tegra: pmc: Use whitespace more consistently
soc/tegra: pmc: Don't probe PMC if early initialisation fails
soc/tegra: pmc: Add missing of_node_put()
soc/tegra: pmc: Ensure mutex is always initialised
soc/tegra: pmc: Don't populate SoC data until register space is mapped
soc/tegra: pmc: Fix early initialisation of PMC
soc/tegra: pmc: Ensure powergate is available when powering on
soc/tegra: pmc: Initialise resets associated with a power partition
soc/tegra: pmc: Use register definitions instead of magic values
Signed-off-by: Olof Johansson <olof@lixom.net>
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXdRvUAAoJENfPZGlqN0++qocQAJ6MApU5z9Bn+bLCCLOUeL+F
5qtRZIQoO/VQ+7sbRR7pBTTLbKs13Zeizq9CxvhGVtq/YUqzP25/RJ8mE25j1Hq1
+X3QVVOIqCnRQVDlGSq6Og7IMOvCVsNgqxWdmAwtkuiRkD75Qsb6lkmLH8MyNkRj
6UcC7UUJ5P/Pes9Qgh7ZqfWHD+A7JkUbYlN8THQkuSOJyA5Vf/jAry6riQSkJiuy
854xJ/f1FRAQas/Usqr3i+6gpZtRw66n5DA+JFubXJLxvrqnZUDdjV2d1tS8phC6
/AIGxx8n967lPg7j9DO6YxEViF3sxFrvQNds8qYoxzH6+z7FtApBJW9EDLkb58+H
nvP93DnYz1PzIjcKq0CDreqVnPDtBFK4kfDzkMxLIfbfQVgtSQlo0rpjHQzUA24u
6zk0Nhl2DM7pe9BYxQNGwWK9f9QIKxiKx9y8Qqkghylq27V34tG+dBgRj0Klv6G+
QHJNg2ShGZ/esup14eOh4YOw4ks6oNPeda0Rbl4ox3Ec970/42uIR495rsM40Avb
G17hpvsCd4oVq5xhmr8CKSDzNleewRYGxbzs5Yp1VpWxAjkKOO2AlCxaWSYtYpQe
gO1sT/YDWx4m0wiEa1/W0z3tO+U3w3wKaKOtxOZyjOj6dq99MJxPwMRoHYUGyMKW
gGN/bJjsoxBJO/Kl0om+
=/p9r
-----END PGP SIGNATURE-----
Merge tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
* tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
Signed-off-by: Olof Johansson <olof@lixom.net>
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXcaVxAAoJEFKiBbHx2RXVoxwQAMPI+3iN8M60JJ0SJvhP/VQA
AlPUcuaS2j50K16srmLif4aG8JYReRI4SNdy0J1kaRRi9OAEHiyQ5yVVlDA+FTTT
RErBxVzRUYyeCzrBpP1CL4khT+691QVx0dMcdlhnNRUttP3Cd42FM0J4GExWuDJO
UuOVn1UV0PmgSNfmYzyk87LXOA1di7ZGht02Vnjnh+kcoVjUy4Ty/yLHzxGPYcaF
RIj6lgYREtU7TN63MNkbYyx2FF+8WS9l5Q6U9E4Z/3nwRzhzhtPimWGtz1EHmxfy
a8YXmkQYM3RvPa8Cigiyg5ubkLlPC7w2rkNExKUyC/Y/jbvE4l/XJNleCEiGZmMT
f48F+7iAGgOwITL0+Lqj4VbKlUihwW28+OjcS/M5fTpDR6k0dmU0zHMhJKR9pYVU
Cr7ucYcPvzF2M6d4Frre9tZski4DZkpke81xjf6HQ00gI2CaDV/lieXtFjikL/Cl
ktdwQAo2+ydJ+7Ps5Qas2A+d66REe90vx2RCZWFRs9Nxe/CfSSz01LM6EeyONBKf
XfQvbKc6V/ZVHkWkA/EILlfRFCho6KwpEAHpZpFt1NiplJXfUcDcQyy/CuIKLR4H
c/UfKeGZCK+VyezbMWAKDb7ig3KywHD8yRieQpCyysVB/97oulJ/bHEs1KT5Bl5I
uDjnR7KqyXJEOGANr5S2
=WprH
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.8
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
* tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose PAS command 10 as reset-controller
firmware: qcom: scm: Peripheral Authentication Service
soc: qcom: Update properties for smem state referencing
soc: qcom: smp2p: Drop io-accessors
soc: qcom: smp2p: Correct addressing of outgoing value
soc: qcom: wcnss_ctrl: Make wcnss_ctrl parent the other components
firmware: qcom: scm: Add support for ARM64 SoCs
firmware: qcom: scm: Convert to streaming DMA APIS
firmware: qcom: scm: Generalize shared error map
firmware: qcom: scm: Use atomic SCM for cold boot
firmware: qcom: scm: Convert SCM to platform driver
MAINTAINERS: Add file patterns for qcom device tree bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
The Tegra XHCI driver does not currently manage the Tegra XUSB power
partitions and so it these partitions have not been enabled by the
bootloader then the system will crash when probing the XHCI device.
While proper support for managing the power partitions is being
developed to the XHCI driver for Tegra, for now power on all the XUSB
partitions for USB host and super-speed on boot if the XHCI driver is
enabled.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
If CONFIG_PM_GENERIC_DOMAINS is not enabled, then power partitions
associated with a device will not be enabled automatically by the PM
core when the device is in use. To avoid situations where a device in
a power partition is to be used but the partition is not enabled,
initialise the power partitions for Tegra early in the boot process and
if CONFIG_PM_GENERIC_DOMAINS is not enabled, then power on all
partitions defined in the device-tree blob.
Note that if CONFIG_PM_GENERIC_DOMAINS is not enabled, after the
partitions are turned on, the clocks and resets used as part of the
sequence for turning on the partition are released again as they are no
longer needed by the PMC driver. Another benefit of this is that this
avoids any issues of sharing resets between the PMC driver and other
device drivers that may wish to independently control a particular
reset.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When initialising a powergate, only a single error message is shown if
the initialisation fails. Add more error messages to give specific
details of what failed if the initialisation failed and remove the
generic failure message.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 0259f522e0 ('soc/tegra: pmc: Restore base address on probe
failure') fixes an issue where the PMC base address pointer is not
restored on probe failure. However, this fix creates another problem
where if early initialisation of the PMC driver fails and an initial
mapping for the PMC address space is not created, then when the PMC
device is probed, the PMC base address pointer will not be valid and
this will cause a crash when tegra_pmc_init() is called and attempts
to access a register.
Although the PMC address space is mapped a 2nd time during the probe
and so this could be fixed by populating the base address pointer
earlier during the probe, this adds more complexity to the code.
Moreover, the PMC probe also assumes the the soc data pointer is also
initialised when the device is probed and if not will also lead to a
crash when calling tegra_pmc_init_tsense_reset(). Given that if the
early initialisation does fail then something bad has happen, it seems
acceptable to allow the PMC device probe to fail as well. Therefore, if
the PMC base address pointer or soc data pointer are not valid when
probing the PMC device, WARN and return an error.
Fixes: 0259f522e0 ('soc/tegra: pmc: Restore base address on probe failure')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing of_node_put() in PMC early initialisation function to avoid
leaking the device nodes.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: squash in a couple more of_node_put() calls]
Signed-off-by: Thierry Reding <treding@nvidia.com>
The mutex used by the PMC driver may not be initialised if early
initialisation of the driver fails. If this does happen, then it could
be possible for callers of the public PMC functions to still attempt to
acquire the mutex. Fix this by initialising the mutex as soon as
possible to ensure it will always be initialised.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The public functions exported by the PMC driver use the presence of the
SoC data pointer to determine if the PMC device is configured and the
registers can be accessed. However, the SoC data is populated before the
PMC register space is mapped and this opens a window where the SoC data
pointer is valid but the register space has not yet been mapped which
could lead to a crash. Furthermore, if the mapping of the PMC register
space fails, then the SoC data pointer is not cleared and so would
expose a larger window where a crash could occur.
Fix this by initialising the SoC data pointer after the PMC register
space has been mapped.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
During early initialisation, the available power partitions for a given
device is configured as well as the polarity of the PMC interrupt. Both
of which should only be configured if there is a valid device node for
the PMC device. This is because the soc data used for configuring the
power partitions is only available if a device node for the PMC is found
and the code to configure the interrupt polarity uses the device node
pointer directly.
Some early device-tree images may not have this device node and so fix
this by ensuring the device node pointer is valid when configuring these
items.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_power_sequence_power_up() is a public function used
to power on a partition. When this function is called, we do not check
to see if the partition being powered up is valid/available. Fix this
by checking to see that the partition is valid/available.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When registering the Tegra power partitions with the generic PM domain
framework, the current state of the each partition is checked and used
as the default state for the partition. However, the state of each reset
associated with the partition is not initialised and so it is possible
that the state of the resets are not in the expected state. For example,
if a partition is on, then the resets should be de-asserted and if the
partition is off, the resets should be asserted.
There have been cases where the bootloader has powered on a partition
and only de-asserted some of the resets to some of the devices in the
partition. This can cause accesses to these devices to hang the system
when the kernel boots and attempts to probe these devices.
Ideally, the driver for the device should ensure the reset has been
de-asserted when probing, but the resets cannot be shared between the
PMC driver (that needs to de-assert/assert the reset when turning the
partition on or off) and another driver because we cannot ensure the
reset is in the correct state.
To ensure the resets are in the correct state, when using the generic
PM domain framework, put each reset associated with the partition in
the correct state (based upon the partition's current state) when
obtaining the resets for a partition.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Align SYSC interrupt configuration in the legacy wrapper with the DT
version:
- Mask SYSC interrupt sources before enabling them (doesn't matter
much as they're disabled at the GIC level anyway),
- Make sure not to clear reserved SYSCIMR bits that were set before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On R-Car H1 and Gen2, the SYSC interrupt registers are always configured
using hardcoded values in platform code. For R-Car Gen2, values are
provided for H2 and M2-W only, other SoCs are not yet supported, and
never will be.
Move this configuration from SoC-specific platform code to the
rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured
from DT. This would be the case not only for H1, H2, and M2-W using a
modern DTS, but also for other R-Car Gen2 SoCs not supported by the
platform code, relying purely on DT.
There is no longer a need to return the mapped register block, hence
make the function return void.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let rcar_sysc_init() trigger initialization of the SYSC PM domains from
DT if called before the early_initcall.
On failure, it falls back to mapping the passed register block, as
before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On success, rcar_sysc_pd_init() returns an uninitialized error code.
Use the return value of of_genpd_add_provider_onecell() to fix this.
This went unnoticed, as early_initcall() doesn't care about the return
value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.
Also update the #qcom,smem-state-cells for consistency, before we merge
any users of these properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SMEM is now mapped write-combine and we can use memcpy to access the
name of the entires.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The valid_entries index should not be incremented until after we have
acquired the pointer to the value, or we will read and write data one
item off.
Fixes: 50e9964141 ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Cc: stable@vger.kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
We need the signal from wcnss_ctrl indicating that the firmware is up
and running before we can communicate with the other components of the
chip. So make these other components children of the wcnss_ctrl device,
so they can be probed in order.
The process seems to take between 1/2-5 seconds, so this is done in a
worker, instead of holding up the probe.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- Florian moves drivers/soc/brcmstb to drivers/soc/bcm/brcmstb to be consistent with
how other SoCs are doing it
- Chris provides a reset driver which is common to the BCM21664 and BCM23550 SoCs
- Ben fixes a warning by providing the appropriate include file
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY1WaAAoJEIfQlpxEBwcErVMQAK9dNwq7Zul5NPc+QXe/0vUy
hLzjF2qm8CEqxU+YF3B1OSI4DHFEdJi3kgDq0RwaVoNC11nFdD5CQIKiB2a0O4jL
HYlRSir2BoeuSdt/IUry8tdUJOy1LhK/OM0yu/E4OJq/yHgimM/D2+kh6ToSS23s
X2rocyat7CUAqtiEXroYmWgu+UbUI9Dst+WtXJ4bL6iJe5asZPeTFdxNuMmO0RBF
XcGY7nmOD420jhYJvZkZUibo/tz/i57Ar2i0SFpTgQGQ1DHbmyhEFCbOm6QuZ3J0
l5deISy0buXfTTc15n9zhoqZxtGiM3ExqEhrTdvaSjBkZrZUUhjKo+ED5yGJ7Yqy
2cRP1dua4ixEbOJoAU+IuoqDj42zOxpOLhwNi7e8ROTqXfxHxAVizPJ6dKZKP1vz
6KqqJtEoD+U9mrylAQ55+D68e1kNy7r8TN4qJBhrNSO3G2bWogYzUKHFMdSPyNFY
/g0qhAwBrvPHw1ieezS74uMCIF525QfylpcX4MP0s48fAN32SQPdFb5mZuxzqvVH
V0Z/VShkndLkoslChEZ5intuvMDUMyP1tdwvthuvoJQOVh59Fede+7TG+wsxzOGP
FbWGhtWzxVzKLOvwBZhLMv5VwPH7rFSSTuc3tT2xMtpoMy/lhRabH/nqQKdm9CET
uzRJ8hDFy3oWx3L95nA/
=gNzd
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.8/drivers' of http://github.com/Broadcom/stblinux into next/drivers
This pull request contains drivers related changes for Broadcom SoCs:
- Florian moves drivers/soc/brcmstb to drivers/soc/bcm/brcmstb to be consistent with
how other SoCs are doing it
- Chris provides a reset driver which is common to the BCM21664 and BCM23550 SoCs
- Ben fixes a warning by providing the appropriate include file
* tag 'arm-soc/for-4.8/drivers' of http://github.com/Broadcom/stblinux:
soc: brcmstb: fix warning from missing include
power: Introduce Broadcom kona reset driver
soc: Move brcmstb to bcm/brcmstb
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use register definitions for the main SoC reset operation instead of
hard-coding magic values. Note that the PMC_RST_STATUS register isn't
actually accessed, but since it is mentioned in a comment the
definitions are added for completeness.
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The brcmstb_biuctrl_init() is defined in the soc specific header
file, but wasn't included in the driver file. Fix the following
warning by including <linux/soc/brcmstb/brcmstb.h> in the driver:
drivers/soc/brcmstb/biuctrl.c:101:13: warning: symbol 'brcmstb_biuctrl_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Unify the different Broadcom SoCs directory and have everybody live
under drivers/soc/bcm/*.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Introduce a platform selectable symbol EXYNOS_PM_DOMAINS which can be
also toggled on by COMPILE_TEST for some build coverage.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The ARMv8 Exynos family (Exynos5433 and Exynos7420) uses different value
(0xf instead of 0x7) for controlling the power domain on/off registers
(both for control and for status).
Choose the value depending on the compatible. This prepares the driver
for supporting ARMv8 SoCs.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Exynos PM domains driver does not have mach-specific dependencies so it
can be safely moved out of arm/mach-exynos to drivers/soc. This in
future will allow re-using it on ARM64 boards.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
On ARM64, the mtk-pmic-wrap driver causes a harmless warning:
mtk-pmic-wrap.c:1062:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1074:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1086:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
.int_en_all = ~(BIT(31) | BIT(1)),
The problem is that the result of the BIT() macro is an 'unsigned long',
so taking the bitwise NOT operation of that results in an integer
with the upper 32 bits all set and that cannot be assigned to a
'u32' variable without loss of information.
This is harmless because we were never interested in the upper bits
here anyway, so we can shut up the warning by adding a simple cast
to 'u32'.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons. For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to
get done.
Finally, reset controller handling as always gets merged through here
as well.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXkGCrR//JCVInAQKb5BAAv2HuJ/tDjC8nNfYi0/aIt4uaRfRWE84t
+nIpdKl/pB9AQo+HdG9WNihHs2GN44PdQRrDZ1enQX8nvTzc+dUl0AI1GZmUDpF/
zCV2UJ39HMZcEPwf8lZk9X/JP4VOkJDM5pDgNZnnqdvkq0oqtKzmh0Kt6m2g6fIS
LR3FVtCRxJDeT+pT+EpoN4jpW0cb3mjTWbn/a8Ar3BH07KBA3U22MVJhHArLjS30
/aXP+AkgdvlgmBher5z44N6Qd/KOLn78rnE4LCRC4FwSCqA+qqPJQNGNblV5MHjE
s5CYTqlihqLiGapqJ4zGBhmqj0XU/3kFVboGqYlTGjzMkOFgjddTpMdfkBUoG5oJ
UubJ51zzSLXTcMwILGNXVls4YjJRKwNH7jeSjuMqpWrAYP4qBcMn/HQ1GqUjkNv+
yWkheHiLDYgYkIDOBDuFUtJ7OXiVumGGxIE+r2K/sXeNI7gFcDxFExMIo11vPAWP
WJ8ydTchyb/RUQbzhjEXhoIeCZwXQfe9s11qsyFQDCZLleWYQGs3gFKdEI1E7+BE
oe018BSP+uaVXdaV18Ne4smwzydLAU9/ieUoO45PAUSN2reV4lWhFTlNiiiMd3Id
IWoYwpxqP2VW9zJvLz6QGF/P+3cZ00m/1lecJCKHHPBmbUijCHWJmgLT73AdSXmR
YIJ2UM5QMiY=
=x+iD
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons.
For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to get
done.
Finally, reset controller handling as always gets merged through here
as well"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
arm-ccn: Enable building as module
soc/tegra: pmc: Add generic PM domain support
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
drivers: firmware: psci: make two helper functions inline
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
...
These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as well,
and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and
the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition"
is added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7)
are supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported, which
in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet Processor",
following the IPQ806x that is used in many high-end WiFi routers. This one
integrates two ath10k wifi radios that were previously on separate chips.
Other boards that got added for existing chips are:
- On Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
- On Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
- On NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and
SoloX Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
- On Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
- On Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
- On Rockchips platform:
- mqmaker MiQi single-board computer
- On Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
- On Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC
single board computers
Across many platforms, bug fixes went in to address warnings that
dtc now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router),
Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXhGCrR//JCVInAQJXjhAA1bV0fbREflRQrlXdMb4rNesygH8ikaja
gOYHE1yO+tSitHZ5g4w2yAFIEK7DzFdO5rz53BEINZfLCj4LO4495/z9ipqZQEjC
rw5IL89jAn8x4wF791SHjLpmmNRbHN2vjLcsX3ShJIHckip/jIbiU2aFJuohA0TU
jxpPAZzhaKsu/rDaVzHMS/im4LbZQ2qI3DxUUn6Kt8c468i4Ns22sowqSjh2xO/X
YiwHD0eAvDrySfMGiNT82wMMTfMF2KfXZGB885isMP4hK8OIDrOnI5nM9rxyRFfu
N14o0+tN1S2JzBHnqOOpib6JxYyCVr+QTjsKGAyR5X1mGINIhX8f1gy0EvFFxXKT
rIATc5VTeo4gc1quij8RVtDEp/4iJ8GspH4WGMh1F8tjTe+WUxeSMkxdf6/QY1+Q
vZKT0KKihoJQu1xI62NjnaRbfbhwx2BSWehwgXVd72lD19dG5LPw+Nj6/8+Bgouc
YxJahgkB9MMtHoNp8huMg33Gr9a07/yVxc4CztXtf7N9phd0nEXov2iM1aBgazLU
8IVd3Z9lZA+4iGVcj3oBJ6K1IkiCmg2qoNyF6tcInR5vPjKLECuxyuZw8VKuUuHD
k/s/rymSGRlDN5i4F0h0r4MvQ9gkYfwk8xiL3ofmwYHwo103Q7b7Cw55XRk88EoB
appd5QA+pko=
=Nx46
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as
well, and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and the
Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition" is
added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported,
which in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet
Processor", following the IPQ806x that is used in many high-end WiFi
routers. This one integrates two ath10k wifi radios that were
previously on separate chips.
Other boards that got added for existing chips are:
Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
Rockchips platform:
- mqmaker MiQi single-board computer
Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
computers
Across many platforms, bug fixes went in to address warnings that dtc
now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
ARM: dts: tango4: Import watchdog node
ARM: dts: tango4: Update cpus node for cpufreq
ARM: dts: tango4: Update DT to match clk driver
ARM: dts: tango4: Initial thermal support
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
ARM: dts: ux500: configure the accelerometers open drain
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
...
