AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-28 11:18:45 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity
796,621 Commits 1 Branch 0 Tags 2 GiB
4c7c31104b
Commit Graph

4 Commits

Author SHA1 Message Date
John Garry
d2a1606c29 arm64: dts: hisi: Enable Hisi LPC node for hip07 
The patch enables the HiSi LPC node for hip07, with
the IPMI child device.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
 2018-05-15 14:52:51 +01:00
Zhou Wang
9f5ce88de8 arm64: dts: hisi: add PCIe host controller node for hip07 SoC 
Add one PCIe host controller node for HiSilicon Hip07 SoC and enable it in
D05 board.

Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
 2017-08-14 15:25:39 +01:00
Wei Xu
519caba7a9 arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board 
Enable the NIC and SAS nodes for the hip07-d05 board
to support related functions.

Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
 2017-04-10 23:32:56 +08:00
Kefeng Wang
4f357f94e1 arm64: dts: hisilicon: Add initial dts for Hip07 D05 board 
Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.

Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
 2016-11-15 10:36:17 +00:00