The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.
This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.
Signed-off-by: Jan Andersson <jan@gaisler.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
As pointed out by Arnd Bergmann, in include/linux/usb/ehci_def.h, struct
ehci_caps is defined with __attribute__((packed)) for no good reason,
and this triggers undefined behaviour when using ARM's readl() on
pointers to elements of this structure:
http://lkml.kernel.org/r/201102021700.20683.arnd@arndb.de
The same problem exists with the other two structures in ehci_def.h too,
so remove the __attribute__((packed)) from all of them.
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The Tegra 2 SoC has 3 EHCI compatible USB controllers. This patch adds
the necessary glue to allow the ehci-hcd driver to work on Tegra 2
SoCs.
The platform data is used to configure board-specific phy settings and
to configure the operating mode, as one of the ports may be used as a otg
port. For additional power saving, the driver supports powering down the
phy on bus suspend when it is used, for example, to connect an internal
device that use an out-of-band remote wakeup mechanism (e.g. a gpio).
Signed-off-by: Benoit Goby <benoit@android.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
EHCI 1.1 addendum introduced several energy efficiency extensions for
EHCI USB host controllers:
1. LPM (link power management)
2. Per-port change
3. Shorter periodic frame list
4. Hardware prefetching
This patch is intended to define the HW bits and debug interface for
EHCI 1.1 addendum. The LPM and Per-port change patches will be sent out
after this patch.
Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com>
Signed-off-by: Alek Du <alek.du@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
On some EHCI usb debug controllers, the EHCI debug device will fail to
be seen after a port reset, after a warm reset. Two options exist to
get the device to initialize correctly.
Option 1 is to unplug and plug in the device.
Option 2 is to use the EHCI port test to get the usb debug device to
start talking again. At that point the debug controller port reset
will succeed.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
CC: dbrownell@users.sourceforge.net
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
If the EHCI debug port is initialized and in use, the EHCI host
controller driver must follow two rules.
1) If the EHCI host driver issues a controller reset, the debug
controller driver re-initialization must get called after the reset
is completed.
2) The EHCI host driver should ignore any requests to the physical
EHCI debug port when the EHCI debug port is in use.
The code to check for the debug port was moved from ehci_pci_reinit()
to ehci_pci_setup because it must get called prior to ehci_reset()
which will clear the debug port registers.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: dbrownell@users.sourceforge.net
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch implements several changes:
1) Improve the capability to debug the dbgp driver
The dbgp_ehci_status() was added in a number of places to report
the critical ehci registers to diagnose the cause of a failure of
the ehci-dbgp driver.
2) Capability to survive the host controller initialization
The dbgp_external_startup(), dbgp_not_safe, and dbgp_phys_port were
added so as to allow the ehci-dbgp to re-initialize after the ehci
host controller is reset by the standard host controller driver.
This same routine is common for the early startup or
re-initialization.
This resulted in the need to move some of the initialization code
out of the __init section because the ehci driver has the
possibility to be loaded later on as a kernel module.
3) Stability improvements for device initialization
The device enumeration from 0 to 127 has the possibility to fail
the first time after a warm reset on some older EHCI debug
controllers. The enumeration will be tried up to 3 times to
account for this failure case.
The dbg_wait_until_complete() was changed to wait up to 250 ms
before failing which only comes into play during device
initialization. The maximum delay will never get hit during the
course of normal operation of the driver, unless the device got
unplugged or there was a ehci controller failure, in which case the
dbgp device driver will shut itself down.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: dbrownell@users.sourceforge.net
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Move the dbgp early printk driver in advance of refactoring and adding
new code, so the changes to this code are tracked separately from the
move of the code.
The drivers/usb/early directory will be the location of the current
and future early usb code for driving usb devices prior initializing
the standard interrupt driven USB drivers.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The Intel Moorestown EHCI controller supports non-standard HOSTPCx register
extension. This register controls the LPM behaviour and controls the behaviour
of each USB port.
Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com>
Signed-off-by: Alek Du <alek.du@intel.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
prepare x86: usb debug port early console
move ehci struct def to linux/usrb/ehci_def.h from host/ehci.h
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: "Arjan van de Ven" <arjan@infradead.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: "Greg KH" <greg@kroah.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
