Commit Graph

9 Commits

Author SHA1 Message Date
Scott Wood
54877957e9 powerpc/fsl: Use new clockgen binding
The driver retains compatibility with old device trees, but we don't
want the old nodes lying around to be copied, or used as a reference
(some of the mux options are incorrect), or even just being clutter.

Signed-off-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
[scottwood: removed sysclk node added by Andy]
Signed-off-by: Scott Wood <oss@buserror.net>
2018-12-21 20:58:34 -06:00
Sriram Dash
ae9ac1d329 powerpc/85xx: add aliases for usb nodes on t4240, b4860, and b4420
Add usb aliases for consistency with the other platforms.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-07-08 19:58:06 -05:00
Igal Liberman
da414bb923 powerpc/mpc85xx: Add FSL QorIQ DPAA FMan support to the SoC device tree(s)
Based on prior work by Andy Fleming <afleming@freescale.com>

Signed-off-by: Shruti Kanetkar <Shruti@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-10-27 18:14:39 -05:00
Chunhe Lan
db65025d8e t4240/dts: Enable third elo3 DMA engine support
T4240 has a third DMA engine controller, so add the corresponding DMA
node into the dts file.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: reword commit message]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-06-20 18:48:32 -05:00
Diana Craciun
f2e7bfbb04 powerpc/fsl: Updated device trees for platforms with corenet version 2
Updated the device trees according to the corenet-cf
binding definition.

Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-05-22 18:08:26 -05:00
Tang Yuantian
5d1a566e51 powerpc/mpc85xx: Update clock nodes in device tree
The following SoCs will be affected: p2041, p3041, p4080,
p5020, p5040, b4420, b4860, t4240

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-19 16:04:23 -05:00
Kumar Gala
9ac8f50a35 powerpc/fsl-booke: Minor fixes to T4240 Si device tree
* Fix cpu unit address to match reg
* Update compatible for rcpm & clockgen to be 2.0 instead of 2

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-04-09 09:52:32 -05:00
Stephen George
8c33de98fe powerpc/fsl-booke: Added device tree DCSR entries for T4240 Chassis v2 Debug IP
Signed-off-by: Stephen George <Stephen.George@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-03-18 14:09:00 -05:00
Kumar Gala
3d7419714b powerpc/fsl-booke: Add initial silicon device tree for T4240
Enable a baseline T4240 SoC to boot.  There are several things missing
from the device trees for T4240:

* Proper PAMU topology information
* DPAA related nodes (Qman, Bman, Fman, Rman, DCE)
* Prefetch Manager
* Thermal monitor unit
* Interlaken

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-03-12 15:59:32 -05:00