Commit Graph

96 Commits

Author SHA1 Message Date
Maxime Ripard
39bfc2311c ARM: dts: sun5i: Remove redundant interrupt-controller
The interrupt-parent property is set in sun5i.dtsi, so there's no need to
repeat it.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2018-11-28 11:35:59 +01:00
Maxime Ripard
d6b7baed20 ARM: dts: sun5i: Remove SoC node unit-name to avoid warnings
Our main node for all the in-SoC controllers used to have a unit name. The
unit-name, in addition to being actually false, would not match any reg
property, which generates a warning.

Remove it in order to remove those warnings.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2018-11-28 11:35:59 +01:00
Maxime Ripard
3fb5ff698d ARM: dts: sun5i: Remove skeleton to avoid warnings
Using skeleton.dtsi will create a memory node that will generate a warning
in DTC. However, that node will be created by the bootloader, so we can
just remove it entirely in order to remove that warning.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2018-11-28 11:35:58 +01:00
Viresh Kumar
52b5f53f4b ARM: dts: sun[4-7]i: Remove "cooling-{min|max}-level" for CPU nodes
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
a CPU cooling device is found by referring to the cpufreq table instead.

Remove the unused properties from the CPU nodes.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-02-13 19:13:20 +08:00
Rob Herring
8dccafaa28 arm: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-20 00:37:54 +02:00
Chen-Yu Tsai
85d2913614 ARM: dts: sunxi: Remove no longer used pinctrl/sun4i-a10.h header
All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.

Remove the #include entry with the following command:

    sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \
	arch/arm/boot/dts/sun?i*.*

arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra
empty line.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 13:39:58 +02:00
Maxime Ripard
8587019625 ARM: sun5i: a13: Merge common controllers into the common DTSI
Some controllers found in the A13 DTSI actually apply to all of the sun5i
family. Move those into the common DTSI so that all SoCs can benefit from
it.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-06 07:40:36 +01:00
Linus Torvalds
5d8a00eee2 The usual collection of new drivers, non-critical fixes, and updates
to existing clk drivers. The bulk of the work is on Allwinner and
 Rockchip SoCs, but there's also an Intel Atom driver in here too.
 
 New Drivers:
  - Tegra BPMP firmware
  - Hisilicon hi3660 SoCs
  - Rockchip rk3328 SoCs
  - Intel Atom PMC
  - STM32F746
  - IDT VersaClock 5P49V5923 and 5P49V5933
  - Marvell mv98dx3236 SoCs
  - Allwinner V3s SoCs
 
 Removed Drivers:
  - Samsung Exynos4415 SoCs
 
 Updates:
  - Migrate ABx500 to OF
  - Qualcomm IPQ4019 CPU clks and general PLL support
  - Qualcomm MSM8974 RPM
  - Rockchip non-critical fixes and clk id additions
  - Samsung Exynos4412 CPUs
  - Socionext UniPhier NAND and eMMC support
  - ZTE zx296718 i2s and other audio clks
  - Renesas CAN and MSIOF clks for R-Car M3-W
  - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
  - TI CDCE913, CDCE937, and CDCE949 clk generators
  - Marvell Armada ap806 CPU frequencies
  - STM32F4* I2S/SAI support
  - Broadcom BCM2835 DSI support
  - Allwinner sun5i and A80 conversion to new style clk bindings
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJYsLxxAAoJEK0CiJfG5JUl0p0P/AiBaYvrmHBx3H9jdC3iQxd2
 7luFN3OqpykmZc3xx2xO3WaZ96kwwxiMu8sj3+VQo6oCkEuOY2ru6uPiDOcF4P3+
 8ku2taoWlESDbVLebVTNJoRXBaBLaV+9BCN7AKvXpVw+/UkJI5hgr0yMdh4tgtvu
 K08tTMkDNDbA33KXuJo8/chQFqi2W6XBXk22YMkqqA8jx0F4EM759LcgUlD1YfBS
 HKkgSOgsW3Zwhl27ZEAJMthcmS4+wFaEgFBeipg/hxTLI3aQtmDtRfXwg0wkbBx2
 8sVz9SyBwkjOT9+41kve+Je94NK3blnJEjbxPASveMwyhdX1TlDQCPfrXya/1zxz
 N1By1NpA6iEYwi4hy+OtBYlcsBHztAM/+eljDY2kEDvfiKjMa44GYmgBu4n8pq+n
 75NJxws6ZkzPs5/QsLT3hvTaL1SNX6PaEW8HabDXO40ccZc4CYvFZVOXMAnKaXzZ
 31hj8EvQ5x6hci+SPYyVu6j3ipOxN96VcZqEJ+hWyyuZEMK6Up1o/0lGZFgwa0UD
 SIl7RiTFKO6ko+8hYlk1g0DGtEyWDsdso1Bw4zaHwMngM/CwjJVzpK5T2t1fJyEh
 lN5MdhcOi0nsiRWdRxOwOlHDLf93qSo87mvseU1MCEXYN1aqTV3VxSm1YU8ZgQVk
 sAjpsJqj45enfDa9BmIt
 =o8o/
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The usual collection of new drivers, non-critical fixes, and updates
  to existing clk drivers. The bulk of the work is on Allwinner and
  Rockchip SoCs, but there's also an Intel Atom driver in here too.

  New Drivers:
   - Tegra BPMP firmware
   - Hisilicon hi3660 SoCs
   - Rockchip rk3328 SoCs
   - Intel Atom PMC
   - STM32F746
   - IDT VersaClock 5P49V5923 and 5P49V5933
   - Marvell mv98dx3236 SoCs
   - Allwinner V3s SoCs

  Removed Drivers:
   - Samsung Exynos4415 SoCs

  Updates:
   - Migrate ABx500 to OF
   - Qualcomm IPQ4019 CPU clks and general PLL support
   - Qualcomm MSM8974 RPM
   - Rockchip non-critical fixes and clk id additions
   - Samsung Exynos4412 CPUs
   - Socionext UniPhier NAND and eMMC support
   - ZTE zx296718 i2s and other audio clks
   - Renesas CAN and MSIOF clks for R-Car M3-W
   - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
   - TI CDCE913, CDCE937, and CDCE949 clk generators
   - Marvell Armada ap806 CPU frequencies
   - STM32F4* I2S/SAI support
   - Broadcom BCM2835 DSI support
   - Allwinner sun5i and A80 conversion to new style clk bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (130 commits)
  clk: renesas: mstp: ensure register writes complete
  clk: qcom: Do not drop device node twice
  clk: mvebu: adjust clock handling for the CP110 system controller
  clk: mvebu: Expand mv98dx3236-core-clock support
  clk: zte: add i2s clocks for zx296718
  clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()
  clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i
  clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
  clk: tegra: Add BPMP clock driver
  clk: uniphier: add eMMC clock for LD11 and LD20 SoCs
  clk: uniphier: add NAND clock for all UniPhier SoCs
  ARM: dts: sun9i: Switch to new clock bindings
  clk: sunxi-ng: Add A80 Display Engine CCU
  clk: sunxi-ng: Add A80 USB CCU
  clk: sunxi-ng: Add A80 CCU
  clk: sunxi-ng: Support separately grouped PLL lock status register
  clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
  clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
  clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
  clk: qcom: SDHCI enablement on Nexus 5X / 6P
  ...
2017-02-25 14:28:06 -08:00
Maxime Ripard
98a59a0fbf ARM: sun5i: Convert to CCU
Now that we have drivers for all of them, convert all the SoCs that share
the sun5i DTSI to the new CCU driver.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-23 11:45:35 +01:00
Maxime Ripard
1edcd36fcb ARM: sunxi: Convert pinctrl nodes to generic bindings
Now that we can handle the generic pinctrl bindings, convert our DT to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26 08:27:11 +01:00
Maxime Ripard
119c366aea ARM: sunxi: Remove useless allwinner,pull property
The allwinner,pull property set to NO_PULL was really considered our
default (and wasn't even changing the default value in the code).

Remove these properties to make it obvious that we do not set anything in
such a case.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26 08:24:50 +01:00
Maxime Ripard
d312f6fb80 ARM: sunxi: Remove useless allwinner,drive property
The allwinner,drive property set to 10mA was really considered as our
default. Remove all those properties entirely to make that obvious.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26 08:24:50 +01:00
Hugo Grostabussiat
539d5c48a4 ARM: sun5i: Fix typo in trip point temperature
Set cpu_alert0 temperature to 85°C instead of 850°C.

Fixes: 32a5d2d170 ("ARM: dts: sun5i: Add cpu thermal zones to dtsi")
Signed-off-by: Hugo Grostabussiat <bonstra@bonstra.fr.eu.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-22 20:35:53 +02:00
Maxime Ripard
2cbc7295cd ARM: sun5i: Move display blocks to A13
Most of the display engine is shared between the R8 and the A13. Move the
common parts to the Á13 DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-04 21:17:48 +02:00
Maxime Ripard
0090dc5f6c ARM: sun5i: a13: Add LCD pins
The RGB bus can be used in several configurations, one of which being the
RGB666.

Add a pinctrl group for that case.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-04 21:17:48 +02:00
Maxime Ripard
6b70991043 ARM: sun5i: a13: Add display and TCON clocks
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-05-04 19:59:56 +02:00
Maxime Ripard
541ac1554e ARM: sun5i: Add DRAM gates
The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.

Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-04-19 12:02:21 +02:00
Maxime Ripard
15bd920f96 ARM: sun5i: Add TV encoder gate to the DTSI
It turns out that the A13 / R8 also have a tve encoder block, and a gate
for it.

Add it to the DT.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-04-19 11:58:41 +02:00
Hans de Goede
51763bd73d ARM: dts: sun5i: Add PWM controller node for A13 / A10s
Add dts nodes for the PWM controller on the A13 / A10s.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-10-12 15:50:20 +02:00
Maxime Ripard
dd4de433aa ARM: sun5i: Add clock indices
The A10s and A13 gates have a non continuous set of clock IDs that are
valid. Add the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:04 -07:00
Maxime Ripard
8358aada4e ARM: sunxi: dt: Fix whitespace errors
A few lines (probably copy pasted) have an indentation mixing tabs and
spaces that triggers a checkpatch warning.

Fix those, and while we're at it, fix the space-indented sections.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-05-10 10:22:24 +02:00
Maxime Ripard
d8cacaa34f ARM: sunxi: DT: Fix lines over 80 characters
A few lines in our DTSIs are over the 80 characters limit, making
checkpatch complain about that.

If possible (and relevant), wrap these lines to 80 characters.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-05-10 10:22:23 +02:00
Maxime Ripard
c0c2eb2476 ARM: sunxi: dt: Remove the FSF address
The FSF address triggers a warning on checkpatch, saying that the FSF
license is already present in the Linux source code, and that it has
already changed in the past.

Remove it from our DT, as suggested.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-05-10 10:22:23 +02:00
Hans de Goede
3727ed3bb3 ARM: dts: sun5i: Stop using different compatibles for ehci/ohci on a13 vs a10s
The A13 and the A10s use the same die (this has been confirmed by Allwinner),
as such there is no need to differentiate between the ehci/ohci parts of both,
the only reasons there were different allwinner,sun5i-a*-foo compatible
between these 2 parts is costemetically and because we could when we still
had 2 completely different dtsi files.

The allwinner,sun5i-a*-foo compatible strings are not used for binding at all,
the actual driver binds to the generic-?hci compatible, so we can safely remove
this cosmetical difference and simplify the dtsi files.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:25 +02:00
Maxime Ripard
51fbba4212 ARM: sun5i: a13: Move to the common sun5i DTSI
Now that we have a common DTSI for the sun5i family, move the A13 to use it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:18 +02:00
Maxime Ripard
1d86b4b52c ARM: sun5i: Relicense the A10s/A13 DTSI under GPLv2/X11
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense our
DTSI first under a GPL/X11 dual-license. Hopefully, the DTS will follow soon.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Acked-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Oliver Schinagl <oliver@schinagl.nl>
Acked-by: Roman Byshko <rbyshko@gmail.com>
2015-04-27 08:20:16 +02:00
Chen-Yu Tsai
370a9b5fb0 ARM: dts: sunxi: Remove overclocked/overvoltaged OPP
Without proper regulator support for individual boards, it is dangerous
to have overclocked/overvoltaged OPPs in the list. Cpufreq will increase
the frequency without the accompanying voltage increase, resulting in
an unstable system.

Remove them for now. We can revisit them with the new version of OPP
bindings, which support boost settings and frequency ranges, among
other things.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-03-24 14:50:38 -07:00
Linus Torvalds
18a8d49973 The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
 devices. Additionaly the framework core underwent a bit of surgery with
 two major changes. The boundary between the clock core and clock
 providers (e.g clock drivers) is now more well defined with dedicated
 provider helper functions. struct clk no longer maps 1:1 with the
 hardware clock but is a true per-user cookie which helps us tracker
 users of hardware clocks and debug bad behavior. The second major change
 is the addition of rate constraints for clocks. Rate ranges are now
 supported which are analogous to the voltage ranges in the regulator
 framework. Unfortunately these changes to the core created some
 breakeage. We think we fixed it all up but for this reason there are
 lots of last minute commits trying to undo the damage.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU54D5AAoJEDqPOy9afJhJs6AQAK5YuUwjDchdpNZx9p7OnT1q
 +poehuUwE/gYjmdACqYFyaPrI/9f43iNCfFAgKGLQqmB5ZK4sm4ktzfBEhjWINR2
 iiCx9QYMQVGiKwC8KU0ddeBciglE2b/DwxB45m9TsJEjowucUeBzwLEIj5DsGxf7
 teXRoOWgXdz1MkQJ4pnA09Q3qEPQgmu8prhMfka/v75/yn7nb9VWiJ6seR2GqTKY
 sIKL9WbKjN4AzctggdqHnMSIqZoq6vew850bv2C1fPn7GiYFQfWW+jvMlVY40dp8
 nNa2ixSQSIXVw4fCtZhTIZcIvZ8puc7WVLcl8fz3mUe3VJn1VaGs0E+Yd3GexpIV
 7bwkTOIdS8gSRlsUaIPiMnUob5TUMmMqjF4KIh/AhP4dYrmVbU7Ie8ccvSxe31Ku
 lK7ww6BFv3KweTnW/58856ZXDlXLC6x3KT+Fw58L23VhPToFgYOdTxn8AVtE/LKP
 YR3UnY9BqFx6WHXVoNvg3Piyej7RH8fYmE9om8tyWc/Ab8Eo501SHs9l3b2J8snf
 w/5STd2CYxyKf1/9JLGnBvGo754O9NvdzBttRlygB14gCCtS/SDk/ELG2Ae+/a9P
 YgRk2+257h8PMD3qlp94dLidEZN4kYxP/J6oj0t1/TIkERWfZjzkg5tKn3/hEcU9
 qM97ZBTplTm6FM+Dt/Vk
 =zCVK
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...
2015-02-21 12:30:30 -08:00
Linus Torvalds
a233bb742a ARM: SoC DT updates
DT changes continue to be the bulk of our merge window contents.
 
 We continue to have a large set of changes across the board as new platforms
 and drivers are added.
 
 Some of the new platforms are:
 - Alphascale ASM9260
 - Marvell Armada 388
 - CSR Atlas7
 - TI Davinci DM816x
 - Hisilicon HiP01
 - ST STiH418
 
 There have also been some sweeping changes, including relicensing of DTS
 contents from GPL to GPLv2+/X11 so that the same files can be reused in
 other non-GPL projects more easily. There's also been changes to the
 DT Makefile to make it a little less conflict-ridden and churny down
 the road.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU4u0bAAoJEIwa5zzehBx3XFQP+wbVDp39ay3SRanFWeXqhfTe
 6jRsYrOcq6BN/b1NugjD+yKIYp2MQhwlXbMmj/1vnmJ3XSY25ZMLlgs0/vsNk7W2
 5e0xySwdhd1DjsajhZyN+5gUgqcTgOof/V+CbEUkijDDJ9v/WJbGZrpCHDz+UVTh
 dG9p1vrKoxDELAVbnp9muKZPlaQkAM60zJcHNJw9bJB5M0RCx4XFwPZc1cDLIsIZ
 lK/uYpKsgvgrGw5QuCtEK1/NkqLkBqgBfVg6xq0VB6OCYetqpxqs7kSZjnncIhQc
 PvxShsIJzb/dgfk7xBVb1+4Jfe5L/4poFwS69QuBlr/wiwc7wrhv37edgkyDlclS
 aj5xfOIhQdDaTkknFVs4QEkGAFg/lnTZnmiNiQdlsmDHqbWdTEELKShdVeMO7Zsg
 6bPdDipA2jsQ86UWNwucis8QulzVTuyNuU+Mlrxp73b76+hKXLkbYcZ51FJ/xMD8
 wLpCGqtc9Quirdb7Wy7XiVfesv3lKfDmzZB/6ZJ6zfadDvsqJPxAjNTA8VYZ9YeT
 EyW4K6CMOa5v+sLmIQUsAjKCYaul3PVDCi4voQjpS1ZtPLw+WN3zqX5XZZDT9Ll2
 D1ycmInp/40KsQgjV36u1NlIKMM+oaUJaSzaSPGdgj3Zcw0YZi8O+h0m6iHrlzUB
 uGFufsLKmcOFY/sLwprt
 =XEw1
 -----END PGP SIGNATURE-----

Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "DT changes continue to be the bulk of our merge window contents.

  We continue to have a large set of changes across the board as new
  platforms and drivers are added.

  Some of the new platforms are:
   - Alphascale ASM9260
   - Marvell Armada 388
   - CSR Atlas7
   - TI Davinci DM816x
   - Hisilicon HiP01
   - ST STiH418

  There have also been some sweeping changes, including relicensing of
  DTS contents from GPL to GPLv2+/X11 so that the same files can be
  reused in other non-GPL projects more easily.  There's also been
  changes to the DT Makefile to make it a little less conflict-ridden
  and churny down the road"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits)
  ARM: dts: Add PPMU node for exynos4412-trats2
  ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato
  ARM: dts: Add PPMU dt node for exynos4 and exynos4210
  ARM: dts: Add PPMU dt node for exynos3250
  ARM: dts: add mipi dsi device node for exynos4415
  ARM: dts: add fimd device node for exynos4415
  ARM: dts: Add syscon phandle to the video-phy node for Exynos4
  ARM: dts: Add sound nodes for exynos4412-trats2
  ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2
  ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi
  ARM: dts: Add max77693 charger node for exynos4412-trats2
  ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2
  ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2
  ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2
  ARM: dts: am57xx-beagle-x15: Fix USB2 mode
  ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB
  ARM: dts: dra72-evm: Add extcon nodes for USB
  ARM: dts: dra7-evm: Add extcon nodes for USB
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ...
2015-02-17 09:36:52 -08:00
Michael Turquette
54eea32f7e Merge branch 'clk-next' into v3.19-rc7 2015-02-02 14:59:38 -08:00
Maxime Ripard
117a2cc38f ARM: sunxi: dt: Fix aliases
Commit f77d55a3b5 ("serial: 8250_dw: get index of serial line from DT
aliases") made the serial driver now use the serial aliases to get the tty
number, pointing out that our aliases have been wrong all along.

Remove them from the DTSI and add custom ones in the relevant boards.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-25 18:06:34 +01:00
Chen-Yu Tsai
32a5d2d170 ARM: dts: sun5i: Add cpu thermal zones to dtsi
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:10 +01:00
Hans de Goede
fd18c7eac0 ARM: dts: sunxi: Add simplefb nodes for de_be0-lcd0, de_be0-lcd0-tve0 pipelines
Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0"
display pipelines for when u-boot has set up a pipeline to drive a LCD panel /
VGA output rather then the HDMI output.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:03 +01:00
Chen-Yu Tsai
882facf740 ARM: dts: sun5i: Add cpu clock reference and operating points to dtsi
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.

The operating points were taken from the A13 FEX files in the
sunxi-boards repository. All FEX files have the same settings.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:59 +01:00
Chen-Yu Tsai
41e7afb1c1 ARM: dts: sunxi: Enable thermal sensor support for RTP on sun[457]i
Now that the resistive touchpanel driver supports thermal sensors,
add the "#thermal-sensor-cells" property as required by the thermal
framework.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:58 +01:00
Maxime Ripard
092a0c3b18 ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodes
The pinctrl nodes require some extra opaque arguments for the pull up and drive
strength values.

Introduce a new header file and convert the device trees to replace these
opaque numbers by defines.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:57 +01:00
Maxime Ripard
1f9f6a7873 ARM: sunxi: DT: Convert the DTs to use a header for the DMA arguments
The DMA engine for the A10/A20 and derivatives require an opaque extra
argument.

Add a dt-bindings header, and convert the device trees to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:56 +01:00
Maxime Ripard
7145570159 ARM: sunxi: DT: Convert to device tree includes
Prepare the device trees to use the C preprocessor.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:55 +01:00
Hans de Goede
ec011af59e ARM: dts: sun5i: Add lradc node
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:53 +01:00
Maxime Ripard
d8c3a392a5 ARM: sunxi: dt: Add sample and output mmc clocks
Add the sample and output clocks for the MMC phase support.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
2015-01-14 10:45:26 +01:00
Chen-Yu Tsai
4dba4185e3 ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5i
usbphy0 support in the sunxi usb-phy driver has been merged, but the
dtsi's for sun4i/sun5i haven't been updated. This results in the phy
driver failing to load, breaking usb support.

Fixes: 6827a46f59 ('phy: sun4i: add support for USB phy0')
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-12-21 23:50:17 +01:00
Emilio López
acbcc0f03b ARM: dts: sunxi: unify APB1 clock
With the new factors infrastructure in place, we can unify apb1 and
apb1_mux as a single clock now.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
[wens@csie.org: Change apb1 node label to "apb1"; reword commit title]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-11-23 17:02:55 +01:00
Linus Torvalds
c0fa2373f8 The clk tree changes for 3.18 are dominated by clock drivers. Mostly
fixes and enhancements to existing drivers as well as new drivers. This
 tag contains a bit more arch code than I usually take due to some OMAP2+
 changes. Additionally it contains the restart notifier handlers which
 are merged as a dependency into several trees.
 
 The PXA changes are the only messy part. Due to having a stable tree I
 had to revert one patch and follow up with one more fix near the tip of
 this tag. Some dead code is introduced but it will soon become live code
 after 3.18-rc1 is released as the rest of the PXA family is converted
 over to the common clock framework.
 
 Another trend in this tag is that multiple vendors have started to push
 the complexity of changing their CPU frequency into the clock driver,
 whereas this used to be done in CPUfreq drivers.
 
 Changes to the clk core include a generic gpio-clock type and a
 clk_set_phase() function added to the top-level clk.h api. Due to some
 confusion on the fbdev mailing list the kernel boot parameters
 documentation was updated to further explain the clk_ignore_unused
 parameter, which is often required by users of the simplefb driver.
 Finally some fixes to the locking around the clock debugfs stuff was
 done to prevent deadlocks when interacting with other subsystems.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJUMu8gAAoJEDqPOy9afJhJ+GwP/3aU1PzhEPooZ3sZ5hkhmRYc
 RTzNZAODuOGbGnAiNQcr8XW3LJ6wKz5TSzzUC8IQkTcYM1Tsc7s5B6v+nMOkR2Jh
 sfrlnDEV/dsW9/3QADFuBowCaZdsaZnHn96RDhTmyDlPjh4HRR2k8ITT+TREbFrd
 cHDWy4QnI0u4NzhKtitvgW2770HyBpr31v5IdoRhVi5whoiBNL49BPwhwDWhwZVe
 w6qvc0jV8FK9Ra/Q7Vw6r3tiKkpO/upqVFDrsO831mp2qDcQvtOgNW9H2fjcobaX
 3/KCbs1TZs39e71RsEGwCvmCudXkTgO1wUJ86MuCLHeb2o78Vx8EYie02/RApTOJ
 0KGR+kFouggy2naeH8pXiTZk2HWMCbut6NQ1+AVbea5Em7hgHbYaQN71wVFKR4L7
 QL+TugrIg81fGWSvxoTo6fsbEiKOUdhXvHFWP5etKHL+Ll+7ku05ojHLOZgEEwTf
 zFWSSF4XSFQtuQD1gup0pSfoLs6qVR57l8FsrxfRPK9jGttg5z1wyNkY+585ptim
 eyTn4mkvkx9t9Sx47VRj9WPcPr2SW1w8lTMw1WqKfHG7AEUJHHkRQThQmiU82b47
 dTls4BBZ6sVZ8wj0V4zvnvbmtdYohOmBqNDEYx+a0dzPKstcAJyZgcjWBc13zds4
 rIKKxhiU7jGWH4qnJLrx
 =w2rN
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux

Pull clock tree updates from Mike Turquette:
 "The clk tree changes for 3.18 are dominated by clock drivers.  Mostly
  fixes and enhancements to existing drivers as well as new drivers.
  This tag contains a bit more arch code than I usually take due to some
  OMAP2+ changes.  Additionally it contains the restart notifier
  handlers which are merged as a dependency into several trees.

  The PXA changes are the only messy part.  Due to having a stable tree
  I had to revert one patch and follow up with one more fix near the tip
  of this tag.  Some dead code is introduced but it will soon become
  live code after 3.18-rc1 is released as the rest of the PXA family is
  converted over to the common clock framework.

  Another trend in this tag is that multiple vendors have started to
  push the complexity of changing their CPU frequency into the clock
  driver, whereas this used to be done in CPUfreq drivers.

  Changes to the clk core include a generic gpio-clock type and a
  clk_set_phase() function added to the top-level clk.h api.  Due to
  some confusion on the fbdev mailing list the kernel boot parameters
  documentation was updated to further explain the clk_ignore_unused
  parameter, which is often required by users of the simplefb driver.

  Finally some fixes to the locking around the clock debugfs stuff was
  done to prevent deadlocks when interacting with other subsystems."

* tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux: (99 commits)
  clk: pxa clocks build system fix
  Revert "arm: pxa: Transition pxa27x to clk framework"
  clk: samsung: register restart handlers for s3c2412 and s3c2443
  clk: rockchip: add restart handler
  clk: rockchip: rk3288: i2s_frac adds flag to set parent's rate
  doc/kernel-parameters.txt: clarify clk_ignore_unused
  arm: pxa: Transition pxa27x to clk framework
  dts: add devicetree bindings for pxa27x clocks
  clk: add pxa27x clock drivers
  arm: pxa: add clock pll selection bits
  clk: dts: document pxa clock binding
  clk: add pxa clocks infrastructure
  clk: gpio-gate: Ensure gpiod_ APIs are prototyped
  clk: ti: dra7-atl-clock: Mark the device as pm_runtime_irq_safe
  clk: ti: LLVMLinux: Move __init outside of type definition
  clk: ti: consider the fact that of_clk_get() might return an error
  clk: ti: dra7-atl-clock: fix a memory leak
  clk: ti: change clock init to use generic of_clk_init
  clk: hix5hd2: add I2C clocks
  clk: hix5hd2: add watchdog0 clocks
  ...
2014-10-15 07:05:03 +02:00
Maxime Ripard
7868c5ebdb ARM: sunxi: dt: Switch to the new mbus compatible
Now that we have a compatible of its own for the mbus clock, switch to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27 08:58:02 +02:00
Chen-Yu Tsai
447a0470a7 ARM: dt: sunxi: Remove i2c controller clock-frequency that matches default
The clock-frequency values of the i2c controller nodes match the
defaults of the driver. Remove the properties to use the defaults,
and be consistent with sun8i.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-08-18 19:51:50 +02:00
Emilio López
fed4c5c676 ARM: sun5i: dt: enable DMA on SPI
All of our SPI controllers support DMA transfers, so let's add the
properties here so they can be used when it's best to do so.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-08-17 09:57:12 +02:00
Emilio López
6a5775e482 ARM: sun5i: dt: Add nodes to represent the DMA controllers
The A10S and A13 SoCs have sun4i-compatible DMA controllers. Let's add
the corresponding nodes to represent them on the device tree.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-08-17 09:57:10 +02:00
Chen-Yu Tsai
7d4ff96dd3 ARM: dts: sunxi: Add #interrupt-cells to pinctrl nodes
The pinctrl device is also an interrupt controller for external
interrupts. Add the missing #interrupt-cells property.

Also remove the unused #address-cells property.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: make the same change for sun4i, sun5i and sun6i]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-07-01 09:48:53 +02:00
Linus Torvalds
7b215de3d0 Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into next
Pull i2c updates from Wolfram Sang:
 "I2C has the following updates for 3.16:

   - major cleanups to the rcar and sh_mobile drivers
   - removal of nuc900 driver which had a compile error for years
   - usual bunch of driver updates, bugfixes and cleanups"

* 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (44 commits)
  i2c: pca954x: Fix compilation without CONFIG_GPIOLIB
  i2c: mux: pca954x: Use the descriptor-based GPIO API
  i2c: mpc: insert DR read in i2c_fixup()
  i2c: bfin: turn to Resource-managed API in probe function
  i2c: Make of_device_id array const
  i2c: remove unnecessary OOM messages
  i2c: designware-pci: Add Haswell PCI IDs
  i2c: designware: Add runtime PM hooks
  i2c: designware: Disable device on system suspend
  i2c: nuc900: remove driver
  i2c: imx: update i2c clock divider for each transaction
  i2c: imx: fix the i2c bus hang issue when do repeat restart
  i2c: rcar: update copyright and license information
  i2c: rcar: janitorial cleanup after refactoring
  i2c: rcar: reuse status bits as enable bits
  i2c: rcar: remove spinlock
  i2c: rcar: refactor status bit handling
  i2c: rcar: refactor setting up msg
  i2c: rcar: check bus free before first message
  i2c: rcar: refactor irq state machine
  ...
2014-06-06 12:26:57 -07:00
Maxime Ripard
d275545e0e ARM: sunxi: dt: Convert to the new i2c compatibles
Switch the device tree to the new compatibles introduced in the i2c drivers
to have a common pattern accross all Allwinner SoCs.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-05-22 10:10:28 +02:00