Commit Graph

9 Commits

Author SHA1 Message Date
Rob Herring
8dccafaa28 arm: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-20 00:37:54 +02:00
Suman Anna
7d856409db ARM: dts: keystone-k2e: Add DSP node
The Keystone 2 66AK2E SoC has one TMS320C66x DSP Core Subsystem
(C66x CorePac), with a 1.4 GHz C66x Fixed or Floating-Point DSP
Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add the
DT node for this DSP processor sub-system. The processor does
not have a MMU, and uses various IPC Generation registers and
shared memory for inter-processor communication. The alias with
a stem 'rproc' has also been added for the DSP, it provides a
fixed remoteproc id for the DSP processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:05 -07:00
Suman Anna
0623013ca6 ARM: dts: keystone-k2e: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.

Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2E SoCs.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-01-19 09:44:11 -08:00
Suman Anna
88bd822491 ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor
The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c1f0000
on 66AK2E SoCs, so add a reserved child node for the same.

This address is aligned to the values used within the latest boot
monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
address to end of MSMC").

[1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-01-07 12:33:08 -08:00
Suman Anna
75eaf87241 ARM: dts: keystone-k2e: Add MSM RAM node
Add the RAM managed by the Multicire Shared Memory Controller (MSMC)
as a mmio-sram node. The 66AK2E SoCs have 2 MB of such memory. Any
specific MSM memory range needed by a software module ought to be
reserved using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-01-07 12:33:08 -08:00
Grygorii Strashko
644978440c ARM: dts: keystone: specify usb mode explicitly
The USB OTG mode is not supported by Kestone 2 devices, as result, the
USB devices enumeration and detection will not work properly when
kernel is built with CONFIG_USB_DWC3_DUAL_ROLE=y (default for multi
platform build):
 - it's required to load gadget drivers manually to make host mode
work and this confuses current Keystone 2 users
 - device mode is not working, because port can't detect and switch to
peripheral/host mode dynamically.

Hence, specify usb mode explicitly in DT: usb0 = "host" for all KS2
devices and usb1 = "peripheral" for K2E.

Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2016-08-31 16:29:59 -04:00
Murali Karicheri
a9e5b20dd9 ARM: dts: keystone: add interrupt property to PCI controller bindings
Now that Keystone PCIe controller supports error interrupt handling
add interrupt property to PCI controller DT bindings to enable
error interrupt handling.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2016-06-08 16:06:43 -07:00
Murali Karicheri
59e13aac82 ARM: dts: keystone: remove bogus IO resource entry from PCI binding
The PCI DT bindings contain a bogus entry for IO space which is not
supported on Keystone. The current bogus entry has an invalid size
and throws following error during boot.

[0.420713] keystone-pcie 21021000.pcie: error -22: failed to map
           resource [io  0x0000-0x400000003fff]

So remove it from the dts. While at it also add a bus-range
value that eliminates following log at boot up.

[0.420659] No bus range found for /soc/pcie@21020000, using [bus 00-ff]

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2016-06-08 16:06:43 -07:00
Nishanth Menon
5edafc2982 ARM: dts: k2*: Rename the k2* files to keystone-k2* files
As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.

Script for the same (and hand modified for Makefile and MAINTAINERS
files):
for i in arch/arm/boot/dts/k2*
do
	b=`basename $i`;
	git mv $i arch/arm/boot/dts/keystone-$b;
	sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si]
done

NOTE: bootloaders that depend on older dtb names will need to be
updated as well.

[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2016-04-13 08:51:27 -07:00