Commit Graph

183 Commits

Author SHA1 Message Date
Thierry Reding
7b1d418505 gpu: host1x: Set OF node for new host1x devices
We use the OF node of the host1x device's parent because it's the
closest we have.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-30 11:47:44 +01:00
Arto Merilainen
d4b5781890 gpu: host1x: Add locking to syncpt
Currently syncpoints are not locked by mutex and this causes races
if we are aggressively freeing and allocating syncpoints.

This patch adds missing mutex protection to syncpoint structures.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
[treding@nvidia.com: use better label names, don't reset local variable]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-11 15:33:13 +01:00
Arto Merilainen
f08ef2d1a1 gpu: host1x: Store device address to all bufs
Currently job pinning is optimized to handle only the first buffer
using a certain host1x_bo object and all subsequent buffers using
the same host1x_bo are considered done.

In most cases this is correct, however, in case the same host1x_bo
is used in multiple gathers inside the same job, we skip also
storing the device address (physical or iova) to this buffer.

This patch reworks the host1x_job_pin() to store the device address
to all gathers.

Signed-off-by: Andrew Chew <achew@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-11 15:21:07 +01:00
Thierry Reding
87904c3e82 drm/tegra: dsi: Enhance runtime power management
The MIPI DSI output on Tegra SoCs requires some external logic to
calibrate the MIPI pads before a video signal can be transmitted. This
MIPI calibration logic requires to be powered on while the MIPI pads are
being used, which is currently done as part of the DSI driver's probe
implementation.

This is suboptimal because it will leave the MIPI calibration logic
powered up even if the DSI output is never used.

On Tegra114 and earlier this behaviour also causes the driver to hang
while trying to power up the MIPI calibration logic because the power
partition that contains the MIPI calibration logic will be powered on
by the display controller at output pipeline configuration time. Thus
the power up sequence for the MIPI calibration logic happens before
it's power partition is guaranteed to be enabled.

Fix this by splitting up the API into a request/free pair of functions
that manage the runtime dependency between the DSI and the calibration
modules (no registers are accessed) and a set of enable, calibrate and
disable functions that program the MIPI calibration logic at points in
time where the power partition is really enabled.

While at it, make sure that the runtime power management also works in
ganged mode, which is currently also broken.

Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 15:58:57 +02:00
Thierry Reding
4b92e2948f gpu: host1x: Remove useless local variable
The local 'val' variable is used to store a value and immediately return
it to its caller, and hence serves no purpose. Just drop it and directly
return the value.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:33 +02:00
Thierry Reding
9f2e57cada gpu: host1x: Constify array of action handlers
This array never needs to be modified and therefore can be read-only
data.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:31 +02:00
Thierry Reding
813a9d4ecd gpu: host1x: Remove redundant parentheses
There's no need to wrap the BIT() macro into an extra set of parentheses
because it's already implemented to use its own set.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:31 +02:00
Thierry Reding
0b8070d12e gpu: host1x: Whitespace cleanup for readability
Insert a number of blank lines in places where they increase readability
of the code. Also collapse various variable declarations to shorten some
functions and finally rewrite some code for readability.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:30 +02:00
Thierry Reding
6df633d0dc gpu: host1x: Fix a couple of checkpatch warnings
Fix a couple of occurrences where no blank line was used to separate
variable declarations from code or where block comments were wrongly
formatted.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:28 +02:00
Thierry Reding
b47a049196 gpu: host1x: syncpt: Use kcalloc() instead of kzalloc()
Use kcalloc() to allocate arrays rather than passing the product of the
size per element by the number of elements to kzalloc().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:28 +02:00
Thierry Reding
ebb2475c47 gpu: host1x: cdma: Drop unnecessary local variable
The local 'pos' variable doesn't serve any purpose other than being a
shortcut for pb->pos, but the result doesn't remove much, so simply drop
the local variable.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:27 +02:00
Thierry Reding
e18e33afa4 gpu: host1x: channel: Use correct type
find_first_zero_bit() returns an unsigned long, so make the local
variable that stores the result the same type for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:26 +02:00
Thierry Reding
5c0d8d386b gpu: host1x: Use unsigned int consistently for IDs
IDs can never be negative so use unsigned int. In some instances an
explicitly sized type (such as u32) was used for no particular reason,
so turn those into unsigned int as well for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:24 +02:00
Thierry Reding
14c95fc896 gpu: host1x: Consistently use unsigned int for counts
The number of channels, syncpoints, bases and mlocks can never be
negative, so use unsigned int instead of int. Also make loop variables
the same type for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:23 +02:00
Bhaktipriya Shridhar
57574bd779 gpu: host1x: hw: intr_hw: Remove create_workqueue
System workqueues have been able to handle high level of concurrency
for a long time now and there's no reason to use dedicated workqueues
just to gain concurrency. Since the workqueue host->intr_wq is involved
in sync point interrupts, and sync point wait and is not being used on
a memory reclaim path, dedicated host->intr_wq has been replaced with the
use of system_wq.

Unlike a dedicated per-cpu workqueue created with create_workqueue(),
system_wq allows multiple work items to overlap executions even on
the same CPU; however, a per-cpu workqueue doesn't have any CPU
locality or global ordering guarantees unless the target CPU is
explicitly specified and thus the increase of local concurrency
shouldn't make any difference.

cancel_work_sync() has been used  in _host1x_free_syncpt_irq() to ensure
that no work is pending by the time exit path runs.

Signed-off-by: Bhaktipriya Shridhar <bhaktipriya96@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-23 11:59:22 +02:00
Arnd Bergmann
287980e49f remove lots of IS_ERR_VALUE abuses
Most users of IS_ERR_VALUE() in the kernel are wrong, as they
pass an 'int' into a function that takes an 'unsigned long'
argument. This happens to work because the type is sign-extended
on 64-bit architectures before it gets converted into an
unsigned type.

However, anything that passes an 'unsigned short' or 'unsigned int'
argument into IS_ERR_VALUE() is guaranteed to be broken, as are
8-bit integers and types that are wider than 'unsigned long'.

Andrzej Hajda has already fixed a lot of the worst abusers that
were causing actual bugs, but it would be nice to prevent any
users that are not passing 'unsigned long' arguments.

This patch changes all users of IS_ERR_VALUE() that I could find
on 32-bit ARM randconfig builds and x86 allmodconfig. For the
moment, this doesn't change the definition of IS_ERR_VALUE()
because there are probably still architecture specific users
elsewhere.

Almost all the warnings I got are for files that are better off
using 'if (err)' or 'if (err < 0)'.
The only legitimate user I could find that we get a warning for
is the (32-bit only) freescale fman driver, so I did not remove
the IS_ERR_VALUE() there but changed the type to 'unsigned long'.
For 9pfs, I just worked around one user whose calling conventions
are so obscure that I did not dare change the behavior.

I was using this definition for testing:

 #define IS_ERR_VALUE(x) ((unsigned long*)NULL == (typeof (x)*)NULL && \
       unlikely((unsigned long long)(x) >= (unsigned long long)(typeof(x))-MAX_ERRNO))

which ends up making all 16-bit or wider types work correctly with
the most plausible interpretation of what IS_ERR_VALUE() was supposed
to return according to its users, but also causes a compile-time
warning for any users that do not pass an 'unsigned long' argument.

I suggested this approach earlier this year, but back then we ended
up deciding to just fix the users that are obviously broken. After
the initial warning that caused me to get involved in the discussion
(fs/gfs2/dir.c) showed up again in the mainline kernel, Linus
asked me to send the whole thing again.

[ Updated the 9p parts as per Al Viro  - Linus ]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Link: https://lkml.org/lkml/2016/1/7/363
Link: https://lkml.org/lkml/2016/5/27/486
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> # For nvmem part
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-27 15:26:11 -07:00
Linus Torvalds
266c73b777 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "This is the main drm pull request for 4.6 kernel.

  Overall the coolest thing here for me is the nouveau maxwell signed
  firmware support from NVidia, it's taken a long while to extract this
  from them.

  I also wish the ARM vendors just designed one set of display IP, ARM
  display block proliferation is definitely increasing.

  Core:
     - drm_event cleanups
     - Internal API cleanup making mode_fixup optional.
     - Apple GMUX vga switcheroo support.
     - DP AUX testing interface

  Panel:
     - Refactoring of DSI core for use over more transports.

  New driver:
     - ARM hdlcd driver

  i915:
     - FBC/PSR (framebuffer compression, panel self refresh) enabled by default.
     - Ongoing atomic display support work
     - Ongoing runtime PM work
     - Pixel clock limit checks
     - VBT DSI description support
     - GEM fixes
     - GuC firmware scheduler enhancements

  amdkfd:
     - Deferred probing fixes to avoid make file or link ordering.

  amdgpu/radeon:
     - ACP support for i2s audio support.
     - Command Submission/GPU scheduler/GPUVM optimisations
     - Initial GPU reset support for amdgpu

  vmwgfx:
     - Support for DX10 gen mipmaps
     - Pageflipping and other fixes.

  exynos:
     - Exynos5420 SoC support for FIMD
     - Exynos5422 SoC support for MIPI-DSI

  nouveau:
     - GM20x secure boot support - adds acceleration for Maxwell GPUs.
     - GM200 support
     - GM20B clock driver support
     - Power sensors work

  etnaviv:
     - Correctness fixes for GPU cache flushing
     - Better support for i.MX6 systems.

  imx-drm:
     - VBlank IRQ support
     - Fence support
     - OF endpoint support

  msm:
     - HDMI support for 8996 (snapdragon 820)
     - Adreno 430 support
     - Timestamp queries support

  virtio-gpu:
     - Fixes for Android support.

  rockchip:
     - Add support for Innosilicion HDMI

  rcar-du:
     - Support for 4 crtcs
     - R8A7795 support
     - RCar Gen 3 support

  omapdrm:
     - HDMI interlace output support
     - dma-buf import support
     - Refactoring to remove a lot of legacy code.

  tilcdc:
     - Rewrite of pageflipping code
     - dma-buf support
     - pinctrl support

  vc4:
     - HDMI modesetting bug fixes
     - Significant 3D performance improvement.

  fsl-dcu (FreeScale):
     - Lots of fixes

  tegra:
     - Two small fixes

  sti:
     - Atomic support for planes
     - Improved HDMI support"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1063 commits)
  drm/amdgpu: release_pages requires linux/pagemap.h
  drm/sti: restore mode_fixup callback
  drm/amdgpu/gfx7: add MTYPE definition
  drm/amdgpu: removing BO_VAs shouldn't be interruptible
  drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
  drm/amd/powerplay: show uvd/vce power gate info for fiji
  drm/amdgpu: use sched fence if possible
  drm/amdgpu: move ib.fence to job.fence
  drm/amdgpu: give a fence param to ib_free
  drm/amdgpu: include the right version of gmc header files for iceland
  drm/radeon: fix indentation.
  drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
  drm/amdgpu: switch back to 32bit hw fences v2
  drm/amdgpu: remove amdgpu_fence_is_signaled
  drm/amdgpu: drop the extra fence range check v2
  drm/amdgpu: signal fences directly in amdgpu_fence_process
  drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
  drm/amdgpu: keep all fences in an RCU protected array v2
  drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
  drm/amdgpu: RCU protected amd_sched_fence_release
  ...
2016-03-21 13:48:00 -07:00
Dave Airlie
0e5dc9a8ee drm/tegra: Changes for v4.6-rc1
Only two cleanups this time around. One fixes reference counting of
 device tree nodes, the other changes the return value of a function
 from an unsigned int to an int to reflect that it will return error
 codes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJW6VWqAAoJEN0jrNd/PrOh+r0P/AxAXkCrsEUplWergcI13aTe
 d3YV/PD52mT6hf9NMG13xfvBbJ0uHRrmeYkGi6BYaOHEx9QcT7J1wY0Poi4shPUM
 86Ru5hXiyMsrgoz1HB6CnoGXk9/4YG6r64KTgPI7b2EAHV9akN0hDHq9AffBTzNs
 A/THQQadvLvbB3wXSYveImhORInzvXNsZvF7dUADHgfj/SQr31wN4p1p5L8eY3gm
 DV6+PdZW46AzruOYKgHqmjKhOsdKP2rCcGwfuMaGUuPVEP2dsmaNnSDB4FUfiw/1
 FB4uA+4ruak3MmOVVSTk1EaKRNHewaZ/rVubr+SMqYBIJBRj1FA6LRkTUIJsJzCt
 vp+y/roSVUHBGZUmW9bHryuNfml6K44eIeLaa8MqUOIA9TkZB4NG2meJoHYTGsGN
 GfOYzuU1zplQ1fUSL/2TgFa/RHcfMEma5iBK25asBXM71Ycn3YGtzICAjw3/9ZjW
 zkvqJSBRbt03N/3WAv5pkH3N8zatk4Nmmza+9uzuGn7AwcluXI/GcKtBi9DLUykQ
 7X1KV8k2EHqM7FmZNUGCqr8hqJTh9SAsVrAGPVqbDsgVjuM1dg3RJGGEnXtFYrYY
 LNj12YUWVnargQpxITDzwqxMw9GDkTQExku4jiJSy2z8dN2N/+qpSExcoWWgnoj/
 Xu/VclG3VjTVIXDultRg
 =i5YM
 -----END PGP SIGNATURE-----

Merge tag 'drm/tegra/for-4.6-rc1' of http://anongit.freedesktop.org/git/tegra/linux into drm-next

drm/tegra: Changes for v4.6-rc1

Only two cleanups this time around. One fixes reference counting of
device tree nodes, the other changes the return value of a function
from an unsigned int to an int to reflect that it will return error
codes.

* tag 'drm/tegra/for-4.6-rc1' of http://anongit.freedesktop.org/git/tegra/linux:
  gpu: host1x: Use a signed return type for do_relocs()
  gpu: host1x: bus: Add missing of_node_put()
2016-03-17 08:08:57 +10:00
Markus Elfring
341917fe2b gpu: host1x: Use a signed return type for do_relocs()
The return type "unsigned int" was used by the do_relocs() function
despite the fact that it will eventually return a negative error code.
Use a signed integer instead to accomodate for error codes.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-16 13:45:44 +01:00
Amitoj Kaur Chawla
93ec302976 gpu: host1x: bus: Add missing of_node_put()
for_each_child_of_node() performs an of_node_get() on each iteration, so
to break out of the loop an of_node_put() is required.

Found using Coccinelle. The semantic patch used for this is as follows:

// <smpl>
@@
expression e;
local idexpression n;
@@

 for_each_child_of_node(..., n) {
   ... when != of_node_put(n)
       when != e = n
(
   return n;
|
+  of_node_put(n);
?  return ...;
)
   ...
 }
// </smpl>

Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-16 13:45:43 +01:00
Luis R. Rodriguez
f6e45661f9 dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
Rename dma_*_writecombine() to dma_*_wc(), so that the naming
is coherent across the various write-combining APIs. Keep the
old names for compatibility for a while, these can be removed
at a later time. A guard is left to enable backporting of the
rename, and later remove of the old mapping defines seemlessly.

Build tested successfully with allmodconfig.

The following Coccinelle SmPL patch was used for this simple
transformation:

@ rename_dma_alloc_writecombine @
expression dev, size, dma_addr, gfp;
@@

-dma_alloc_writecombine(dev, size, dma_addr, gfp)
+dma_alloc_wc(dev, size, dma_addr, gfp)

@ rename_dma_free_writecombine @
expression dev, size, cpu_addr, dma_addr;
@@

-dma_free_writecombine(dev, size, cpu_addr, dma_addr)
+dma_free_wc(dev, size, cpu_addr, dma_addr)

@ rename_dma_mmap_writecombine @
expression dev, vma, cpu_addr, dma_addr, size;
@@

-dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
+dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)

We also keep the old names as compatibility helpers, and
guard against their definition to make backporting easier.

Generated-by: Coccinelle SmPL
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bhelgaas@google.com
Cc: bp@suse.de
Cc: dan.j.williams@intel.com
Cc: daniel.vetter@ffwll.ch
Cc: dhowells@redhat.com
Cc: julia.lawall@lip6.fr
Cc: konrad.wilk@oracle.com
Cc: linux-fbdev@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: luto@amacapital.net
Cc: mst@redhat.com
Cc: tomi.valkeinen@ti.com
Cc: toshi.kani@hp.com
Cc: vinod.koul@intel.com
Cc: xen-devel@lists.xensource.com
Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-03-09 14:57:51 +01:00
Alexandre Courbot
c95469aa5a gpu: host1x: Set DMA ops on device creation
Currently host1x-instanciated devices have their dma_ops left to NULL,
which makes any DMA operation (like buffer import) on ARM64 fallback
to the dummy_dma_ops and fail with an error.

This patch calls of_dma_configure() with the host1x node when creating
such a device, so the proper DMA operations are set.

Suggested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-04 16:24:57 +01:00
Alexandre Courbot
097452e613 gpu: host1x: Set DMA mask
The default DMA mask covers a 32 bits address range, but host1x devices
can address a larger range on TK1 and TX1. Set the DMA mask to the range
addressable when we use the IOMMU to prevent the use of bounce buffers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-04 16:24:56 +01:00
Thierry Reding
a134789a67 gpu: host1x: Add Tegra210 support
The host1x unit found in Tegra210 SoCs is very similar to the unit in
Tegra124, but it has 2 additional channels for a total of 14 channels.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-14 10:50:33 +01:00
Thierry Reding
e3e70814ce gpu: host1x: Remove core driver on unregister
When unregistering a host1x driver, make sure to unregister the core
driver as well to prevent it from sticking around and oppose reloading
of the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-14 10:50:33 +01:00
Thierry Reding
28fae81f93 gpu: host1x: Use platform_register/unregister_drivers()
These new helpers simplify implementing multi-driver modules and
properly handle failure to register one driver by unregistering all
previously registered drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-14 10:50:32 +01:00
Dmitry Osipenko
3fe2c7d4c8 gpu: host1x: Fix MLOCK's debug info
MLOCK's debug info, spewed on CDMA timeout, contains meaningless MLOCK
owner channel ID because HOST1X_SYNC_MLOCK_OWNER_CHID_F() returns shifted
value, while unshifted should be used. Fix it by changing '_F' to '_V'.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-02 14:40:12 +02:00
Thierry Reding
15372d4be7 gpu: host1x: mipi: Power down regulators when unused
Keep track of the number of users of DSI and CSI pads and power down the
regulators that supply the bricks when all users are gone.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:21 +02:00
Thierry Reding
5e7752436e gpu: host1x: mipi: Add Tegra210 support
Some changes are needed to the configuration settings for some lanes. In
addition, the clock lanes for the CSI pads can no longer be calibrated.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:20 +02:00
Thierry Reding
7fd3ecad3f gpu: host1x: mipi: Add Tegra132 support
While Tegra132 has the same pads as Tegra124, some configuration values
need to be programmed slightly differently.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:19 +02:00
Thierry Reding
c22fb79099 gpu: host1x: mipi: Constify OF match table
This table is never modified and can therefore reside in read-only
memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:18 +02:00
Thierry Reding
2ed264bf91 gpu: host1x: mipi: Clear calibration status
Before starting a new calibration cycle, make sure to clear the current
status by writing a 1 to the various "calibration done" bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:17 +02:00
Thierry Reding
8ed5c06232 gpu: host1x: mipi: Fix clock lane register for DSI
Use more consistent names for the clock lane configuration registers and
fix the offset of the upper clock lane configuration register for the
first DSI pad.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:16 +02:00
Thierry Reding
83a3c223cc gpu: host1x: mipi: Parameterize to support future SoCs
Parameterize more of the register programming to accomodate for changes
required by future SoC generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:15 +02:00
Thierry Reding
b4a20144e0 gpu: host1x: Export host1x_syncpt_read()
This function is used to read the current value of the syncpt and is
useful in situations where drivers don't schedule work and wait for the
syncpoint to increment. One particular use-case is using the syncpoint
as a VBLANK counter.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:20 +02:00
Thierry Reding
f4c5cf88fb gpu: host1x: Provide a proper struct bus_type
Previously the struct bus_type exported by the host1x infrastructure was
only a very basic skeleton. Turn that implementation into a more full-
fledged bus to support proper probe ordering and power management.

Note that the bus infrastructure needs to be available before any of the
drivers can be registered. This is automatically ensured if all drivers
are built as loadable modules (via symbol dependencies). If all drivers
are built-in there are no such guarantees and the link order determines
the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
host1x bus infrastructure is initialized prior to any of its users (only
drm/tegra currently).

v2: Fix building host1x and tegra-drm as modules
    Reported-by: Dave Airlie <airlied@gmail.com>

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:09:14 +01:00
Thierry Reding
99d2cd81d7 gpu: host1x: Factor out __host1x_device_del()
This function is needed in several places, so factor it out.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-23 12:07:01 +01:00
Thierry Reding
38d98de433 gpu: host1x: Call host1x_device_add() under lock
Instead of locking within host1x_device_add(), call it under the lock to
make the locking more consistent.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-23 12:07:01 +01:00
Thierry Reding
536e171522 gpu: host1x: Call ->remove() only when a device is bound
When a driver's ->probe() function fails, the host1x bus must not call
its ->remove() function because the driver will already have cleaned up
in the error handling path in ->probe().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-23 12:07:00 +01:00
Sean Paul
b298e98ef6 gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register
During calibration, sets the "internal reference level for drive pull-
down" to the value specified in the Tegra TRM.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:57 +01:00
Sean Paul
08a15cc34d gpu: host1x: mipi: Calibrate clock lanes
Include the clock lanes when calibrating the MIPI PHY on Tegra124
compatible devices.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
[treding@nvidia.com: bikeshedding]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:54 +01:00
Sean Paul
26f7a92a3a gpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL
By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE
("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the
description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states
that if the value of the prescale is 0 (or 0.1us), the filter should be
set between 2-5. However, the current code sets it to 0.

For now, let's keep the prescale and filter values as-is, which is most
likely the power-on-reset values of 0x2 and 0xa, respectively.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:51 +01:00
Thierry Reding
57b17ae71f gpu: host1x: mipi: Registers are 32 bits wide
On 64-bit platforms an unsigned long would be 64 bit and cause
unnecessary casting when being passed to writel() or returned from
readl(). Make register values 32 bits wide to avoid that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:48 +01:00
Thierry Reding
3880e95f27 gpu: host1x: Make gather offsets unsigned
Use the u32 type for the offset in the host1x_job_gather structure for
consistentcy with other structures. Negative offsets don't make sense in
this context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:44 +01:00
Thierry Reding
ba73fbc2ca gpu: host1x: Print address/offset pairs consistently
Consistently use a format of %pad+%#x to print address/offset in debug
messages.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:41 +01:00
Thierry Reding
7f27d60b28 gpu: host1x: Fix typo in comment
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:38 +01:00
Thierry Reding
0169b93f44 gpu: host1x: Make mapped field of push buffers void *
This reduces the amount of casting that needs to be done to get rid of
annoying warnings on 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:35 +01:00
Thierry Reding
b40d02bf96 gpu: host1x: Use struct host1x_bo pointers in traces
Rather than cast to a u32 use the struct host1x_bo pointers directly.
This avoid annoying warnings for 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:32 +01:00
Thierry Reding
961e3beae3 drm/tegra: Make job submission 64-bit safe
Job submission currently relies on the fact that struct drm_tegra_reloc
and struct host1x_reloc are the same size and uses a simple call to the
copy_from_user() function to copy them to kernel space. This causes the
handle to be stored in the buffer object field, which then needs a cast
to a 32 bit integer to resolve it to a proper buffer object pointer and
store it back in the buffer object field.

On 64-bit architectures that will no longer work, since pointers are 64
bits wide whereas handles will remain 32 bits. This causes the sizes of
both structures to because different and copying will no longer work.

Fix this by adding a new function, host1x_reloc_get_user(), that copies
the structures field by field.

While at it, use substructures for the command and target buffers in
struct host1x_reloc for better readability. Also use unsized types to
make it more obvious that this isn't part of userspace ABI.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04 10:07:36 +02:00
Thierry Reding
0c7dfd36b7 gpu: host1x: Rename internal functions for clarity
The internal host1x_{,un}register_client() functions can potentially be
confused with public the host1x_client_{,un}register() functions.

Rename them to host1x_{add,del}_client() to remove some of the possible
confusion.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-06-05 23:10:30 +02:00
Stephen Warren
22bbd5d949 gpu: host1x: handle the correct # of syncpt regs
BIT_WORD() truncates rather than rounds, so the loops in
syncpt_thresh_isr() and _host1x_intr_disable_all_syncpt_intrs() use <=
rather than < in an attempt to process the correct number of registers
when rounding of the conversion of count of bits to count of words is
necessary. However, when rounding isn't necessary because the value is
already a multiple of the divisor (as is the case for all values of
nb_pts the code actually sees), this causes one too many registers to
be processed.

Solve this by using and explicit DIV_ROUND_UP() call, rather than
BIT_WORD(), and comparing with < rather than <=.

Fixes: 7ede0b0bf3 ("gpu: host1x: Add syncpoint wait and interrupts")
Cc: <stable@vger.kernel.org> # 3.10
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-16 17:11:04 +02:00
Dave Airlie
82c68b6ccd drm/tegra: Changes for v3.15-rc1
Implement eDP support for Tegra124 and support the PRIME vmap()/vunmap()
 operations.
 
 A symbol that is required for upcoming V4L2 support is now exported by
 the host1x driver.
 
 Relicense drivers under the GPL v2 for consistency. One exception is the
 public header file, which is relicensed under MIT to abide by the common
 rule.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJTPlzgAAoJEN0jrNd/PrOhR2AQALMfTgwlcUb53NkYKyuotf1g
 dcUeCXrYlOZQhEkTEBkp8rjU3kYHcLieQW5NFUpVKMy4VTvb1nXPB0VrEJjajtrx
 coAzffIVzqhWOUz4iGHphoIhzfQ6xQTNCd8B2bT/4pdnHuHNt4A10blFfxlBYPwD
 2hw4alTYpaNhsSso3dDB2ORSKZsCWlFC/bPJVA/yGtrXon/CR8Q9sGIqcEnKa6fp
 gPfdxJChr2c5FeFIgQRnkt+MHOl+SgpkzxNXX5c5ffY6kt1HvKKJZfTv4cbOsSrn
 7xPtgv0PKiiGtReRXZxZKB/xOGKJBCDM2oXfv02pMT5bCIRTzpmkWne3cuU2b2Mn
 FN67ZBHCSPRiBcdHIc7pGwP8jIg21zZ/7IqWW9/4yAXksYV3Ii7TdQY3eL3PCrBP
 3802ygJznKuVx2S1xLMI7z4DXV+44cLCCWzmglWEQPQfKFCVgTsmuLr8HiM1Tj1m
 YvEibgL72ggDsInGF4nrwidEirvtRqHSn/qcD19p1gRORKxR8P7e9LUmWN/PHlkV
 iKfcaMyWpHuCLcCyKC2b9iieAtLDz1Hsn9MiaQ7BcZUVVMAS6OVrrrm14Q5Wbi/Z
 RxfF0hRjPDEXyrxo2LKrVLQbxeMhkmBfkc532YZCwSxoWvgScUfE73lB/kk68Iv2
 c0WnbuHrH41dslXH4yPl
 =LGu0
 -----END PGP SIGNATURE-----

Merge tag 'drm/tegra/for-3.15-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.15-rc1

Implement eDP support for Tegra124 and support the PRIME vmap()/vunmap()
operations.

A symbol that is required for upcoming V4L2 support is now exported by
the host1x driver.

Relicense drivers under the GPL v2 for consistency. One exception is the
public header file, which is relicensed under MIT to abide by the common
rule.

* tag 'drm/tegra/for-3.15-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: Use standard GPL v2 license text
  drm/tegra: Relicense under GPL v2
  drm/tegra: Relicense public header under MIT
  drm/tegra: Add eDP support
  gpu: host1x: export host1x_syncpt_incr_max() function
  drm/tegra: prime: Add vmap support
2014-04-05 16:13:08 +10:00
Bryan Wu
64400c3791 gpu: host1x: export host1x_syncpt_incr_max() function
Tegra V4L2 camera driver needs this function to do frame capture.

Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04 09:12:49 +02:00
Erik Faye-Lund
89e6e8c85f gpu: host1x: do not check previously handled gathers
When patching gathers, we don't need to check against
gathers with lower indices than the current one, as
they are guaranteed to already have been handled.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-02-12 07:50:37 +01:00
Thierry Reding
be2cd59b80 gpu: host1x: Remove unnecessary include
Nothing from the asm/mach/irq.h header is needed in this file, so there
is no need to include it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-14 14:39:45 +01:00
Thierry Reding
e6fff4aaf9 gpu: host1x: Add Tegra124 support
Tegra124 has 192 syncpoints whereas its predecessors had 32 syncpoints.
This required changes to the hardware register layout.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:52 +01:00
Thierry Reding
8e0d788c6f gpu: host1x: Fix build warnings
When debugfs support isn't enabled, gcc complains about some variables
being unused. To avoid further #ifdefery, move debugfs specific setup
code into static functions and use IS_ENABLED(CONFIG_DEBUG_FS) to have
the compiler, rather than the preprocessor, discard them when unused.
The advantage of doing it this way is that all the code will be
compile-tested whether or not debugfs support is enabled.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:52 +01:00
Thierry Reding
6f44c2b528 gpu: host1x: Increase compile test coverage
The ARCH_MULTIPLATFORM dependency was introduced back when Tegra didn't
support multiplatform yet as a means to allow the driver to be easily
compile-tested along with other DRM drivers. In the meantime, the new
COMPILE_TEST Kconfig option has been introduced for exactly that
purpose, so use that instead to clarify the intention.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:51 +01:00
Thierry Reding
aef03d3fa5 gpu: host1x: Fix more sparse warnings
Include the linux/host1x.h and dev.h headers so that function prototypes
are visible to keep sparse from suggesting that their implementations be
made static.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:51 +01:00
Thierry Reding
18b94f1cfb gpu: host1x: Use the correct HW headers for host1x02
An earlier patch added a subset of the required HW specific header files
but didn't actually include the right ones when compiling for host1x02.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:51 +01:00
Thierry Reding
fae798a156 gpu: host1x: Export public API
Make the public API symbols visible so that depending drivers can be
built as a module.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:50 +01:00
Thierry Reding
4de6a2d6ac gpu: host1x: Add MIPI pad calibration support
This driver adds support to perform calibration of the MIPI pads for CSI
and DSI.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19 09:29:43 +01:00
Thierry Reding
d24b2898ce gpu: host1x: Fix a few sparse warnings
Include the bus.h header, so that various function declarations are
visible in the source file that implements those functions. This keeps
sparse from suggesting that they should be made static.

Make the host1x_bus_type variable static since it isn't used globally.

Finally replace the slightly unsafe dev_set_name(dev, name) by the more
secure dev_set_name(dev, "%s", name).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-03 10:06:29 +01:00
Olof Johansson
43dd5554fc gpu: host1x: Silence a few warnings with LPAE=y
When building with LPAE=y (64-bit dma_addr_t), the following warnings are seen:

drivers/gpu/host1x/hw/cdma_hw.c:57:3: warning: format '%x' expects
  argument of type 'unsigned int', but argument 5 has type 'dma_addr_t'

drivers/gpu/host1x/hw/debug_hw.c:167:10: warning: format '%x' expects
  argument of type 'unsigned int', but argument 3 has type 'dma_addr_t'

The agreed-to solution for this is upcast to u64 and using %llx.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-28 15:13:47 +01:00
Arto Merilainen
f5a954fed9 gpu: host1x: Add syncpoint base support
This patch adds support for hardware syncpoint bases. This creates
a simple mechanism to stall the command FIFO until an operation is
completed.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:48 +01:00
Arto Merilainen
8736fe8153 gpu: host1x: Add 'flags' field to syncpt request
Functions host1x_syncpt_request() and _host1x_syncpt_alloc() have
been taking a separate boolean flag ('client_managed') for indicating
if the syncpoint value should be tracked by the host1x driver.

This patch converts the field into generic 'flags' field so that
we can easily add more information while requesting a syncpoint.
Clients are adapted to use the new interface accordingly.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:47 +01:00
Wei Yongjun
9c78c4c38e gpu: host1x: Disable clock on probe failure
Add a missing clk_disable_unprepare() before returning from the driver's
.probe() function on error.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:46 +01:00
Thierry Reding
5407f31bd3 gpu: host1x: Add support for Tegra114
Tegra114 uses a slightly updated version of host1x with an additional
syncpoint.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:41 +01:00
Thierry Reding
dee8268f8f drm/tegra: Move driver to DRM tree
In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
fc3be3e8fc gpu: host1x: Use relative include paths
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
776dc38403 drm/tegra: Move subdevice infrastructure to host1x
The Tegra DRM driver currently uses some infrastructure to defer the DRM
core initialization until all required devices have registered. The same
infrastructure can potentially be used by any other driver that requires
more than a single sub-device of the host1x module.

Make the infrastructure more generic and keep only the DRM specific code
in the DRM part of the driver. Eventually this will make it easy to move
the DRM driver part back to the DRM subsystem.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:33 +01:00
Thierry Reding
35d747a81d gpu: host1x: Expose syncpt and channel functionality
Expose the buffer objects, syncpoint and channel functionality in the
public public header so that drivers can use them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:11 +01:00
Thierry Reding
53fa7f7204 drm/tegra: Introduce tegra_drm_client structure
This structure derives from host1x_client. DRM-specific fields are moved
from host1x_client to this structure, so that host1x_client can remain
agnostic of DRM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
e1e906448d gpu: host1x: Make host1x header file public
In preparation to support host1x clients other than DRM, move this
header into a public location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
3be8274341 drm/tegra: gem: Miscellaneous cleanups
Rename the host1x_to_drm_bo() macro to host1x_to_tegra_bo() for
consistency and fixup various stylistic issues.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
a137ce3438 drm/tegra: Rename gr2d to tegra-gr2d
Other drivers use the tegra- prefix in their names, so add it to this
driver's name as well for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:09 +01:00
Thierry Reding
c1bef81fe7 drm/tegra: gr2d: Miscellaneous cleanups
Rework the address table code for the host1x firewall. The previous
implementation allocated a bitfield but didn't check for a valid pointer
so it could potentially crash. Instead, embed a static bitmap within the
gr2d structure to avoid the allocation and use the Linux bitmap API to
reduce code complexity.

Don't annotate the driver's .remove() function __exit. Even if built in
the driver can be unloaded via sysfs, so .remove() needs to stick around
after initialization. Also remove the explicit initialization of the
driver's .owner field to THIS_MODULE because that's now handled by the
driver core.

Furthermore make an error message more consistent with other subdrivers,
index the syncpts array for better readability, remove a gratuituous
newline and reorder some variable declarations to make the code easier
to read.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:09 +01:00
Thierry Reding
d77563ff56 gpu: host1x: firewall: Refactor register check
The same code sequence is used in various places to validate a register
access in the command stream. This can be refactored into a separate
function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
d7fbcf477a gpu: host1x: firewall: Rename cmdbuf_id -> cmdbuf
The value stored in this field is a pointer to a command buffer, not an
ID. Avoid some confusion by reflecting that in the field's name.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
37857cd2c5 gpu: host1x: Fix alignment of function arguments
Arguments on subsequent lines should be aligned with the first argument.
This one occurrence went unnoticed during code review.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
452e7f0cda gpu: host1x: Do not discard .remove()
The device can be unbound from the driver via sysfs, so regardless of
whether the driver is builtin or a module, its .remove() function needs
to stick around.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:07 +01:00
Thierry Reding
9eb9b220fc gpu: host1x: Cleanup includes
Most of the included files are either not required or already included
by some other header file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:07 +01:00
Thierry Reding
c88c363072 drm/tegra: Rename host1x_drm_context to tegra_drm_context
The structure represents a context associated with a particular process
that has opened the Tegra DRM device and requested a channel. This is a
very DRM-specific notion and has nothing to do with host1x. Rename the
structure to more clearly mark the boundaries between the two.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:06 +01:00
Thierry Reding
08943e6cbc drm/tegra: Rename host1x_drm_file to tegra_drm_file
This structure extends drm_file with Tegra DRM specific fields and has
nothing to do with host1x. Rename the structure to more clearly mark the
boundaries between host1x and Tegra DRM.

While at it, move the structure definition out of the header. It's never
used outside of the drm.c source file, so it can be defined within that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:06 +01:00
Thierry Reding
386a2a71e2 drm/tegra: Rename host1x_drm structure to tegra_drm
The host1x and Tegra DRM drivers are currently tightly coupled. Renaming
the structure marks the boundary more clearly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:05 +01:00
Thierry Reding
d18d303378 drm/tegra: Cleanup tegra_dc structure
Remove the unused host1x field from the structure and group the fields
more logically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:05 +01:00
Thierry Reding
77651e7173 drm/tegra: Remove unused fields
Some of the fields in struct host1x_drm haven't been used for a while,
so remove them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:05 +01:00
Thierry Reding
474318cabc gpu: host1x: Remove unused Makefile
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:04 +01:00
Erik Faye-Lund
a9ff999538 gpu: host1x: check relocs after all gathers are consumed
The num_relocs count are passed to the kernel per job, not per gather.

For multi-gather jobs, we would previously fail if there were relocs in
other gathers aside from the first one.

Fix this by simply moving the check until all gathers have been
consumed.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:04 +01:00
Ville Syrjälä
4423843cde drm: Make irq_enabled bool
irq_enabled is only ever 0 or 1, so make it a bool.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09 15:55:32 +10:00
Linus Torvalds
a09e9a7a4b Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm tree changes from Dave Airlie:
 "This is the main drm pull request, I have some overlap with sound and
  arm-soc, the sound patch is acked and may conflict based on -next
  reports but should be a trivial fixup, which I'll leave to you!

  Highlights:

   - new drivers:

     MSM driver from Rob Clark

   - non-drm:

     switcheroo and hdmi audio driver support for secondary GPU
     poweroff, so drivers can use runtime PM to poweroff the GPUs.  This
     can save 5 or 6W on some optimus laptops.

   - drm core:

     combined GEM and TTM VMA manager
     per-filp mmap permission tracking
     initial rendernode support (via a runtime enable for now, until we get api stable),
     remove old proc support,
     lots of cleanups of legacy code
     hdmi vendor infoframes and 4k modes
     lots of gem/prime locking and races fixes
     async pageflip scaffolding
     drm bridge objects

   - i915:

     Haswell PC8+ support and eLLC support, HDMI 4K support, initial
     per-process VMA pieces, watermark reworks, convert to generic hdmi
     infoframes, encoder reworking, fastboot support,

   - radeon:

     CIK PM support, remove 3d blit code in favour of DMA engines,
     Berlin GPU support, HDMI audio fixes

   - nouveau:

     secondary GPU power down support for optimus laptops, lots of
     fixes, use MSI, VP3 engine support

   - exynos:

     runtime pm support for g2d, DT support, remove non-DT,

   - tda998x i2c driver:

     lots of fixes for sync issues

   - gma500:

     lots of cleanups

   - rcar:

     add LVDS support, fbdev emulation,

   - tegra:

     just minor fixes"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (684 commits)
  drm/exynos: Fix build error with exynos_drm_connector.c
  drm/exynos: Remove non-DT support in exynos_drm_fimd
  drm/exynos: Remove non-DT support in exynos_hdmi
  drm/exynos: Remove non-DT support in exynos_drm_g2d
  drm/exynos: Remove non-DT support in exynos_hdmiphy
  drm/exynos: Remove non-DT support in exynos_ddc
  drm/exynos: Make Exynos DRM drivers depend on OF
  drm/exynos: Consider fallback option to allocation fail
  drm/exynos: fimd: move platform data parsing to separate function
  drm/exynos: fimd: get signal polarities from device tree
  drm/exynos: fimd: replace struct fb_videomode with videomode
  drm/exynos: check a pixel format to a particular window layer
  drm/exynos: fix fimd pixel format setting
  drm/exynos: Add NULL pointer check
  drm/exynos: Remove redundant error messages
  drm/exynos: Add missing of.h header include
  drm/exynos: Remove redundant NULL check in exynos_drm_buf
  drm/exynos: add device tree support for rotator
  drm/exynos: Add missing includes
  drm/exynos: add runtime pm interfaces to g2d driver
  ...
2013-09-05 10:17:26 -07:00
Dave Airlie
ef25bd84ed drm/tegra: Changes for v3.12-rc1
Only a couple of small patches this time around. These are mostly fixes
 for minor bugs that showed up, but there is also some preparatory work
 that will come in handy for future patches.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.21 (GNU/Linux)
 
 iQIcBAABAgAGBQJSJZy2AAoJEN0jrNd/PrOhjRgP/jWJhT/HaHsJtbVMy/txSDjP
 s8EYir6lPflk2Eq12+QEjRtlUp7vov3U19G4LL4/XCsDY72dNAc3NKsIBPnZYADs
 nPk8P3FsICa9pwcilJczSHAP9G83mqkawa7WACQFppMQQ1pW3BI6smQ7Ku/U4Naq
 QdCi7kW1xjzIv+PXBxBv9rwGord1sLuSL6gFqFPGmhp4S3cG3j/8aglhBq8DIURB
 fzmK9+Sj2Fn4za3dgySSUG0Rl0ssBjiZnXYPLIC3dZKej+eXsM3MlWdKv60BnSV5
 wQVDAjoT+JlU/dJ2V46E60Z+TjGXJMwwIgPeInC2/j+DYU+MvxFXIASFzGUnaGKB
 cE7geQrtpef8yhfxXX9VsOs/p6Zw/e9Dsg1uH9cwJwjY8j6xSXVSu+A/0UcuWIb5
 EWPhhTWDbXCp4bKuBHKiMjzmTEGg3VeubxRNTpADMy9Q+vK0ffqTLUt7QXt+wVJz
 GngM+O2Puub6ZiC1/qJ934jTMcbLVWlBD7lsplRAAH4SlfMTzQtwp8rGDUwrYBZb
 Iz4m9F1X2+fW5LeyOga9Lu0qCBFXeROFvpKIkHA7MjEgt58gy6+OMvVC2H5Lsw0V
 RPS9wFBARbT/KIv+XRJ0QGMWRWnhHcqfEwal6YqsdqNirPkYd7iclMUT7WuMvsiz
 WI0nGDlnppl8x/ow34Nx
 =sT4w
 -----END PGP SIGNATURE-----

Merge tag 'drm/for-3.12-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.12-rc1

Only a couple of small patches this time around. These are mostly fixes
for minor bugs that showed up, but there is also some preparatory work
that will come in handy for future patches.

* tag 'drm/for-3.12-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: Parse device tree earlier
  gpu: host1x: Sort drivers by probe order
  gpu: host1x: Check for valid host1x pointer
  gpu: host1x: returning success instead of -ENOMEM
  gpu: host1x: fix an integer overflow check
  drm/tegra: hdmi: Make sure clock is enabled before dumping registers
2013-09-04 09:01:02 +10:00
Thierry Reding
03da0e7ba9 drm/tegra: Parse device tree earlier
Parsing the device tree may cause probing to be deferred. Doing this as
early as possible prevents any other resources from being requested and
enabled, therefore reducing the need to cleanup on deferred probe while
at the same time not wasting precious CPU cycles determining if probing
needs to be deferred or not.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-09-03 10:10:13 +02:00
Thierry Reding
57c6eb6f2c gpu: host1x: Sort drivers by probe order
External driver declarations are sorted by probe order for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-09-03 10:10:12 +02:00
Thierry Reding
03c961ba6d gpu: host1x: Check for valid host1x pointer
Under rare circumstances it can happen that the host1x driver's .probe()
doesn't finish properly, in which case the device's driver-specific data
will not be set. Instead of crashing in such a situation, propagate the
error to callers of the host1x_get_drm_data() function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-09-03 10:10:11 +02:00
Dave Airlie
a5b6f74e64 drm/tegra: fix up page flip flags.
This was one level away from where I'd grepped.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-09-02 09:47:56 +10:00
Lespiau, Damien
ae84b900b0 video/hdmi: Use hdmi_vendor_infoframe for the HDMI specific infoframe
We just got rid of the version of hdmi_vendor_infoframe that had a byte
array for anyone to poke at. It's now time to shuffle around the naming
of hdmi_hdmi_infoframe to make hdmi_vendor_infoframe become the HDMI
vendor specific structure.

Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2013-08-30 08:41:42 +10:00
Lespiau, Damien
a26a58e89a gpu: host1x: Port the HDMI vendor infoframe code the common helpers
I just wrote the bits to define and pack HDMI vendor specific infoframe.
Port the host1x driver to use those so I can refactor the infoframe code
a bit more.

This changes the length of the infoframe payload from 6 to 5, which is
enough for the "frame packing" stereo format.

v2: Pimp up the commit message with the note about the length
    (Ville Syrjälä)

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Terje Bergström <tbergstrom@nvidia.com>
Cc: linux-tegra@vger.kernel.org

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2013-08-30 08:41:13 +10:00
Dan Carpenter
745cecc07c gpu: host1x: returning success instead of -ENOMEM
There is a mistake here so it returns PTR_ERR(NULL) which is success
instead of -ENOMEM.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-08-27 10:20:12 +02:00
Dan Carpenter
f5fda676e9 gpu: host1x: fix an integer overflow check
Tegra is a 32 bit arch.  On 32 bit systems then size_t is 32 bits so
"total" will never be higher than UINT_MAX because of integer overflows.
We need cast to u64 first before doing the math.

Also the addition earlier:

        unsigned int num_unpins = num_cmdbufs + num_relocs;

That can overflow as well, but I think it's still safe because we check
both "num_cmdbufs" and "num_relocs" again in this test.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-08-27 10:20:11 +02:00