Commit Graph

12 Commits

Author SHA1 Message Date
Douglas Anderson
3f2fe461c7 soc: rockchip: power-domain: Don't (incorrectly) set rk3399 up/down counts
On rk3288 it was important that powerdown and powerup counts for the
CPU/GPU in the kernel because:
* The power on default was crazy long.
* We couldn't rely on the firmware to set this up because really this
  wasn't the firmware's job--the kernel was the only one that really
  cared about bringing up / down CPUs and the GPU and doing suspend /
  resume (which involves bringing up / down CPUs).

On newer ARM systems (like rk3399) ARM Trusted Firmware is in charge of
bringing up and down the CPUs and it really should be in charge of
setting all these counts right.  After all ATF is in charge of suspend /
resume and CPU up / down.  Let's get out of the way and let ATF do its
job.

A few other motivations for doing this:
* Depending on another configuration (PMU_24M_EN_CFG) these counts can
  be either in 24M or 32k cycles.  Thus, though ATF isn't really so
  involved in bringing up the GPU, ATF should probably manage the counts
  for everything so it can also manage the 24M / 32k choice.
* It turns out that (right now) 24M mode is broken on rk3399 and not
  being used.  That means that the count the kernel was programming
  in (24) was not 1 us (which it seems was intended) but was actually
  .75 ms
* On rk3399 there are actually 2 separate registers for setting CPU
  up/down time plus 1 register for GPU up/down time.  The curent kernel
  code actually was putting the register for the "little" cores in the
  "CPU" slot and the register for the "big" cores in the "GPU" slot.  It
  was never initting the GPU counts.

Note: this change assumes that ATF will actually set these values at
boot, as I'm proposing in <http://crosreview.com/372381>.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
[ATF change has landed]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-16 02:42:29 +02:00
Elaine Zhang
6f27ab3e42 soc: rockchip: support active_wakeup for rockchip power-domains
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-08-19 00:37:20 +02:00
Elaine Zhang
074c6a422d soc: rockchip: power-domain: support qos save and restore
support qos save and restore when power domain on/off.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-21 23:02:16 +02:00
Shawn Lin
4506697d9f soc: rockchip: power-domain: check the existing of regmap
Check return value of syscon_node_to_regmap for
rockchip_pm_domain_probe. If err value is returned, probe
procedure should abort.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-12 03:28:08 +02:00
Elaine Zhang
fd8b62cc38 soc: rockchip: power-domain: Modify power domain driver for rk3399
This driver is modified to support RK3399 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[small indentation fixups]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-28 13:16:45 +02:00
Elaine Zhang
6be05b5ec1 soc: rockchip: power-domain: add support for sub-power domains
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[restructured error handling in subdomain-addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-28 12:57:45 +02:00
Elaine Zhang
1fe767a56c soc: rockchip: power-domain: allow domains only handling idle requests
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a (shared) parent-
domain.

So allow such types of domains. For them, we can determine their
state (on/off) by checking the inverse idle-state instead.

There exist one special case if both idle as well power handling
were set as not present, but as the domain-data is defined in the
code itself, we can expect the reasonable developer to define them
in a correct way, without adding more checks.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-28 12:06:43 +02:00
Elaine Zhang
6aa841c809 soc: rockchip: power-domain: make idle handling optional
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-28 12:03:29 +02:00
Shawn Lin
1d961f11a1 soc: rockchip: power-domain: fix err handle while probing
If we fail to probe the driver, we should not directly break
from the for_each_available_child_of_node since it calls of_node_get
while iterating. This patch add of_node_put to fix the unbalanced
call pair.

Fixes: 7c696693a4 ("soc: rockchip: power-domain: Add power domain driver")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-02 22:18:31 +01:00
zhangqing
8c20b67f28 soc: rockchip: power-domain: Modify power domain driver for rk3368
This driver is modified to support RK3368 SoC.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-25 15:15:19 +01:00
Heiko Stuebner
c3ce5b3768 soc: rockchip: power-domain: don't try to print the clock name in error case
When we never got the the clock-reference, i.e. when IS_ERR(clk) is true,
don't try to print the clock name via %pC as this of course produces a
null-pointer-dereference in __clk_get_name().

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
2015-10-16 09:23:59 +02:00
Caesar Wang
7c696693a4 soc: rockchip: power-domain: Add power domain driver
This driver is found on RK3288 SoCs.

In order to meet high performance and low power requirements, a power
management unit is designed or saving power when RK3288 in low power
mode.
The RK3288 PMU is dedicated for managing the power of the whole chip.

PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON
register. After setting the register, PMU would enter the Low Power mode.
In the low power mode, pmu will auto power on/off the specified power
domain, send idle req to specified power domain, shut down/up pll and
so on. All of above are configurable by setting corresponding registers.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>

[replace dsb() with dsb(sy) for arm64 buildability; sy is the default,
so no functional change; adapt to per-user clocks in genpd]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-06 09:53:28 +02:00