Work by Magnus Damm and others to clean up the boot of and move
things closer to supporting multi-arch.
As a side effect of this work it was decided to remove support for
two boards, Bonito and AP4EVB. Those patches are included in this
series as they depend on earlier patches in the series.
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Merge tag 'renesas-cleanup-boot-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC boot cleanup for v3.11
Work by Magnus Damm and others to clean up the boot of and move
things closer to supporting multi-arch.
As a side effect of this work it was decided to remove support for
two boards, Bonito and AP4EVB. Those patches are included in this
series as they depend on earlier patches in the series.
* tag 'renesas-cleanup-boot-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove Bonito board support
ARM: shmobile: Remove AP4EVB board support
ARM: shmobile: Remove mach/memory.h
ARM: shmobile: Remove MEMORY_START/SIZE
ARM: shmobile: Enable ARM_PATCH_PHYS_VIRT
ARM: shmobile: Remove old SCU boot code
ARM: shmobile: EMEV2 SMP with SCU boot fn and args
ARM: shmobile: sh73a0 SMP with SCU boot fn and args
ARM: shmobile: r8a7779 SMP with SCU boot fn and args
ARM: shmobile: Add SCU boot function using argument
ARM: shmobile: Add SMP boot function and argument
ARM: shmobile: Rework sh7372 sleep code to use virt_to_phys()
ARM: shmobile: Remove romImage CONFIG_MEMORY_START
ARM: shmobile: Let romImage rely on default ATAGS
ARM: shmobile: uImage load address rework
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove board support for the r8a7740 based Bonito board
The r8a7740 SoC support code is still kept around since it
is in use by the Armadillo800eva board which is basically a more
recent board where the design is based on Bonito.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove board support for the sh7372 based AP4EVB board
The sh7372 SoC support code is still kept around since it
is in use by the Mackerel board which is basically a more
recent board where the design is based on AP4EVB.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove mach-shmobile memory.h since it is no longer needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove CONFIG_MEMORY_START and CONFIG_MEMORY_SIZE from mach-shmobile.
Boards should use DT to specify their memory setup. Boards that still
not support DT may pass ATAGS with memory information from the boot
loader. If those ATAGS turn out to be incorrect then appended DTB with
memory information should be used as a workaround.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove shmobile_secondary_vector_scu now when all SCU enabled
SMP platforms instead make use of shmobile_boot_scu. This
removes two inline virtual to physical address conversions.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let EMEV2 make use of shmobile_boot_fn and shmobile_boot_arg
together with shmobile_boot_scu and the SCU base address.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let sh73a0 make use of shmobile_boot_fn and shmobile_boot_arg
together with shmobile_boot_scu and the SCU base address.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let r8a7779 make use of shmobile_boot_fn and shmobile_boot_arg
together with shmobile_boot_scu and the SCU base address.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a shmoible_boot_scu function that assumes that the base address
of the SCU is passed in r0. This code is free from inline virtual
to physical address conversion.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add code for mach-shmobile to allow specifying boot function
and argument. Will initially be used for SMP together with SCU
but may in the future also be used for deep sleep resume. This
patch removes one inline virtual to physical address conversion.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of having a hard coded virt-to-phys address
conversion code in sleep-sh7372.S, rework the code
to do the conversion in C using virt_to_phys().
This removes the need for PLAT_PHYS_OFFSET which
in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: squashed in build fix posted as
"ARM: shmobile: sh7372 build fix for SUSPEND=n && CPU_IDLE=n"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
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Merge tag 'renesas-soc2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Second Round of Renesas ARM-based SoC updates for v3.11
* Ether device name updates for r8a7778 and r8a7779 Sergei Shtylyov
* Extended clock and driver coverage for r8a7778 by Goda-san and Morimoto-san
* Extended clock and coverage for r8a73a4 and r8a7790 by Guennadi Liakhovetski
* HSCIF support for r8a7790 by Ulrich Hecht
* tag 'renesas-soc2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
ARM: shmobile: r8a7778: add support MMC driver
ARM: shmobile: r8a7778: add support HSPI driver
ARM: shmobile: r8a7778: add support I2C driver
ARM: shmobile: r8a7778: add support MMC clock
ARM: shmobile: r8a7778: add support HSPI clock
ARM: shmobile: r8a7778: add support I2C clock
ARM: shmobile: r8a7790: HSCIF support
ARM: shmobile: r8a7778: fix Ether device name
ARM: shmobile: r8a7779: fix Ether device name
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-shmobile/clock-r8a7778.c
arch/arm/mach-shmobile/include/mach/r8a7778.h
Add MSTP clock definitions and fix aliases for the two MMCIF and four SDHI
interfaces on r8a7790 (H2).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
[horms+renesas@verge.net.au: applied manually]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI
interfaces on r8a73a4 (APE6).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of relying on CONFIG_MEMORY_START for memory
base address, let each romImage board header file
specify this information.
This is reworks code not to rely on CONFIG_MEMORY_START
which in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This is V2 of the mach-shmobile uImage load address rework patch.
Rework the mach-shmobile uImage load address calculation by storing
the per-board load addresses in Makefile.boot. This removes the
CONFIG_MEMORY_START dependency from Makefile.boot, and it also makes
it possible to create safe kernel images that boot on multiple boards.
This is one of several series of code that reworks code not to rely on
CONFIG_MEMORY_START/SIZE which in turn is needed for ARCH_MULTIPLATFORM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 MMC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 HSPI.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a platform device for the r8a7778 I2C.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds r8a7778 I2C clock support.
It also adds peripheral_clk which is requiested
from i2c-rcar driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Register the USB PHY device from bockw_init(), passing the platform data to it.
Set machine's init_late() method to r8a7778_init_late() in order for [EO]HCI to
get registered too...
Don't forget to add USB PENC0/1 pins to bockw_pinctrl_map[].
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add USB clock and EHCI, OHCI, and USB PHY platform devices for R8A7778 SoC; add
a function to register PHY device with board-specific platform data and register
EHCI and OHCI platfrom devices from the init_late() board method.
Also, don't forget to enable CONFIG_ARCH_HAS_[EO]HCI options for R8A7778 SoC in
Kconfig...
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Since we're now going to setup the USBPCTRL0 register using the USB PHY device's
platform data, we now need a way to pass those platform data from the board file
to the device which is situated in setup-r8a7779.c -- and what I'm suggesting is
r8a7779_add_usb_phy_device() that will register USB PHY platform device with the
passed platform data using platform_device_register_resndata() call; creating
this function involves deletion of 'usb_phy_device' from r8a7779_devices_dt[],
so that it will no longer be registered for the generic R8A7779 machine (where
we can't provide the platform data anyway), hence EHCI/OHCI drivers will fail
to load as well.
For the Marzen board, this new function will be called from marzen_init() to
register the USB PHY device early enough.
Note that the board and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The memory region that is used by the driver overlaps EHCI and OHCI register
regions for absolutely no reason now -- fix it by adding offset of 0x800 to
the base address, changing the register #define's accordingly. This has extra
positive effect that we now can use devm_ioremap_resource()...
Note that the driver and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that 'drivers/usb/phy/phy-rcar-usb.c' doesn't require the second memory
resource anymore, we can remove it from the R8A7779's USB PHY platform device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Setup the EHCI internal buffer (before EHCI driver has a chance to touch the
registers) using the pre_setup() method in 'struct usb_ehci_pdata'.
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
USB EHCI, OHCI, and common PHY are the SoC devices but are wrongly defined and
registered in the Marzen board file. Move the data and code to their proper
place in setup-r8a7779.c; while at it, we have to rename r8a7779_late_devices[]
to r8a7779_standard_devices[] -- this seems legitimate since they are registered
from r8a7779_add_standard_devices() anyway.
Note that I'm deliberately changing the USB PHY platform device's 'id' field
from (previously just omitted) 0 to -1 as the device is a single of its kind.
Note also that the board and SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit 524219146a (ARM: shmobile:
R8A7778: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While recasting commit dace48d04d (ARM: shmobile:
R8A7779: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This branch acts as a base for adding USB support to
r8A7778/BOCK-W and r8A7779/Marzen.
It includes the soc branch to provide dependencies in
the r8A7778 clock code.
It includes pinmux to provide pinmux initialisation for Bock-W
which is a dependency.
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
According to the datasheet, it is not allowed to change div4 clock rates
if an earlier rate change operation is still in progress, as indicated by
a set kick bit.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
frequency" intended to replace some clock operations only for the Z-clock,
instead it replaced them for all div4 clocks, since all div4 clocks share
the same copy of clock operations. Fix this by using a separate clock
operations structure for Z-clock.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Break out the function sh73a0_init_delay() that now
gets called both for the C version of the code and
the DT -reference boards. This way we handle both
cases in the same way.
Allows us to boot with TWD only in the kernel configuration
for C board code. TWD is not yet enabled in the case of
DT -reference - this due to a dependency on CCF.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the use of the generic cpufreq-cpu0 driver on sh73a0.
Providing a regulator, a list of OPPs in DT, combined with a virtual
cpufreq-cpu0 platform device and a clock, attached to it is everything,
the cpufreq-cpu0 driver needs. The first sh73a0 platform, implementing
such CPUFreq support is kzm9g-reference.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
voltages and thus reduce power consumption.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds SDHI register function which needs id number (= 0/1/2)
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV6 clocks control each core clocks.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV4 clocks control each core clocks.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
