Change details:
- Print log messages when running with reduced number of MSI-X vectors
and when defaulting to INTx mode.
- Remove BUG_ONs and header file inclusion that are not needed
- Comments addition/cleanup
- Unused code cleanup
- Add New Line to Print msg in bfa_sm_fault
- Formatting fix
Signed-off-by: Gurunatha Karaje <gkaraje@brocade.com>
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
- Add bnad_pci_unmap_skb() API to unmap skb from transmit path and update the
unmap index. Add more checks for illegal skbs in transmit path. Add tx_skb
counters for dropped skbs.
- The unmap_cons index used in bnad_free_txbufs() is incorrectly declared as
u16. It quickly wraps around and accesses null sk_buff ptr. So using u32 to
handle unmap_array.
- Disable and enable interrupts from the same polling context to prevent
reordering in Rx path.
- Add Rx NAPI debug counters.
- Make NAPI budget check more generic.
- Modify dim timer stop logic to make it dependent on cfg and run flags
- Handle reduced MSI-X vectors case in bnad_enable_msix.
- Check for single frame TSO skbs and send them out as non-TSO.
- Put memory barrier after bna_txq_prod_indx_doorbell().
Signed-off-by: Gurunatha Karaje <gkaraje@brocade.com>
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
- Remove unnecessary ccb check from bnad_poll_cq
- Add bnad pointer to rx_ctrl structure, so that bnad can be accessed directly
from rx_ctrl in the NAPI poll routines, even if ccb is NULL
- Validate ccb before referencing to it in bnad_msix_rx and bnad_napi_poll_rx
- Fix the order of NAPI init / uninit in Tx / Rx setup / teardown path:
a. Kill bnad tx free tasklet ahead of call to bna_tx_destroy()
b. Call NAPI disable only after call to Rx free_irq(). This makes sure Rx
interrupt does not schedule a poll when NAPI is already disabled
- NAPI poll runs before the h/w has completed configuration. This causes a
crash. Delay enabling NAPI till after bna_rx_enable(). Split NAPI
initialization into 2 steps, bnad_napi_init() & bnad_napi_enable().
Signed-off-by: Gurunatha Karaje <gkaraje@brocade.com>
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Naming changes: rename devid, BNAD_MAX_TXS, BNAD_MAX_RXS,
BNAD_MAX_RXPS_PER_RX to device, BNAD_MAX_TX, BNAD_MAX_RX,
BNAD_MAX_RXP_PER_RX respectively and change all the references.
Macro Fix: Add ioc_isr_mod_set check to bfa_nw_ioc_mbox_regisr macro
Signed-off-by: Gurunatha Karaje <gkaraje@brocade.com>
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
This patch contains additional structure and function definition changes
that are required to enable the new msgq/enet/txrx redesign introduced
by the previous 4 patches.
- structure and function definition changes to header files as a result
of Ethport, Enet, IOCEth, Tx, Rx redesign.
- ethtool changes to use new enet function and definitions
- Set number of Tx and Rx queues bassed on underlying hardware. Define
separate macros for maximum and supported numbers of Tx and Rx queues
based on underlying hardware. Take VLAN header into account for MTU
calculation. Default to INTx mode when pci_enable_msix() fails. Set a
bit in Rx poll routine, check and wait for that bit to be cleared in
the cleanup routine before proceeding.
- The TX and Rx coalesce settings are programmed in steps of 5 us. The value
that are not divisible by 5 are rounded to the next lower number. This was
causing the value os 1 to 4 to be rounded to 0, which is an invalid setting.
When creating Rx and Tx object, we are currently assigning the default
values of Rx and Tx coalescing_timeo. If these values are changed in the
driver to a different value, the change is lost during such operations as
MTU change. In order to avoid that, pass the configured value of
coalescing_timeo before Rx and Tx object creation. Fix
bnad_tx_coalescing_timeo_set() so it applies to all the Tx objects.
- Reorg uninitialization path in case of pci_probe failure.
- Hardware clock setup changes to pass asic generation, port modes and
asic mode as part firmware boot parameters to firmware.
- FW mailbox interface changes to defined asic specific mailbox interfaces.
h/w mailbox interfaces take 8-bit FIDs and 2-bit port id for owner. Cleaned
up mailbox definitions and usage for new and old HW. Eliminated usage of
ASIC ID. MSI-X vector assignment and programming done by firmware. Fixed
host offsets for CPE/RME queue registers.
- Implement polling mechanism for FW ready to have poll mechanism replaces
the current interrupt based FW READY method. The timer based poll routine
in IOC will query the ioc_fwstate register to see if there is a state
change in FW, and sends the READY event. Removed infrastructure needed to
support mbox READY event from fw as well as IOC code.
- Move FW init to HW init. Handle the case where PCI mapping goes away when
IOCPF state machine is waiting for semaphore.
- Add IOC mbox call back to client indicating that the command is sent.
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Moves the Brocade driver into drivers/net/ethernet/brocade/ and make
the necessary Kconfig and Makefile changes.
CC: Rasesh Mody <rmody@brocade.com>
CC: Debashis Dutt <ddutt@brocade.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
