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313443b16a
1819 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Neil Armstrong
|
58b5c8acba |
clk: meson-g12a: add cpu clock bindings
Add Amlogic G12A Family CPU clocks bindings, only export CPU_CLK since it should be the only ID used. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190304131129.7762-2-narmstrong@baylibre.com |
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Anson Huang
|
0f8e231712 |
dt-bindings: firmware: imx-scu: add new resources to scu resource table
Add new resources as below according to latest system controller firmware for new features: IMX_SC_R_PERF IMX_SC_R_OCRAM IMX_SC_R_DMA_5_CH0 IMX_SC_R_DMA_5_CH1 IMX_SC_R_DMA_5_CH2 IMX_SC_R_DMA_5_CH3 IMX_SC_R_ATTESTATION Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Anson Huang
|
9613163a28 |
dt-bindings: firmware: imx-scu: remove unused resources from scu resource table
Removes below resources which were defined during pre-silicon phase and the real silicons do NOT have them, they have never been used, latest system controller firmware also removed them: IMX_SC_R_DC_0_CAPTURE0 IMX_SC_R_DC_0_CAPTURE1 IMX_SC_R_DC_0_INTEGRAL0 IMX_SC_R_DC_0_INTEGRAL1 IMX_SC_R_DC_0_FRAC1 IMX_SC_R_DC_1_CAPTURE0 IMX_SC_R_DC_1_CAPTURE1 IMX_SC_R_DC_1_INTEGRAL0 IMX_SC_R_DC_1_INTEGRAL1 IMX_SC_R_DC_1_FRAC1 IMX_SC_R_GPU_3_PID0 IMX_SC_R_M4_0_SIM IMX_SC_R_M4_0_WDOG IMX_SC_R_M4_1_SIM IMX_SC_R_M4_1_WDOG Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Jolly Shah
|
31a2d5113e |
include: dt-binding: clock: Rename zynqmp header file
Rename file name of ZynqMP clk dt-bindings to align with file name of reset and power dt-bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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Geert Uytterhoeven
|
3961d355df |
dt-bindings: power: r8a77965: Remove non-existent A3IR power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the A3IR power domain on R-Car M3-N, as this SoC does not have an Image Processing Unit (IMP-X5). As of commit |
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Linus Torvalds
|
dc2535be1f |
We have a fairly balanced mix of clk driver updates and clk framework
updates this time around. It's the usual pile of new drivers for new
hardware out there and the normal small fixes and updates, but then we
have some core framework changes too.
In the core framework, we introduce support for a clk_get_optional() API
to get clks that may not always be populated and a way to devm manage clkdev
lookups registered by provider drivers. We also do some refactoring to simplify
the interface between clkdev and the common clk framework so we can reuse the DT
parsing and clk_get() path in provider drivers in the future. This work will
continue in the next few cycles while we convert how providers specify clk
parents.
On the driver side, the biggest part of the dirstat is the Amlogic clk driver
that got support for the G12A SoC. It dominates with almost half the overall
diff, while the second largest part of the diff is in the i.MX clk driver
that gained support for imx8mm SoCs. After that, we have the Actions Semiconductor
and Qualcomm drivers rounding out the big part of the dirstat because they both
got new hardware support for SoCs. The rest is just various updates and non-critical
fixes for existing drivers.
Core:
- Convert a few clk bindings to JSON schema format
- Add a {devm_}clk_get_optional() API
- Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
- Start rewriting clk parent registration and supporting device links
by moving around code that supports clk_get() and DT parsing of the
'clocks' property
New Drivers:
- Add Qualcomm MSM8998 RPM managed clks
- IPA clk support on Qualcomm RPMh clk controllers
- Actions Semi S500 SoC clk support
- Support for fixed rate clks populated from an MMIO register
- Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
- Add TMU (timer) clocks on Renesas RZ/G2E
- Add Amlogic G12A Always-On Clock Controller
- Add 32k clock generation for Amlogic AXG
- Add support for the Mali GPU clocks on Amlogic Meson8
- Add Amlogic G12A EE clock controller driver
- Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
- Add i.MX8MM SoC clk driver support
Removed Drivers:
- Remove clps711x driver as the board support is gone
Updates:
- 3rd ECO fix for Mediatek MT2712 SoCs
- Updates for Qualcomm MSM8998 GCC clks
- Random static analysis fixes for clk drivers
- Support for sleeping gpios in the clk-gpio type
- Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
- Split LCDC into two clks on the Marvell MMP2 SoC
- Various DT of_node refcount fixes
- Get rid of CLK_IS_BASIC from TI code (yay!)
- TI Autoidle clk support
- Fix Amlogic Meson8 APB clock ID name
- Claim input clocks through DT for Amlogic AXG and GXBB
- Correct the DU (display unit) parent clock on Renesas RZ/G2E
- Exynos5433 IMEM CMU crypto clk support (SlimSS)
- Fix for the PLL-MIPI on the Allwinner A23
- Fix Rockchip rk3328 PLL rate calculation
- Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
- i.MX SCU clk driver clk_set_parent() and cpufreq support
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlyIK9URHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSUtIA//SRHcUJBuF7bgLs0GWDL/C0WwQf90bgLn
83jMUX9MCIS+/RBEUi/Xf9psGVaW3YPEAiRcYUeI1YIZhCrdZHp2YGClKOpXaXth
vgM7Je+6Say+7ru6J9eHqhbEgx2e+HqT4shxK5I5J0SqMFgdugim4pthk+Lr/WL0
bMdNHTERZUFrIId10RxuCH7D72nhkwiRkwNDfWjASKoH3spXLKC1vl/wbS5QDE1O
eXA9OwkonSyrBKX7zMeQiks6f7HWoJO7ei05Twv4CD9UEeS17KmB6mkbmT3GPAuq
dWbLOnt7I80fMnthKLIR0IWtJuCvPv3jXgP+Fin+e4wutNCnuduHIVc2XeQYmDaX
rbo/20q4DarL2AaakuowXA7UJ75zYfxPkwgpwcYZ/QW9yzT6QMfynAYekjJGTdt3
6VootYAwYIsh1VMGZIQLs23AaNYayDy0QWx/prxnEi95lK/+zjqVySPYC/rWe7XQ
rUrO6YY0YxRdf5uVHneIfIJGs5F/Q8DgdLXp4tf2Ud2YF1bZ0UQOUKehxwM0rxRX
F9P6iP6mHUuUPMa9rDlwSmgQXDdqH7E5IbXdSPjEFBogBfmhJfVKAo1EyaZgUytZ
Y42qG/P3fGGfegfWTRAoaDRJn/+HfEmtREdgQ8JO14xlZwRDb/M43IEiQP4zGwlc
f/OuWu3O9xA=
=D4Bv
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk subsystem updates from Stephen Boyd:
"We have a fairly balanced mix of clk driver updates and clk framework
updates this time around. It's the usual pile of new drivers for new
hardware out there and the normal small fixes and updates, but then we
have some core framework changes too.
In the core framework, we introduce support for a clk_get_optional()
API to get clks that may not always be populated and a way to devm
manage clkdev lookups registered by provider drivers. We also do some
refactoring to simplify the interface between clkdev and the common
clk framework so we can reuse the DT parsing and clk_get() path in
provider drivers in the future. This work will continue in the next
few cycles while we convert how providers specify clk parents.
On the driver side, the biggest part of the dirstat is the Amlogic clk
driver that got support for the G12A SoC. It dominates with almost
half the overall diff, while the second largest part of the diff is in
the i.MX clk driver that gained support for imx8mm SoCs. After that,
we have the Actions Semiconductor and Qualcomm drivers rounding out
the big part of the dirstat because they both got new hardware support
for SoCs. The rest is just various updates and non-critical fixes for
existing drivers.
Core:
- Convert a few clk bindings to JSON schema format
- Add a {devm_}clk_get_optional() API
- Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
- Start rewriting clk parent registration and supporting device links
by moving around code that supports clk_get() and DT parsing of the
'clocks' property
New Drivers:
- Add Qualcomm MSM8998 RPM managed clks
- IPA clk support on Qualcomm RPMh clk controllers
- Actions Semi S500 SoC clk support
- Support for fixed rate clks populated from an MMIO register
- Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
- Add TMU (timer) clocks on Renesas RZ/G2E
- Add Amlogic G12A Always-On Clock Controller
- Add 32k clock generation for Amlogic AXG
- Add support for the Mali GPU clocks on Amlogic Meson8
- Add Amlogic G12A EE clock controller driver
- Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
- Add i.MX8MM SoC clk driver support
Removed Drivers:
- Remove clps711x driver as the board support is gone
Updates:
- 3rd ECO fix for Mediatek MT2712 SoCs
- Updates for Qualcomm MSM8998 GCC clks
- Random static analysis fixes for clk drivers
- Support for sleeping gpios in the clk-gpio type
- Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
- Split LCDC into two clks on the Marvell MMP2 SoC
- Various DT of_node refcount fixes
- Get rid of CLK_IS_BASIC from TI code (yay!)
- TI Autoidle clk support
- Fix Amlogic Meson8 APB clock ID name
- Claim input clocks through DT for Amlogic AXG and GXBB
- Correct the DU (display unit) parent clock on Renesas RZ/G2E
- Exynos5433 IMEM CMU crypto clk support (SlimSS)
- Fix for the PLL-MIPI on the Allwinner A23
- Fix Rockchip rk3328 PLL rate calculation
- Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
- i.MX SCU clk driver clk_set_parent() and cpufreq support"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
clk: ti: clkctrl: Fix clkdm_name regression for TI_CLK_CLKCTRL_COMPAT
clk: fixup default index for of_clk_get_by_name()
clk: Move of_clk_*() APIs into clk.c from clkdev.c
clk: Inform the core about consumer devices
clk: Introduce of_clk_get_hw_from_clkspec()
clk: core: clarify the check for runtime PM
clk: Combine __clk_get() and __clk_create_clk()
clk: imx8mq: add GPIO clocks to clock tree
clk: mediatek: correct cpu clock name for MT8173 SoC
clk: imx: Refactor entire sccg pll clk
clk: imx: scu: add cpu frequency scaling support
clk: mediatek: Mark bus and DRAM related clocks as critical
clk: mediatek: Add flags to mtk_gate
clk: mediatek: Add MUX_FLAGS macro
clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks
clk: ingenic: Remove set but not used variable 'enable'
clk: at91: programmable: remove unneeded register read
clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
clk: mediatek: add MUX_GATE_FLAGS_2
...
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Abel Vesa
|
010d5166bb |
dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
IMX8MQ_CLK_USB_PHY_REF changes from 163 to 153, this way removing the gap.
All the following clock ids are now decreased by 10 to keep the numbering
right. Doing this, the IMX8MQ_CLK_CSI2_CORE is not overlapped with
IMX8MQ_CLK_GPT1 anymore. IMX8MQ_CLK_GPT1_ROOT changes from 193 to 183 and
all the following ids are updated accordingly.
Reported-by: Patrick Wildt <patrick@blueri.se>
Fixes:
|
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Linus Torvalds
|
cf0240a755 |
This is the bulk of pin control changes for the v5.1 kernel cycle.
No core changes. New drivers: - NXP (ex Freescale) i.MX 8QM driver. - NXP (ex Freescale) i.MX 8MM driver. - AT91 SAM9X60 subdriver. Improvements: - Support for external interrups (EINT) on Mediatek virtual GPIOs. - Make BCM2835 pin config fully generic. - Lots of Renesas SH-PFC incremental improvements. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJchil8AAoJEEEQszewGV1zTCcP/AurT3InBO4nVdN9UMuoDL7P gx3SALULapc4+M1NUoRw+w+z5fvjd0gGdPXZeyhX1E9kXxLmWBmBf6tl0MO2YYPC UWbSnBaWIOOli0f4k+GKVF8LKqD0z0e/YqX4mG7UI3OLJzcJgm7OL9uXN3Gh7tIP Pa6CGbv0aRDkZpWUD2ZTpSPCRYGT57roVq//d7V7s+0lveS97pQuMv43YlS5L2my JOOhHNG33bgi4lS/ZOP81G16oOrVaoupXuX7E+AvgG6vxr5965Fi+qoGLkxIuYOm jtrzuNY98eL2m9b505VYdNmD7ouBhG6CKFb4njpOvjkkqNUXOaGV53wlEuEYRUNz bsp0596+dlOcW7wl11r6YI4Kyn2wQJFql1AwS8A4dEtbuboGrDy16N3adr1SkIGZ 4ESN8xydcC7CAgUGXks+AgDj9vYwOs4apylJDW5tMk4K0LIsEYsDkbNeS9hwDYIH ZlbQe9N2loB6qQbX3c3D3/sIhKj2VB4elONSwOW10M8OJdJwp8h44UyMZ3TIEHIT 7Gu9pw5vobXbccKCSjqkYYflaHMmjwZUtLqDZws818sbe/xgDxONbRqloZCLV39Y kmwRGbbE5WtNAM0X+ABwMG3Lm77wxCFKCjJwLHH79qqt4kSBynEKXQ4D/coG/Hln 6idanzKEPiIBJ+6QLdbQ =EfXK -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is a calm cycle, not much happened this time around: not even much incremental development. Some three new drivers, that is all. No core changes. New drivers: - NXP (ex Freescale) i.MX 8QM driver. - NXP (ex Freescale) i.MX 8MM driver. - AT91 SAM9X60 subdriver. Improvements: - Support for external interrups (EINT) on Mediatek virtual GPIOs. - Make BCM2835 pin config fully generic. - Lots of Renesas SH-PFC incremental improvements" * tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (70 commits) pinctrl: imx: fix scu link errors dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding pinctrl: qcom: spmi-gpio: Reorder debug print pinctrl: nomadik: fix possible object reference leak pinctrl: stm32: return error upon hwspinlock failure pinctrl: stm32: fix memory leak issue pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions pinctrl: sh-pfc: Validate fixed-size field widths at build time pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group pinctrl: sh-pfc: emev2: Add missing pinmux functions pinctrl: sunxi: Support I/O bias voltage setting on A80 pinctrl: ingenic: Add LCD pins for the JZ4725B SoC pinctrl: samsung: Remove legacy API for handling external wakeup interrupts mask pinctrl: bcm2835: Direct GPIO config changes to generic pinctrl pinctrl: bcm2835: declare pin config as generic pinctrl: qcom: qcs404: Drop unused UFS_RESET macro dt-bindings: add documentation for slew rate ... |
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Stephen Boyd
|
fea0b0850a |
Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next
- Convert a few clk bindings to JSON schema format - 3rd ECO fix for Mediatek MT2712 SoCs * clk-typo: clk: samsung: fix typo * clk-json-schema: dt-bindings: clock: Convert fixed-factor-clock to json-schema dt-bindings: clock: Convert fixed-clock binding to json-schema * clk-mtk-2712-eco: clk: mediatek: update clock driver of MT2712 dt-bindings: clock: add clock for MT2712 * clk-rockchip: clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks clk: rockchip: fix frac settings of GPLL clock for rk3328 |
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Stephen Boyd
|
efb1e0b071 |
Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next
* clk-ingenic: clk: ingenic: Remove set but not used variable 'enable' clk: ingenic: Fix doc of ingenic_cgu_div_info clk: ingenic: Fix round_rate misbehaving with non-integer dividers clk: ingenic: jz4740: Fix gating of UDC clock * clk-mtk-mux: clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel clk: mediatek: add MUX_GATE_FLAGS_2 * clk-qcom-sdm845-pcie: clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks * clk-mtk-crit: clk: mediatek: Mark bus and DRAM related clocks as critical clk: mediatek: Add flags to mtk_gate clk: mediatek: Add MUX_FLAGS macro * clk-mtk: clk: mediatek: correct cpu clock name for MT8173 SoC |
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Stephen Boyd
|
75f486c015 |
Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next
- Updates for qcom MSM8998 GCC clks - qcom MSM8998 RPM managed clks - Random static analysis fixes for clk drivers * clk-qcom-msm8998: clk: qcom: Make common clk_hw registrations clk: qcom: smd: Add support for MSM8998 rpm clocks clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998 clk: qcom: Add missing freq for usb30_master_clk on 8998 clk: qcom: Add CLK_SET_RATE_PARENT for 8998 branch clocks * clk-fractional-parent: clk: fractional-divider: check parent rate only if flag is set * clk-x86-mv: clk: x86: Move clk-lpss.h to platform_data/x86 * clk-SA-fixes: clk: mediatek: fix platform_no_drv_owner.cocci warnings clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings clk: qoriq: Improve an error message |
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Stephen Boyd
|
461ea6ab2c |
Merge branches 'clk-qcom-rpmh', 'clk-gpio-sleep', 'clk-stm32mp1', 'clk-qcom-qcs404' and 'clk-actions-s500' into clk-next
- IPA clk support on Qualcomm RPMh clk controllers - Support sleeping gpios in clk-gpio type - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.) - Actions Semi S500 SoC clk support * clk-qcom-rpmh: clk: qcom: clk-rpmh: Add IPA clock support * clk-gpio-sleep: clk: clk-gpio: add support for sleeping GPIOs in gpio-gate-clk * clk-stm32mp1: dt-bindings: clock: remove unused definition for stm32mp1 clk: stm32mp1: fix bit width of hse_rtc divider clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag clk: stm32mp1: fix HSI divider flag clk: stm32mp1: fix mcu divider table clk: stm32mp1: set ck_csi as critical clock clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks clk: stm32mp1: parent clocks update * clk-qcom-qcs404: clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock clk: qcom: clk-rcg2: Introduce a cfg offset for RCGs clk: qcom: remove empty lines in clk-rcg.h * clk-actions-s500: clk: actions: Add clock driver for S500 SoC dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU clk: actions: Add configurable PLL delay |
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Stephen Boyd
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e7faa095cb |
Merge branches 'clk-imx', 'clk-samsung', 'clk-ti', 'clk-uniphier-gear' and 'clk-mmp2-lcdc' into clk-next
- Split LCDC into two clks on the Marvell MMP2 SoC
* clk-imx:
clk: imx8mq: add GPIO clocks to clock tree
clk: imx: Refactor entire sccg pll clk
clk: imx: scu: add cpu frequency scaling support
clk: imx: imx8mm: Mark init function __init
clk: imx8mq: Add the missing ARM clock
dt-bindings: imx8mq-clock: Add the missing ARM clock
clk: imx: imx8mq: Fix the rate propagation for arm pll
clk: imx8mq: Add support for the CLKO1 clock
clk: imx8mq: Fix the CLKO2 source select list
clk: imx8mq: Add missing M4 clocks
clk: imx: Add clock driver support for imx8mm
dt-bindings: imx: Add clock binding doc for imx8mm
clk: imx: Add PLLs driver for imx8mm soc
clk: imx5: add imx5_SCC2_IPG_GATE
clk: imx: scu: add set parent support
clk: imx: scu: add fallback compatible string support
clk: imx8mq: Make parent names arrays const pointers
clk: imx: Make parents const pointer in mux wrappers
clk: imx: Make parent_names const pointer in composite-8m
* clk-samsung:
clk: samsung: s3c2443: Mark expected switch fall-through
clk: samsung: exynos5: Fix kfree() of const memory on setting driver_override
clk: samsung: exynos5: Fix possible NULL pointer exception on platform_device_alloc() failure
clk: samsung: exynos5433: Add selected IMEM clocks
clk: samsung: dt-bindings: Document Exynos5433 IMEM CMU
clk: samsung: exynos5433: Fix name typo in sssx
clk: samsung: exynos5433: Fix definition of CLK_ACLK_IMEM_{200, 266} clocks
clk: samsung: dt-bindings: Add Exynos5433 IMEM CMU clock IDs
* clk-ti:
clk: clk-twl6040: Fix imprecise external abort for pdmclk
ARM: OMAP2+: hwmod: disable ick autoidling when a hwmod requires that
clk: ti: check clock type before doing autoidle ops
clk: ti: add a usecount for autoidle
clk: ti: generalize the init sequence of clk_hw_omap clocks
clk: ti: remove usage of CLK_IS_BASIC
clk: ti: add new API for checking if a provided clock is an OMAP clock
clk: ti: move clk_hw_omap list handling under generic part of the driver
* clk-uniphier-gear:
clk: uniphier: Fix update register for CPU-gear
* clk-mmp2-lcdc:
clk: mmp2: separate LCDC peripheral clk form the display clock
dt-bindings: marvell,mmp2: Add clock id for the LCDC clock
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Stephen Boyd
|
3f8e7e7247 |
Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next
- Add a {devm_}clk_get_optional() API
- Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
* clk-optional:
clk: Add (devm_)clk_get_optional() functions
clk: Add comment about __of_clk_get_by_name() error values
* clk-devm-clkdev-register:
clk: clk-st: avoid clkdev lookup leak at remove
clk: clk-max77686: Clean clkdev lookup leak and use devm
clkdev: add managed clkdev lookup registration
* clk-allwinner:
clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it
* clk-meson: (22 commits)
clk: meson: meson8b: fix the naming of the APB clocks
dt-bindings: clock: meson8b: add APB clock definition
clk: meson: Add G12A AO Clock + Reset Controller
dt-bindings: clk: add G12A AO Clock and Reset Bindings
clk: meson: factorise meson64 peripheral clock controller drivers
clk: meson: g12a: add peripheral clock controller
dt-bindings: clk: meson: add g12a periph clock controller bindings
clk: meson: pll: update driver for the g12a
clk: meson: rework and clean drivers dependencies
clk: meson: axg-audio does not require syscon
clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory
clk: export some clk_hw function symbols for module drivers
clk: meson: ao-clkc: claim clock controller input clocks from DT
clk: meson: axg: claim clock controller input clock from DT
clk: meson: gxbb: claim clock controller input clock from DT
clk: meson: meson8b: add the GPU clock tree
clk: meson: meson8b: use a separate clock table for Meson8
clk: meson: axg-ao: add 32k generation subtree
clk: meson: gxbb-ao: replace cec-32k with the dual divider
clk: meson: add dual divider clock driver
...
* clk-renesas:
clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK
clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLK
clk: renesas: r8a774c0: Add TMU clock
clk: renesas: r8a77980: Add RPC clocks
clk: renesas: rcar-gen3: Add RPC clocks
clk: renesas: rcar-gen3: Add spinlock
clk: renesas: rcar-gen3: Factor out cpg_reg_modify()
clk: renesas: r8a774c0: Correct parent clock of DU
clk: renesas: r8a774a1: Add missing CANFD clock
clk: renesas: r8a774c0: Add missing CANFD clock
|
||
|
Linus Torvalds
|
3601fe43e8 |
This is the bulk of GPIO changes for the v5.1 cycle:
Core changes:
- The big change this time around is the irqchip handling in
the qualcomm pin controllers, closely coupled with the
gpiochip. This rework, in a classic fall-between-the-chairs
fashion has been sidestepped for too long. The Qualcomm
IRQchips using the SPMI and SSBI transport mechanisms have
been rewritten to use hierarchical irqchip. This creates
the base from which I intend to gradually pull support for
hierarchical irqchips into the gpiolib irqchip helpers to
cut down on duplicate code. We have too many hacks in the
kernel because people have been working around the missing
hierarchical irqchip for years, and once it was there,
noone understood it for a while. We are now slowly adapting
to using it. This is why this pull requests include changes
to MFD, SPMI, IRQchip core and some ARM Device Trees
pertaining to the Qualcomm chip family. Since Qualcomm have
so many chips and such large deployments it is paramount
that this platform gets this right, and now it (hopefully)
does.
- Core support for pull-up and pull-down configuration, also
from the device tree. When a simple GPIO chip support a
"off or on" pull-up or pull-down resistor, we provide a
way to set this up using machine descriptors or device tree.
If more elaborate control of pull up/down (such as
resistance shunt setting) is required, drivers should be
phased over to use pin control. We do not yet provide a
userspace ABI for this pull up-down setting but I suspect
the makers are going to ask for it soon enough. PCA953x
is the first user of this new API.
- The GPIO mockup driver has been revamped after some
discussion improving the IRQ simulator in the process.
The idea is to make it possible to use the mockup for
both testing and virtual prototyping, e.g. when you do
not yet have a GPIO expander to play with but really
want to get something to develop code around before
hardware is available. It's neat. The blackbox testing
usecase is currently making its way into kernelci.
- ACPI GPIO core preserves non direction flags when updating
flags.
- A new device core helper for devm_platform_ioremap_resource()
is funneled through the GPIO tree with Greg's ACK.
New drivers:
- TQ-Systems QTMX86 GPIO controllers (using port-mapped
I/O)
- Gateworks PLD GPIO driver (vaccumed up from OpenWrt)
- AMD G-Series PCH (Platform Controller Hub) GPIO driver.
- Fintek F81804 & F81966 subvariants.
- PCA953x now supports NXP PCAL6416.
Driver improvements:
- IRQ support on the Nintendo Wii (Hollywood) GPIO.
- get_direction() support for the MVEBU driver.
- Set the right output level on SAMA5D2.
- Drop the unused irq trigger setting on the Spreadtrum
driver.
- Wakeup support for PCA953x.
- A slew of cleanups in the various Intel drivers.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJcgoLEAAoJEEEQszewGV1zjBAP/3OmTFGv49PFmJwSx+PlLiYf
V6/UPaQzq81CGSMtHxbS51TyP9Id7PCfsacbuFYutzn0D1efvl7jrkb8qJ6fVvCM
bl/i6q8ipRTPzAf1hD3QCgCe3BXCA064/OcPrz987oIvI3bJQXsmBjBSXHWr4Cwa
WfB5DX/afn9TK3XHhMQGfw5f0d+TtnKAs90RTTVKiz9Ow8eFYZJOhgPkvhCR3Gi9
YJIzIAiwhHZ7/zauo4JAYFU/O/Z3YEC5zeLne2ItebzNooRkSxdz0c9Hs7HlCZmU
930Uv9jNN89N3vPqpZzAHtPvwDOmAILMWvKy9xRSp+eoIukarRJgF7ALPk7QWxK1
yy+tGj4dXBQ6tI8W3wUN1WgjNpii3K1HbJ+1LQVQL2/q9o+3YXXqmjdjuw7C8YYV
5ystNrUppkgfIIciHL4lhqw3wKJJhVEAns2V245hIitoShT+RvIg8GQbGZmWlQFd
YsHbynqHL9iwfRNv26kEqZXZOo/4D1t6Scw+OPVyba2Wyttf+qbmg+XaYMqFaxYW
mfydvdtymeCOUIPJMzw58KGPUTXJ4UPLENyayXNUHokr1a8VO8OIthY7zwi0CpvJ
IcsAY9zoGxvfbRV922mlIsw3oOBcM2IN2lC9sY469ZVnjBrdC3rsQpIBZr+Vzz8i
YlUfXLSGSyuUZUz//2eG
=VoVC
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v5.1 cycle:
Core changes:
- The big change this time around is the irqchip handling in the
qualcomm pin controllers, closely coupled with the gpiochip. This
rework, in a classic fall-between-the-chairs fashion has been
sidestepped for too long.
The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms
have been rewritten to use hierarchical irqchip. This creates the
base from which I intend to gradually pull support for hierarchical
irqchips into the gpiolib irqchip helpers to cut down on duplicate
code.
We have too many hacks in the kernel because people have been
working around the missing hierarchical irqchip for years, and once
it was there, noone understood it for a while. We are now slowly
adapting to using it.
This is why this pull requests include changes to MFD, SPMI,
IRQchip core and some ARM Device Trees pertaining to the Qualcomm
chip family. Since Qualcomm have so many chips and such large
deployments it is paramount that this platform gets this right, and
now it (hopefully) does.
- Core support for pull-up and pull-down configuration, also from the
device tree. When a simple GPIO chip supports an "off or on" pull-up
or pull-down resistor, we provide a way to set this up using
machine descriptors or device tree.
If more elaborate control of pull up/down (such as resistance shunt
setting) is required, drivers should be phased over to use pin
control. We do not yet provide a userspace ABI for this pull
up-down setting but I suspect the makers are going to ask for it
soon enough. PCA953x is the first user of this new API.
- The GPIO mockup driver has been revamped after some discussion
improving the IRQ simulator in the process.
The idea is to make it possible to use the mockup for both testing
and virtual prototyping, e.g. when you do not yet have a GPIO
expander to play with but really want to get something to develop
code around before hardware is available. It's neat. The blackbox
testing usecase is currently making its way into kernelci.
- ACPI GPIO core preserves non direction flags when updating flags.
- A new device core helper for devm_platform_ioremap_resource() is
funneled through the GPIO tree with Greg's ACK.
New drivers:
- TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O)
- Gateworks PLD GPIO driver (vaccumed up from OpenWrt)
- AMD G-Series PCH (Platform Controller Hub) GPIO driver.
- Fintek F81804 & F81966 subvariants.
- PCA953x now supports NXP PCAL6416.
Driver improvements:
- IRQ support on the Nintendo Wii (Hollywood) GPIO.
- get_direction() support for the MVEBU driver.
- Set the right output level on SAMA5D2.
- Drop the unused irq trigger setting on the Spreadtrum driver.
- Wakeup support for PCA953x.
- A slew of cleanups in the various Intel drivers"
* tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits)
gpio: gpio-omap: fix level interrupt idling
gpio: amd-fch: Set proper output level for direction_output
x86: apuv2: remove unused variable
gpio: pca953x: Use PCA_LATCH_INT
platform/x86: fix PCENGINES_APU2 Kconfig warning
gpio: pca953x: Fix dereference of irq data in shutdown
gpio: amd-fch: Fix type error found by sparse
gpio: amd-fch: Drop const from resource
gpio: mxc: add check to return defer probe if clock tree NOT ready
gpio: ftgpio: Register per-instance irqchip
gpio: ixp4xx: Add DT bindings
x86: pcengines apuv2 gpio/leds/keys platform driver
gpio: AMD G-Series PCH gpio driver
drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource()
gpio: tqmx86: Set proper output level for direction_output
gpio: sprd: Change to use SoC compatible string
gpio: sprd: Use SoC compatible string instead of wildcard string
gpio: of: Handle both enable-gpio{,s}
gpio: of: Restrict enable-gpio quirk to regulator-gpio
gpio: davinci: use devm_platform_ioremap_resource()
...
|
||
|
Linus Torvalds
|
cf2e8c544c |
- New Drivers
- Add STMPE ADC Input driver
- Add STMicroelectronics STPMIC1 Parent driver
- Add STMicroelectronics STPMIC1 OnKey Misc driver
- Add STMicroelectronics STPMIC1 Watchdog driver
- Add Cirrus Logic Lochnagar Parent driver
- Add TQ-Systems TQMX86 Parent driver
- New Device Support
- Add support for ADC to STMPE
- New (or moved) Functionality
- Move Lightbar functionality to its own driver; cros_ec_lightbar
- Move VBC functionality to its own driver; cros_ec_vbc
- Move VBC functionality to its own driver; cros_ec_vbc
- Move DebugFS functionality to its own driver; cros_ec_debugfs
- Move SYSFS functionality to its own driver; cros_ec_sysfs
- Add support for input voltage options; tps65218
- Fix-ups
- Use devm_* managed resources; cros_ec
- Device Tree documentation; stmpe, aspeed-lpc, lochnagar
- Trivial Clean-ups; stmpe
- Rip out broken modular code; aat2870-core, adp5520, as3711,
db8500-prcmu, htc-i2cpld, max8925-core, rc5t583, sta2x11-mfd,
syscon, tps65090, tps65910, tps68470 tps80031, wm831x-spi,
wm831x-i2c, wm831x-core, wm8350-i2c, wm8350-core, wm8400-core
- Kconfig fixups; INTEL_SOC_PMIC
- Improve error path; sm501, sec-core
- Use struct_size() helper; sm501
- Constify; at91-usart
- Use pointers instead of copying data; at91-usart
- Deliver proper return value; cros_ec_dev
- Trivial formatting/whitespace; sec-core
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlyA5j4ACgkQUa+KL4f8
d2EAyw/+N7N77ex5Ryxmyn61SWvgTL221tj+olw6RqC92Vfw6S2ZFP1CsM/E7tZb
qCLYkkJSgBLKoOCI5OLiXsvWCPjyLU33nG/oS0SSiMJ1Fp9M0h7uRnOtOio3z31i
w9MJAvEY3RN8I1bRGMO6aWUtT0q3AzHNtdl+7BqAkjjeXiUE0lGd5eARRS1zRWSa
ki0OzUkJeszPk+6E6N0K+BQZxcL3cBEsR8ZAif903cMEbqsJIv4nmif4b5D63BKH
PtOLn+6HVMG4bzqRRytVhcO/z2uj2jlLCHH9wBnyd4b7SoLFuz15yN5DhD4bKLt7
0UMqiBlC2MeaTv3wyKjeNPQtaMY7zJNUpdFly1PHAYR4oy5kbqk2IAv30N/zRfPK
zLmWWq7DYdazBxSSGKmpGEW63Dkr/MQY2oj4nUlcank/X0K7LvmXv7kIxp9jJhA5
bE76f77uHneHvq5OTc5CZtaYNqZbE6tO8rqZ2QlfCqa0M8VxbcrYiym0fQFJBdsH
eFtaTG162ssZq1npV759c4/2E3zQ3EW+rj89/AWp8ViJULQLyPY2nUYddx+w04Se
kSdgYCvMI5byvF+Tuq/CbUWz7kyca3D+EFiYTkzIfrZr+4yiG2VO8wEO1knkEUVo
9X/wnAD5hQJePEM8CyPZrnirndB0W6SAvSmRZlF/OAbuCBz1DkQ=
=tUge
-----END PGP SIGNATURE-----
Merge tag 'mfd-next-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Drivers:
- Add STMPE ADC Input driver
- Add STMicroelectronics STPMIC1 Parent driver
- Add STMicroelectronics STPMIC1 OnKey Misc driver
- Add STMicroelectronics STPMIC1 Watchdog driver
- Add Cirrus Logic Lochnagar Parent driver
- Add TQ-Systems TQMX86 Parent driver
New Device Support:
- Add support for ADC to STMPE
New (or moved) Functionality:
- Move Lightbar functionality to its own driver; cros_ec_lightbar
- Move VBC functionality to its own driver; cros_ec_vbc
- Move VBC functionality to its own driver; cros_ec_vbc
- Move DebugFS functionality to its own driver; cros_ec_debugfs
- Move SYSFS functionality to its own driver; cros_ec_sysfs
- Add support for input voltage options; tps65218
Fixes:
- Use devm_* managed resources; cros_ec
- Device Tree documentation; stmpe, aspeed-lpc, lochnagar
- Trivial Clean-ups; stmpe
- Rip out broken modular code; aat2870-core, adp5520, as3711,
db8500-prcmu, htc-i2cpld, max8925-core, rc5t583, sta2x11-mfd,
syscon, tps65090, tps65910, tps68470 tps80031, wm831x-spi,
wm831x-i2c, wm831x-core, wm8350-i2c, wm8350-core, wm8400-core
- Kconfig fixups; INTEL_SOC_PMIC
- Improve error path; sm501, sec-core
- Use struct_size() helper; sm501
- Constify; at91-usart
- Use pointers instead of copying data; at91-usart
- Deliver proper return value; cros_ec_dev
- Trivial formatting/whitespace; sec-core"
* tag 'mfd-next-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (53 commits)
mfd: mxs-lradc: Mark expected switch fall-through
mfd: sec-core: Cleanup formatting to a consistent style
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO
mfd: intel-lpss: Move linux/pm.h to the local header
mfd: cros_ec_dev: Return number of bytes read with CROS_EC_DEV_IOCRDMEM
mfd: tps68470: Drop unused MODULE_DEVICE_TABLE
mfd: at91-usart: No need to copy mfd_cell in probe
mfd: at91-usart: Constify at91_usart_spi_subdev and at91_usart_serial_subdev
mfd: lochnagar: Add support for the Cirrus Logic Lochnagar
mfd: lochnagar: Add initial binding documentation
dt-bindings: mfd: aspeed-lpc: Make parameter optional
mfd: sec-core: Return gracefully instead of BUG() if device cannot match
mfd: sm501: Use struct_size() in devm_kzalloc()
mfd: sm501: Fix potential NULL pointer dereference
mfd: Kconfig: Fix I2C_DESIGNWARE_PLATFORM dependencies
mfd: tps65218.c: Add input voltage options
mfd: wm8400-core: Make it explicitly non-modular
mfd: wm8350-core: Drop unused module infrastructure from non-modular code
mfd: wm8350-i2c: Make it explicitly non-modular
mfd: wm831x-core: Drop unused module infrastructure from non-modular code
...
|
||
|
Linus Torvalds
|
e266ca36da |
Staging/IIO patches for 5.1-rc1
Here is the big staging/iio driver pull request for 5.1-rc1. Lots of good IIO driver updates and cleanups in here as always. Combined with the removal of the xgifb driver, we have a net "loss" of over 9000 lines in the pull request, always a nice thing. As the outreachy application process is currently happening, there are loads of tiny checkpatch cleanup fixes all over the staging tree, which accounts for the majority of the fixups. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXH+gLQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymBiQCeJpoBhG+W3r+kP8w65ZY8qU+/liIAn0Tkl4/k IX1dQzCsEpO1jA8AHj6n =7wCH -----END PGP SIGNATURE----- Merge tag 'staging-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO updates from Greg KH: "Here is the big staging/iio driver pull request for 5.1-rc1. Lots of good IIO driver updates and cleanups in here as always. Combined with the removal of the xgifb driver, we have a net "loss" of over 9000 lines in the pull request, always a nice thing. As the outreachy application process is currently happening, there are loads of tiny checkpatch cleanup fixes all over the staging tree, which accounts for the majority of the fixups" * tag 'staging-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (341 commits) staging: mt7621-dma: remove license boilerplate text staging: mt7621-dma: add SPDX GPL-2.0+ license identifier Staging: ks7010: Replace typecast to int Staging: vt6655: Align a static function declaration staging: speakup: fix line over 80 characters. staging: mt7621-eth: Remove license boilerplate text staging: mt7621-eth: Add SPDX license identifier staging: ks7010: removed custom Michael MIC implementation. staging: rtl8192e: Fix space and suspect issue Staging: vt6655: Modify comment style of SPDX License Identifier Staging: vt6655: Modify comment style for SPDX-License-Identifier Staging: vt6655: Align a function declaration Staging: vt6655: Alignment of function declaration staging: rtl8712: Fix indentation issue staging: wilc1000: fix incorrent type in initializer staging: rtl8188eu: remove unused P2P_PRIVATE_IOCTL_SET_LEN staging: rtl8188eu: remove unused enum P2P_PROTO_WK_ID staging: rtl8723bs: Remove duplicated include from drv_types.h Staging: vt6655: Alignment should match open parenthesis staging: erofs: fix mis-acted TAIL merging behavior ... |
||
|
Linus Torvalds
|
45763bf4bc |
Char/Misc driver patches for 5.1-rc1
Here is the big char/misc driver patch pull request for 5.1-rc1. The largest thing by far is the new habanalabs driver for their AI accelerator chip. For now it is in the drivers/misc directory but will probably move to a new directory soon along with other drivers of this type. Other than that, just the usual set of individual driver updates and fixes. There's an "odd" merge in here from the DRM tree that they asked me to do as the MEI driver is starting to interact with the i915 driver, and it needed some coordination. All of those patches have been properly acked by the relevant subsystem maintainers. All of these have been in linux-next with no reported issues, most for quite some time. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXH+dPQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ym1fACgvpZAxjNzoRQJ6f06tc8ujtPk9rUAnR+tCtrZ 9e3l7H76oe33o96Qjhor =8A2k -----END PGP SIGNATURE----- Merge tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver patch pull request for 5.1-rc1. The largest thing by far is the new habanalabs driver for their AI accelerator chip. For now it is in the drivers/misc directory but will probably move to a new directory soon along with other drivers of this type. Other than that, just the usual set of individual driver updates and fixes. There's an "odd" merge in here from the DRM tree that they asked me to do as the MEI driver is starting to interact with the i915 driver, and it needed some coordination. All of those patches have been properly acked by the relevant subsystem maintainers. All of these have been in linux-next with no reported issues, most for quite some time" * tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits) habanalabs: adjust Kconfig to fix build errors habanalabs: use %px instead of %p in error print habanalabs: use do_div for 64-bit divisions intel_th: gth: Fix an off-by-one in output unassigning habanalabs: fix little-endian<->cpu conversion warnings habanalabs: use NULL to initialize array of pointers habanalabs: fix little-endian<->cpu conversion warnings habanalabs: soft-reset device if context-switch fails habanalabs: print pointer using %p habanalabs: fix memory leak with CBs with unaligned size habanalabs: return correct error code on MMU mapping failure habanalabs: add comments in uapi/misc/habanalabs.h habanalabs: extend QMAN0 job timeout habanalabs: set DMA0 completion to SOB 1007 habanalabs: fix validation of WREG32 to DMA completion habanalabs: fix mmu cache registers init habanalabs: disable CPU access on timeouts habanalabs: add MMU DRAM default page mapping habanalabs: Dissociate RAZWI info from event types misc/habanalabs: adjust Kconfig to fix build errors ... |
||
|
Linus Torvalds
|
384d11fa0e |
ARM: SoC driver updates for 5.1
As usual, the drivers/tee and drivers/reset subsystems get merged here, with the expected set of smaller updates and some new hardware support. The tee subsystem now supports device drivers to be attached to a tee, the first example here is a random number driver with its implementation in the secure world. Three new power domain drivers get added for specific chip families: - Broadcom BCM283x chips (used in Raspberry Pi) - Qualcomm Snapdragon phone chips - Xilinx ZynqMP FPGA SoCs One new driver is added to talk to the BPMP firmware on NVIDIA Tegra210 Existing drivers are extended for new SoC variants from NXP, NVIDIA, Amlogic and Qualcomm. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJcfpKpAAoJEGCrR//JCVInMpYQANwKKWOTm5NHqtf7/ZKBzx6/ Yk7Jj8QLGKrHScnuBZSBvTwv5Cc5O5Ye+tAuGVArOoD2ktXlLZmHZ/ZPFAudT3di aFYbA44RNhv+O/xOmToDCCjSHm176hwUY0Cs5bFnfx6TcMsdOYIQIG+XQKx/a9zg 3ZBEv7wZqcBArLc0X2Z2/uiVrEIh3wWwXytvw+8TG8ifUfpbDxRUxDlj1JRDpjMu yX4q8JDhdQvi2FTXbXcEHTdQ6RT11svPM/YxQDxfULRK9aNKf4GZJ4QlwZy+SO7N cEFxDd4ML/iJ1LjalvtXGkR0xrw9/gOlO3vbB9Uw3EngBDUSQfHmqJet10a14l8q KcToe3teIB+Z1R+plrt+h5UDJTbVibgZXhU6wIdkDgtF6oTyg1moIbTqNKHgcA3b HLJv4gFejeluQzJ/3dZHBnkvJo1XFAvGFmFXle0bmJRFtDx73CKnf6MA9N82l2/x nTn4LTxXIJVKWTWAs1qkrFyIx1gOrpGhiHPQ2JiOPMZLstz3Sr6tiJuWOr+1Ex4/ UlZsD/CrRb+SbPBonpkD+bvzSR+j0M72A7hGmfZcDzainciWgunyXglUlzO/MT24 C6p4R9MZ2Fffoe8pESppabRNUItp8gNsNGI7CY1IK8pgpxLrujw8OnqykpV0VETo As+6dZrHfPNSuI7udJi5 =+DOl -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "As usual, the drivers/tee and drivers/reset subsystems get merged here, with the expected set of smaller updates and some new hardware support. The tee subsystem now supports device drivers to be attached to a tee, the first example here is a random number driver with its implementation in the secure world. Three new power domain drivers get added for specific chip families: - Broadcom BCM283x chips (used in Raspberry Pi) - Qualcomm Snapdragon phone chips - Xilinx ZynqMP FPGA SoCs One new driver is added to talk to the BPMP firmware on NVIDIA Tegra210 Existing drivers are extended for new SoC variants from NXP, NVIDIA, Amlogic and Qualcomm" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits) tee: optee: update optee_msg.h and optee_smc.h to dual license tee: add cancellation support to client interface dpaa2-eth: configure the cache stashing amount on a queue soc: fsl: dpio: configure cache stashing destination soc: fsl: dpio: enable frame data cache stashing per software portal soc: fsl: guts: make fsl_guts_get_svr() static hwrng: make symbol 'optee_rng_id_table' static tee: optee: Fix unsigned comparison with less than zero hwrng: Fix unsigned comparison with less than zero tee: fix possible error pointer ctx dereferencing hwrng: optee: Initialize some structs using memset instead of braces tee: optee: Initialize some structs using memset instead of braces soc: fsl: dpio: fix memory leak of a struct qbman on error exit path clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static soc: qcom: llcc-slice: Fix typos qcom: soc: llcc-slice: Consolidate some code qcom: soc: llcc-slice: Clear the global drv_data pointer on error drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings ... |
||
|
Linus Torvalds
|
6ad63dec9c |
ARM: SoC device tree updates for 5.1
This is a smaller update than the past few times, but with just over
500 non-merge changesets still dwarfes the rest of the SoC tree.
Three new SoC platforms get added, each one a follow-up to an existing
product, and added here in combination with a reference platform:
- Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
- Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for
Rich Graphics Applications".
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
- NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
These are actual commercial products we now support with an in-kernel
device tree source file:
- Bosch Guardian is a product made by Bosch Power
Tools GmbH, based on the Texas Instruments AM335x chip
- Winterland IceBoard is a Texas Instruments AM3874 based
machine used in telescopes at the south pole and elsewhere, see commit
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Linus Torvalds
|
aebbfafc74 |
ARM: SoC platform updates for 5.1
The APM X-Gene platform is now maintained by folks from Ampere computing that took over the product line a while ago, this gets reflected in the MAINTAINERS file. Cleanups continue on the older mach-davinci and mach-pxa platform, to get them to be more like the modern ones. For pxa, we now remove the Raumfeld platform code as it now works with device tree based booting. i.MX adds a couple new features for the i.MX7ULP SoC Mediatek gains support for a new SoC: MT7629 is a new wireless router platform, following MT7623. Aside from those, there are the usual minor cleanups and bugfixes across several platforms. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJcf+c8AAoJEGCrR//JCVInuUsQAK+F+7hrfkwCSLXzqVIPMYC1 hFV11s7bgbHfzkSa6ZyFC0uuT737dZjJrOdvZOXFJ2VxDscxI62mj56jCrF8tr1x BQqIiDLGU55mLTkPiVtmVi8p79IXz2G/1dBeYrfyj/xec6DsjVkO1Cm2itQ3vg5Q ZM8DRmIxsKsUv6YSGRfwVNXso9jOh+LPxlfrGL5ijdHgzDxRr7gO+B+jxgx9Sf6s DNLj6M8L8DFo528eHp2pJNBL21pMywAaIrDELUJyg5P3XnDX18F8CjbSRgm7OG1+ hkdmML9qQlpOjokPJ9eeitX2e+tvKoXLn+N9kq12Pn4fkvJpKlOVnZmU+Le/3By+ agX7hE2A21nsZuoHQjq16QoO4X9mDee7tcDMzGwTrSq1M18m2dEJW57vivda0qKN wNJC3qwLmh2/wfxNpO2wS29hQni7cIrFgRvUPsB/u8KvzITbQ/PMGApNV+Kf7BiO mZjH8X+0IkX0veS11KLsFUCbq4ezpPCNxbul2mMIVcTIV0Oz6mQXNHAecNxCCqMk GAgi48+9KYNszG01Xqx++x79BFnIoUJp3+gIGIa8rTvdSSsF8DlQlSzXufD9Sb2h CS+M8kvgfymUrjaKZNyR5ouI1ae1Q16pbapkpS4B6ucoc4Qbqz2POiSVhex+eU/N IrEAFEhRg7iQ9NHUaWlx =vxwd -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC platform updates from Arnd Bergmann: "The APM X-Gene platform is now maintained by folks from Ampere computing that took over the product line a while ago, this gets reflected in the MAINTAINERS file. Cleanups continue on the older mach-davinci and mach-pxa platform, to get them to be more like the modern ones. For pxa, we now remove the Raumfeld platform code as it now works with device tree based booting. i.MX adds a couple new features for the i.MX7ULP SoC Mediatek gains support for a new SoC: MT7629 is a new wireless router platform, following MT7623. Aside from those, there are the usual minor cleanups and bugfixes across several platforms" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (49 commits) MAINTAINERS: Update Ampere email address usb: ohci-da8xx: remove unused callbacks from platform data ARM: davinci: da830-evm: remove legacy usb helpers ARM: davinci: omapl138-hawk: remove legacy usb helpers usb: ohci-da8xx: add vbus and overcurrent gpios ARM: davinci: da830-evm: use gpio lookup entries for usb gpios ARM: davinci: omapl138-hawk: use gpio lookup entries for usb gpios usb: ohci-da8xx: add a helper pointer to &pdev->dev usb: ohci-da8xx: add a new line after local variables arm64: meson: enable g12a clock controller MAINTAINERS: Add entry for uDPU board ARM: davinci: da850-evm: use GPIO hogs instead of the legacy API arm: mediatek: add MT7629 smp bring up code Revert "ARM: mediatek: add MT7623a smp bringup code" dt-bindings: soc: fix typo of MT8173 power dt-bindings ARM: meson: remove COMMON_CLK_AMLOGIC selection arm64: meson: remove COMMON_CLK_AMLOGIC selection ARM: lpc32xx: remove platform data of ARM PL111 LCD controller ARM: lpc32xx: remove platform data of ARM PL180 SD/MMC controller ARM: lpc32xx: Use kmemdup to replace duplicating its implementation ... |
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Linus Torvalds
|
d9862cfbe2 |
Here's the main MIPS pull request for v5.1:
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB (GINVT) instructions, allowing for more efficient TLB maintenance when running on a CPU such as the I6500 that supports these. - Enable huge page support for MIPS64r6. - Optimize post-DMA cache sync by removing that code entirely for kernel configurations in which we know it won't be needed. - The number of pages allocated for interrupt stacks is now calculated correctly, where before we would wastefully allocate too much memory in some configurations. - The ath79 platform migrates to devicetree. - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board. - The ingenic/jz4740 platform gains support for appended devicetrees. - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see cleanups as do various pieces of core architecture code. -----BEGIN PGP SIGNATURE----- iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXH3BQxUccGF1bC5idXJ0 b25AbWlwcy5jb20ACgkQPqefrLV1AN1+4wD+Oh4JTfZN/NEOQMlrSkXxjEHqjX3u 1Y6CiiPCs+q2UnYBANb+ic+ZH5MnvJxxmcvlYI2q3rIh4b8TDriip4KMUTUP =Sw9X -----END PGP SIGNATURE----- Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Paul Burton: - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB (GINVT) instructions, allowing for more efficient TLB maintenance when running on a CPU such as the I6500 that supports these. - Enable huge page support for MIPS64r6. - Optimize post-DMA cache sync by removing that code entirely for kernel configurations in which we know it won't be needed. - The number of pages allocated for interrupt stacks is now calculated correctly, where before we would wastefully allocate too much memory in some configurations. - The ath79 platform migrates to devicetree. - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board. - The ingenic/jz4740 platform gains support for appended devicetrees. - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see cleanups as do various pieces of core architecture code. * tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits) MIPS: lantiq: Remove separate GPHY Firmware loader MIPS: ingenic: Add support for appended devicetree MIPS: SGI-IP27: rework HUB interrupts MIPS: SGI-IP27: do boot CPU init later MIPS: SGI-IP27: do xtalk scanning later MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output MIPS: SGI-IP27: clean up bridge access and header files MIPS: SGI-IP27: get rid of volatile and hubreg_t MIPS: irq: Allocate accurate order pages for irq stack MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys() MIPS: eBPF: Remove REG_32BIT_ZERO_EX MIPS: eBPF: Always return sign extended 32b values MIPS: CM: Fix indentation MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support MIPS: OCTEON: program rx/tx-delay always from DT MIPS: OCTEON: delete board-specific link status MIPS: OCTEON: don't lie about interface type of CN3005 board MIPS: OCTEON: warn if deprecated link status is being used MIPS: OCTEON: add fixed-link nodes to in-kernel device tree MIPS: Delete unused flush_cache_sigtramp() ... |
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Anson Huang
|
0c91c11c7d |
clk: imx8mq: add GPIO clocks to clock tree
i.MX8MQ has clock gate for each GPIO bank, add them into clock tree for GPIO driver to manage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Seiya Wang
|
64f4466c88 |
clk: mediatek: correct cpu clock name for MT8173 SoC
Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72. Signed-off-by: Seiya Wang <seiya.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Edgar Bernardi Righi
|
0c8c53e033 |
dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU
Add devicetree bindings for Actions Semi S500 Clock Management Unit. Signed-off-by: Edgar Bernardi Righi <edgar.righi@lsitec.org.br> [Mani: Documented S500 CMU compatible] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Fix SPDX comment style in header file] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Gabriel Fernandez
|
585fc46bd4 |
dt-bindings: clock: remove unused definition for stm32mp1
A copy of LTDC_PX and ETHCK_K (LTDC_K and ETHMAC_K) was introduced in stm32mp1 dt-bindings file by mistake. These bindings are not used and shouldn't be use to be conform with convention name of the stm32mp1 clock IP. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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David Dai
|
04053f4d23 |
clk: qcom: clk-rpmh: Add IPA clock support
The clk-rpmh driver only supports on and off RPMh clock resources. Let's extend the driver by adding support for clocks that are managed by a different type of RPMh resource known as Bus Clock Manager(BCM). The BCM is a configurable shared resource aggregator that scales performance based on a set of frequency points. The Qualcomm IP Accelerator (IPA) clock is an example of a resource that is managed by the BCM and this a requirement from the IPA driver in order to scale its core clock. Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Lubomir Rintel
|
ed11aff3ee |
dt-bindings: marvell,mmp2: Add clock id for the LCDC clock
The peripheral clock is required for access the the LCDC registers. It is in fact separate from the "AXI clock" that is optionally used to generate the pixel clock and as such requires a separate clock id. Link: https://lists.freedesktop.org/archives/dri-devel/2019-January/203975.html Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Abel Vesa
|
45a359e80d |
dt-bindings: imx8mq-clock: Add the missing ARM clock
Add the missing ARM clock which will be used by cpufreq Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> [sboyd@kernel.org: Fixed numbering in dt header] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Fabio Estevam
|
202ce5afe5 |
clk: imx8mq: Add support for the CLKO1 clock
Add the entry for the CLKO1 clock. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Bai Ping
|
037a474f61 |
dt-bindings: imx: Add clock binding doc for imx8mm
Add the clock binding doc for i.MX8MM. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Michael Grzeschik
|
9b15cffbf2 |
clk: imx5: add imx5_SCC2_IPG_GATE
This adds the missing clock for the SCC2 peripheral unit. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Linus Walleij
|
8fab3d713c |
gpio updates for v5.1
- support for a new variant of pca953x - documentation fix from Wolfram - some tegra186 name changes - two minor fixes for madera and altera-a10sr -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAlxleLcACgkQEacuoBRx 13I45Q//YMGUYzkMjOL+lp2DYnnVhVNqrF4hoLjinWVrnhZ6gqu88RgV2Cea4Pta oxVxnSsE8LK7kY8VZ8tcBmIqLLkQAJdSVtqkeSoZF2vhWBAbE9ZaSOYb17SIkSXK Ok16lZgZ+ZWOM5EjEvuRpB/qYGjX2glD5/Y2Kl7+wsX1W6U2pXasP0IjhcvDU8mJ NXNgfkr6kluMUqHJyqKo8eT/P3Hdv0CK9GsN2vGyfJenCdTSd7EC6KuhWAivi+fG /lf1bVuc2cCiXjxdSOXx+Yz7SjNe56viTaqnn/K6OlfLgErjKnRW+AxPkTZXNtDi pfMMpPXiwPcbQR2wrXG/7OMmJ1kUsfWoIUCx5RDwhF1KbEQVqgaSITLylk+4Yp/3 eM0fYsQ+KvOdAnWKSgfxBhaaiO7z5XDdrnkSHBDoiBrm07BqBgK/v3Rivzf2GMEv QvM4OBfThS9I8skV5BaOBRDfHZs4N0EU/vhsW9gt50urtlSM0vSYx6kdMq/8R0k4 NkJT43u+1vi5koMljBAsZYZiyXOQ2B+PlfpTMfMu+93QH8wlu9mOt1r3YTQyA1Xf jiOK8M2yQKP5g7RuPM6MtMsqlZKDM5nAlSf7S280Z3+vBd+LaELbXvT2/JL5ViGU hfH/gaNwUGUYd8EsWvfhHVdPAAecDCwxfKyKEnFGhMrtunTgwfI= =nV64 -----END PGP SIGNATURE----- Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpio updates for v5.1 - support for a new variant of pca953x - documentation fix from Wolfram - some tegra186 name changes - two minor fixes for madera and altera-a10sr |
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Arnd Bergmann
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d0e1f79ad3 |
Merge tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes
mt8173: minor typo in scpsys header file mt7629: add smp bringup code mt7623a: delete unused smp bringup code * tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: mediatek: add MT7629 smp bring up code Revert "ARM: mediatek: add MT7623a smp bringup code" dt-bindings: soc: fix typo of MT8173 power dt-bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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187b4ac7df |
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following: - Stefan updates the BCM2835 SoC driver with downstream properties and uses that to implement a reboot notifier to tell the VC4 firmware when Linux on the ARM CPU is rebooting - Eric adds a proper power domain driver for the BCM283x SoCs and updates a bunch of drivers to have a better and clearer Device Tree definition to support power domains/breaking up of functionality. This requires converting the existing watchdog driver into a MFD and then breaking up the functionality into separate drivers and finally updating the DTS files to leverage the power domains information. - Wei provides a fix for making a symbol static -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxV0IYACgkQh9CWnEQH BwQIHA//TL12EfHws6C64EKspqsg9NE5/+K3HRRJbgwtuBQ/n6oYBMyJx+6x6Nwc 7QjuCkZ/VWKxy0Fn+ToGnX0JgrQL5kND3Cm0d8cyZ0VJ6juppizyAa1YkFplShSr l0XlYaJo1HrB3hBd/+YbGZnLp9flbii5d3MIcy8ZoWmN7zLeHnQbHaf8jcbJC+Iw Mal8ojk2ru0rMimMQieTiPzWwiec08wtSIYs2590rOVWFyhGIn/KmHqpG6iYjdwj oQbr86R0jMPCb/g3SXRttxW8wFbtYdmILdkzhOaEd4JyJEwUCNDciM3E04OyE9VN fNMc1l0zh7dfyo9bFRpgS6AAxYQVj3led+B1NGtpnjDPybVWU10gipGdgFt9UPRE pJnS1LcPbAJ1FdbcYFU0TsiViWLZehm2cbc4rPYvqKp1Y+82FJZTYyu0GmBOUwB6 jpM5ZVvET8k3nw6ImeE3jjT3kBfF31u552+iO4RQvKHRm/GBMtyTDrFZVUwgqMFE NEKnj3/VLSCxP3dnQImw1ro2493piZNdlBEs6mAugFUGqcb+40KOtOOpWiGMFH7h BZN0kj128ryG/YCVKDOnZSbYRLhpxc1VcVYJ3rYJgn8mrFFmNo/fjDgaRogrJN/s LmCiSIqsmuy8f36/IWd+aHk6ex5yskJe7x5M/7tlmz03oXg1viQ= =t5+u -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes for 5.1, please pull the following: - Stefan updates the BCM2835 SoC driver with downstream properties and uses that to implement a reboot notifier to tell the VC4 firmware when Linux on the ARM CPU is rebooting - Eric adds a proper power domain driver for the BCM283x SoCs and updates a bunch of drivers to have a better and clearer Device Tree definition to support power domains/breaking up of functionality. This requires converting the existing watchdog driver into a MFD and then breaking up the functionality into separate drivers and finally updating the DTS files to leverage the power domains information. - Wei provides a fix for making a symbol static * tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux: ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware. ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4) soc: bcm: bcm2835-pm: Make local symbol static soc: bcm: Make PM driver default for BCM2835 soc: bcm: bcm2835-pm: Add support for power domains under a new binding. bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD. dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4) firmware: raspberrypi: notify VC4 firmware of a reboot soc: bcm2835: sync firmware properties with downstream Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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405bcfff17 |
Qualcomm ARM Based Driver Updates for v5.1
* Add Qualcomm RPMh power domain driver and related changes * Fix issues with sleep/wake sets and batch API in RPMh * Update MAINTAINERS Qualcomm entry * Fixup RMTFS-mem sysfs and uevents * Fix error handling in GSBI * Add SMD-RPM compatible entry for SDM660 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcV75tAAoJEFKiBbHx2RXV3ZcQAJ4xdmg0eVXrzu4ltl/ZbF7m walu7pGtLF7lIXJoJZWgpzS6SAmDQAMG++pp6zP6+3t6fB8heSNVBImgo2l6fHzr KEHoH1PFhrdZwyOhswE/5n5CZBOb4xrL+m94NufDh7Yv8h5ukC8DH3xE9PFsoh4A GnDc6qkHByNJKuNxlKKASq6VRMqzpnys2Ibzs6G5/6UDzvnEAYj5VoHLLCjsh6r+ +bKusJPUZKujyLU85rbtpEjO1HxHiOq7TJI5FZ8dta+iXSyIc/2nM9InTgr68ATq VN7mOtclMEiVN8uQaXN0D/FWK3JYBIY5Mvd8zYzzkE+NDj0tnZDZoLjK2VnTX9o+ nORX7vQc/JmBayLcMaBZ/ZB+i2lsg37ziFCZaZiP9GYR1DAvm3yLfaxbWmkVKbGq lhf/dR7qyXKjIP8rPO2qp4sCKww2RbkDa2p+xnQ2/psjvpgkmy4lcfIhw5HWonQR eJ1UgoLsdQf/Xi6cKKmuzbdQsmZGr95sTHh06Gw1yeMRGuoXTHSNYx5epLdwJmD5 OWcIwh+sfZdmKUhMB/895EFpRuK/+L07N+n48DYaaU4CHXcowp80Ng5V6FnEnEWm tI9oKt3N2kAYQAPlgpb3azTtAmB+yAcaYGrNQXzd7nYLnLma40qCR0Nx8bMXCjeq sgRdF06ATCQDbBruztw3 =CcrU -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.1 * Add Qualcomm RPMh power domain driver and related changes * Fix issues with sleep/wake sets and batch API in RPMh * Update MAINTAINERS Qualcomm entry * Fixup RMTFS-mem sysfs and uevents * Fix error handling in GSBI * Add SMD-RPM compatible entry for SDM660 * tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: smd-rpm: Add sdm660 compatible soc: qcom: gsbi: Fix error handling in gsbi_probe() soc: qcom: rpmh: Avoid accessing freed memory from batch API drivers: qcom: rpmh: avoid sending sleep/wake sets immediately soc: qcom: rmtfs-mem: Make sysfs attributes world-readable soc: qcom: rmtfs-mem: Add class to enable uevents soc: qcom: update config dependencies for QCOM_RPMPD soc: qcom: rpmpd: Drop family A RPM dependency MAINTAINERS: update list of qcom drivers soc: qcom: rpmhpd: Mark mx as a parent for cx soc: qcom: rpmhpd: Add RPMh power domain driver soc: qcom: rpmpd: Add support for get/set performance state soc: qcom: rpmpd: Add a Power domain driver to model corners dt-bindings: power: Add qcom rpm power domain driver bindings OPP: Add support for parsing the 'opp-level' property dt-bindings: opp: Introduce opp-level bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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6f2185f8e3 |
Reset controller changes for v5.1
This adds the include/linux/reset directory to MAINTAINERS for reset specific headers and adds headers for sunxi and socfpga in there to get rid of a few extern function declarations. There is a new reset driver for the Broadcom STB reset controller and the i.MX7 system reset controller driver is extended to support i.MX8MQ as well. Finally, there is a new header with reset id constants for the Meson G12A SoC, which has a reset controller identical to Meson AXG and thus can reuse its driver and DT bindings. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXF2yeRcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwH8jAP9OQaMl5llVXuHSFOwiqkJ2I09p oROxu3dI/A4q7d5T8QD/Xuo4piSAdoT5YZyHp16NUafW3L1//wqTvxk0ubeTsgA= =EIyo -----END PGP SIGNATURE----- Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers Reset controller changes for v5.1 This adds the include/linux/reset directory to MAINTAINERS for reset specific headers and adds headers for sunxi and socfpga in there to get rid of a few extern function declarations. There is a new reset driver for the Broadcom STB reset controller and the i.MX7 system reset controller driver is extended to support i.MX8MQ as well. Finally, there is a new header with reset id constants for the Meson G12A SoC, which has a reset controller identical to Meson AXG and thus can reuse its driver and DT bindings. * tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux: dt-bindings: reset: meson: add g12a bindings reset: imx7: Add support for i.MX8MQ IP block variant reset: imx7: Add plubming to support multiple IP variants reset: Add Broadcom STB SW_INIT reset controller driver dt-bindings: reset: Add document for Broadcom STB reset controller reset: socfpga: declare socfpga_reset_init in a header file reset: sunxi: declare sun6i_reset_init in a header file MAINTAINERS: use include/linux/reset for reset controller related headers dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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59f527dd7a |
arm64: zynqmp: SoC changes for v5.1
- Extend firmware interface with reset, nvmem, power management and power domain support - Add reset, nvmem driver, power management and power domain drivers - -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlxixLEACgkQykllyylKDCEduwCeLkIFr48uJ/5Fv1X16gitcrOk F38An2wbsk21xkWQpfzCFdUrpPbT0u4t =GOP8 -----END PGP SIGNATURE----- Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/drivers arm64: zynqmp: SoC changes for v5.1 - Extend firmware interface with reset, nvmem, power management and power domain support - Add reset, nvmem driver, power management and power domain drivers - * tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx: drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings drivers: soc: xilinx: Add ZynqMP PM driver firmware: xilinx: Implement ZynqMP power management APIs dt-bindings: soc: Add ZynqMP PM bindings nvmem: zynqmp: Added zynqmp nvmem firmware driver dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver firmware: xilinx: Add zynqmp_pm_get_chipid() API reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. dt-bindings: reset: Add bindings for ZynqMP reset driver firmware: xilinx: Add reset API's Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
550a43b310 |
Renesas ARM Based SoC DT Updates for v5.1
* R-Car H2 (r8a7790) based Stout board - Convert to new LVDS DT bindings * R-Car H1 (r8a7779) and M1A (r8a7778) SoCs - Describe HSCIF0/1 devices in DT * RZ/G1M (r8a7743) SoC - Correct sort order of the RWDT node - Remove aliases: should be defined in board rather than SoC DT if needed - Remove generic compatible string from iic3: it is not compatible * RZ/G1N (r8a7744) SoC - Describe LVDS and DU devices in DT - Correct sort order of VSP and MSIOF noces * RZ/G1C (r8a7747) based iWave SBC - Enable RTC * RZ/A2M (r7s9210) SoC and EVB - Initial support -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlxdXz4ACgkQ189kaWo3 T75wbBAAqOyXvMCt7lGsov4i0e/lqSFl13uHv83Mk+PVvvT48H2g/ItitGDq4GYr ItAYBRF66XcAKJbA30e4OvAk+yB0Y3iMT8KIR4Nca5ls9rn6NwbyBugZ65mizKEk vIoA1sGpsWUrK0yxmGoIx9C6aX9qsh82ivdMpvwb1Kzy5oO59GCgJ9d/d+Q2KwvG rycEPQwHLFIIijoNr0IH3ZiXhyfeEabGHg/EK/FVxJJNgQLjFW0ZogsZ/a49ptoZ YZqEc2w13a+rWFTg7059UbzPNjJCq0/2lYRPthWTz9KzUyFgSZ+2GvawdoFSvBZ5 cf+6+qZkgkVvs00yajd6Q2t9IcyjeVmU+GBHFSO65wDRJknDN8sE1v/qHaAr0+Bm My8Th55Tzak/d+6Zb6xP95kTiaUDpWQrjntMvg3AewiAcjDJasBSsU9EDBlEDh3W VaQVkyyHtWwfiS0qFf4u0Rfgb2DIBYLvXzslipyZnsKih14+rC/S6N3j8rykrOoE DTjh7Hi4k4xYwqwNFrg9lvGCoAG4aZddyat9SYfgTs65OmG7huyTH5vqtsmB3kN0 0a33nQ8xt24TH6wSHGB17GXeR9JEluqHC0Do9bbis1B6QiSBvcY+Ne1LtFN8O5sH RNEcoqU1cCLVHvbRJL/3Y5bwYF22f0GvbMxO/vgdmcz2DSxbuL0= =q0l0 -----END PGP SIGNATURE----- Merge tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt Renesas ARM Based SoC DT Updates for v5.1 * R-Car H2 (r8a7790) based Stout board - Convert to new LVDS DT bindings * R-Car H1 (r8a7779) and M1A (r8a7778) SoCs - Describe HSCIF0/1 devices in DT * RZ/G1M (r8a7743) SoC - Correct sort order of the RWDT node - Remove aliases: should be defined in board rather than SoC DT if needed - Remove generic compatible string from iic3: it is not compatible * RZ/G1N (r8a7744) SoC - Describe LVDS and DU devices in DT - Correct sort order of VSP and MSIOF noces * RZ/G1C (r8a7747) based iWave SBC - Enable RTC * RZ/A2M (r7s9210) SoC and EVB - Initial support * tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a7744: Add LVDS support ARM: dts: r8a7744: Add DU support ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB ARM: dts: r7s9210: Initial SoC device tree ARM: dts: r8a7779: Add HSCIF0/1 device nodes ARM: dts: r8a7778: Add HSCIF0/1 support ARM: dts: r8a7743: Fix sorting of rwdt node ARM: dts: r8a7743: Remove aliases from SoC dtsi ARM: dts: r8a7743: Remove generic compatible string from iic3 ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes ARM: dts: iwg23s-sbc: Enable RTC ARM: dts: stout: Convert to new LVDS DT bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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|
Martin Blumenstingl
|
40d08f774c |
dt-bindings: clock: meson8b: add APB clock definition
Commit |
||
|
Neil Armstrong
|
be3d960b0a |
dt-bindings: clk: add G12A AO Clock and Reset Bindings
Add bindings for the Amlogic G12A AO Clock and Reset controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com |
||
|
Thomas Petazzoni
|
ede033e1e8 |
dt-bindings: gpio: document the new pull-up/pull-down flags
This commit extends the flags that can be used in GPIO specifiers to indicate if a pull-up resistor or pull-down resistor should be enabled. While some pinctrl DT bindings already offer the capability of configuring pull-up/pull-down resistors at the pin level, a number of simple GPIO controllers don't have any pinmuxing capability, and therefore do not rely on the pinctrl DT bindings. Such simple GPIO controllers however sometimes allow to configure pull-up and pull-down resistors on a per-pin basis, and whether such resistors should be enabled or not is a highly board-specific HW characteristic. By using two additional bits of the GPIO flag specifier, we can easily allow the Device Tree to describe which GPIOs should have their pull-up or pull-down resistors enabled. Even though the two options are mutually exclusive, we still need two bits to encode at least three states: no pull-up/pull-down, pull-up, pull-down. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Greg Kroah-Hartman
|
277c8e8b81 |
Second set of new device support, features and cleanup for IIO in the 5.1 cycle.
There are a few late breaking fixes in here that weren't worth trying to
rush into 5.0 as they have been with us for quite a while.
New device support
* ad7476
- add support for TI ADS786X parts that are compatible with this Analog
Devices driver. Good to see some simple devices are so similar.
* Ingenic jz47xx SoC ADCs
- new driver and bindings
* Plantower PMS7003 partical sensor
- new driver and bindings including vendor prefix.
* TI DAC7612
- new driver and bindings for this dual DAC.
New features
* ad7768-1
- Sampling frequency control
* bmi160
- Data ready trigger support, including open-drain dt binding.
Cleanup / minor fixes.
* Analog Device DACs
- Fix some inconsistent licenses. These are only ones where there were
two different license marked in the same file, and hence were previously
unclear.
* ads124s08
- Spelling fix.
* adxl345
- Parameter alignement tidy up.
* bmi160
- SPDX
- correct a note on the types of supported interrupts which was too strict.
- use iio_pollfunc_store_time to grab an earlier timestamp.
- use if (ret) instead of if (ret < 0) to be consistent whilst simplifying
some handling where ret was effectively getting written to 0 even though
it was always already 0.
* exynos_adc
- Fix a null pointer dereference on unbind.
- Fix number of channels on Exynos4x12 devices to be 4 rather than 8.
* lpc32xx-adc
- Move DT bindings doc out of staging. Oops, I missed this one when
moving the driver.
- SPDX.
* npcm-adc
- drop documentation of reset node as going to be done differently.
It's a new driver this cycle so no need to support the previous
binding going forwards.
* sps30
- Fix an issue with a loop timeout test that meant it would never identify
a timeout.
- Mark deliberate switch fall throughs.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAlxjNmgRHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0FogooQ/9HDDuw4hrYJqH2cdUtKV29+a+kvMtrC1i
X9+VstbMQNLo4DM3lYKi4VOeh6P5htRrD9ZJ4I2lh6PfnABjr3lb1AequlxwWNQZ
9EHEY3BA0G33757LQEkqxl7h8Cqvo2y6Wl6OcUund0jP+h3F3EYkI4XWNcq5Yht4
uWTkyTRYVZqFnlXGvfPz+53tEZ6p5RijbhOdYcL8R/0yWYzZzgzut7eYZn8Qn+mR
LzSCBoEyAOUELYyRoczY2EkEO+u8H7lcU43i5TPPKji/c+w4OXu2ktuGVucXaHBs
E1NLp0psLdqR2ef8fNYTs3FO2kxI7jV5qMlR91Sa2lDRyPhYeMF+JYBQlpqm5H2U
xp8WwFrfT4KZ1yvioNeW+aNlPOd6ljDMg1z/iLWpAcUqx65QArmogL64m/Fc5GQD
jrYzw68FO6fqKh3ik7VdPKIUS0p3Dz8BdWOqvI68+C/Mr/TgML51frf1NVbdd36L
qgzMN6N53bykwN2w51O0Af4U3ZednN7BDDFkUbucutoglU+K8yRjFj583wM8QYsG
GOZ3sPVZm+ItWCGc7nTJowe6+EQNgo/md3IEmmZNPrfWPHoMEebqnNcOuqcYvIlj
wXgsJBNlWyQp5bqE9LmgClwAaWkXIoUvjUHt0cK5043ueLrYaGJ698sg0N/UO0JC
T0/PJEMjLPE=
=Se+F
-----END PGP SIGNATURE-----
Merge tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Second set of new device support, features and cleanup for IIO in the 5.1 cycle.
There are a few late breaking fixes in here that weren't worth trying to
rush into 5.0 as they have been with us for quite a while.
New device support
* ad7476
- add support for TI ADS786X parts that are compatible with this Analog
Devices driver. Good to see some simple devices are so similar.
* Ingenic jz47xx SoC ADCs
- new driver and bindings
* Plantower PMS7003 partical sensor
- new driver and bindings including vendor prefix.
* TI DAC7612
- new driver and bindings for this dual DAC.
New features
* ad7768-1
- Sampling frequency control
* bmi160
- Data ready trigger support, including open-drain dt binding.
Cleanup / minor fixes.
* Analog Device DACs
- Fix some inconsistent licenses. These are only ones where there were
two different license marked in the same file, and hence were previously
unclear.
* ads124s08
- Spelling fix.
* adxl345
- Parameter alignement tidy up.
* bmi160
- SPDX
- correct a note on the types of supported interrupts which was too strict.
- use iio_pollfunc_store_time to grab an earlier timestamp.
- use if (ret) instead of if (ret < 0) to be consistent whilst simplifying
some handling where ret was effectively getting written to 0 even though
it was always already 0.
* exynos_adc
- Fix a null pointer dereference on unbind.
- Fix number of channels on Exynos4x12 devices to be 4 rather than 8.
* lpc32xx-adc
- Move DT bindings doc out of staging. Oops, I missed this one when
moving the driver.
- SPDX.
* npcm-adc
- drop documentation of reset node as going to be done differently.
It's a new driver this cycle so no need to support the previous
binding going forwards.
* sps30
- Fix an issue with a loop timeout test that meant it would never identify
a timeout.
- Mark deliberate switch fall throughs.
* tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (26 commits)
iio: adc: exynos-adc: Use proper number of channels for Exynos4x12
dt-binding: iio: remove rst node from NPCM ADC document
dt-bindings: iio: chemical: pms7003: add device tree support
dt-bindings: add Plantower to the vendor prefixes
iio: chemical: add support for Plantower PMS7003 sensor
iio:chemical:sps30 Supress some switch fallthrough warnings.
iio:adc:lpc32xx use SPDX-License-Identifier
dt-bindings: iio: adc: move lpc32xx-adc out of staging
iio: adc: ads124s08: fix spelling mistake "converions" -> "conversions"
iio: adc: exynos-adc: Fix NULL pointer exception on unbind
iio: chemical: sps30: fix a loop timeout test
iio:accel:adxl345: Change alignment to match paranthesis
iio:dac:dac7612: device tree bindings
iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612
iio: adc: ad7476: Add support for TI ADS786X ADCs
iio: adc: ad7768-1: Add support for setting the sampling frequency
drivers: iio: dac: Fix wrong license for ADI drivers
IIO: add Ingenic JZ47xx ADC driver.
dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
dt-bindings: iio/adc: Add docs for Ingenic JZ47xx SoCs ADC.
...
|
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Rajan Vaja
|
8fd27fb4cf |
dt-bindings: power: Add ZynqMP power domain bindings
Add documentation to describe ZynqMP power domain bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
||
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Linus Walleij
|
e65372124c |
Linux 5.0-rc6
-----BEGIN PGP SIGNATURE----- iQFRBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlxgqNUeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGwsoH+OVXu0NQofwTvVru 8lgF3BSDG2mhf7mxbBBlBizGVy9jnjRNGCFMC+Jq8IwiFLwprja/G27kaDTkpuF1 PHC3yfjKvjTeUP5aNdHlmxv6j1sSJfZl0y46DQal4UeTG/Giq8TFTi+Tbz7Wb/WV yCx4Lr8okAwTuNhnL8ojUCVIpd3c8QsyR9v6nEQ14Mj+MvEbokyTkMJV0bzOrM38 JOB+/X1XY4JPZ6o3MoXrBca3bxbAJzMneq+9CWw1U5eiIG3msg4a+Ua3++RQMDNr 8BP0yCZ6wo32S8uu0PI6HrZaBnLYi5g9Wh7Q7yc0mn1Uh1zWFykA6TtqK90agJeR A6Ktjw== =scY4 -----END PGP SIGNATURE----- Merge tag 'v5.0-rc6' into devel Linux 5.0-rc6 |
||
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Greg Kroah-Hartman
|
5c07488d99 |
Merge 5.0-rc6 into char-misc-next
We need the char-misc fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
||
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Artur Rojek
|
7cf74d515b |
dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
Add device tree bindings for the ADC controller on JZ47xx SoCs, used by the ingenic-adc driver. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> |
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Linus Torvalds
|
46c291e277 |
ARM: SoC fixes for linux-5.0
This is a bit larger than normal, as we had not managed to send out
a pull request before traveling for a week without my signing key.
There are multiple code fixes for older bugs, all of which should
get backported into stable kernels:
- tango: one fix for multiplatform configurations broken on other
platforms when tango is enabled
- arm_scmi: device unregistration fix
- iop32x: fix kernel oops from extraneous __init annotation
- pxa: remove a double kfree
- fsl qbman: close an interrupt clearing race
The rest is the usual collection of smaller fixes for device tree
files, on the renesas, allwinner, meson, omap, davinci, qualcomm
and imx platforms. Some of these are for compile-time warnings,
most are for board specific functionality that fails to work
because of incorrect settings.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcXg9kAAoJEGCrR//JCVInM/UP/1ikwMujrB33oT41l21KFvlw
yrP3ji9Cyr6Ag8WCtgFYDXWw6uNW1eFYov8E4y8UKc16TSWWSvGmmIFM5K3OOtLe
qAJrXTXCTBV2lGiWLIMlYQLAFav7H2CBgMLkRVLek1q7s6rV+hqV5hxfcAs6l2w7
G5Qe8pwuGuZ2qINTs7OdLizd+JAmMeIuPQHGhrZnEupiy+44hHgbrIacXPhwX4Ff
s5MwGON4H3pL1PtVIXlWo5nQwHyF+mkbSzn1RwmKpsQ4wK0vP3LgUURlvc945JNo
zA5C/eCO6xFv7LCvBsuw515eEfI74K/9PDPr7txDz8TePjusPMv5zrYkb+jUhFhm
dELhd8dmh50chXXgHVggRbIjYCpOJeVqm9aeYVvHyKOTNmVohGDc06To/0hFHljw
1kgX4r2hUduTex0wwFks22TfcXr/cQzarXqyV6lRP5K/4IoU8MJCp4QLYXQK7HYY
K9644aSaCTRGfRMbvVXYeykRgilEWT1wG8oREAH+PTWNIb47rqi/ByXitIrLkIWh
Lnefj6bB863E0lPson03sBksylDRaluSeT5lVyjHzJsHwVLt2haqtaI892SZhUy1
/oR60CMkGuRhmwi4ASCCbr20E+sa/LDNUVC6+d/xs9+Bc/54GEKxS11ffthMUoO0
3EpgCZDHno+PMSIRkzPN
=koHS
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"This is a bit larger than normal, as we had not managed to send out a
pull request before traveling for a week without my signing key.
There are multiple code fixes for older bugs, all of which should get
backported into stable kernels:
- tango: one fix for multiplatform configurations broken on other
platforms when tango is enabled
- arm_scmi: device unregistration fix
- iop32x: fix kernel oops from extraneous __init annotation
- pxa: remove a double kfree
- fsl qbman: close an interrupt clearing race
The rest is the usual collection of smaller fixes for device tree
files, on the renesas, allwinner, meson, omap, davinci, qualcomm and
imx platforms.
Some of these are for compile-time warnings, most are for board
specific functionality that fails to work because of incorrect
settings"
* tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
ARM: tango: Improve ARCH_MULTIPLATFORM compatibility
firmware: arm_scmi: provide the mandatory device release callback
ARM: iop32x/n2100: fix PCI IRQ mapping
arm64: dts: add msm8996 compatible to gicv3
ARM: dts: am335x-shc.dts: fix wrong cd pin level
ARM: dts: n900: fix mmc1 card detect gpio polarity
ARM: dts: omap3-gta04: Fix graph_port warning
ARM: pxa: ssp: unneeded to free devm_ allocated data
ARM: dts: r8a7743: Convert to new LVDS DT bindings
soc: fsl: qbman: avoid race in clearing QMan interrupt
arm64: dts: renesas: r8a77965: Enable DMA for SCIF2
arm64: dts: renesas: r8a7796: Enable DMA for SCIF2
arm64: dts: renesas: r8a774a1: Enable DMA for SCIF2
ARM: dts: da850: fix interrupt numbers for clocksource
dt-bindings: imx8mq: Number clocks consecutively
arm64: dts: meson: Fix mmc cd-gpios polarity
ARM: dts: imx6sx: correct backward compatible of gpt
ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property
ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3
ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low
...
|
||
|
Jerome Brunet
|
dbfc54534d |
dt-bindings: reset: meson: add g12a bindings
Add device tree bindings for the reset controller of g12a SoC family. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
||
|
Claudiu Beznea
|
64e21add8c |
pinctrl: at91: add slewrate support for SAM9X60
Add slew rate support for SAM9X60 pin controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
Weiyi Lu
|
cd10b9343d |
dt-bindings: soc: fix typo of MT8173 power dt-bindings
fix incorrect IC name that will affect the MT8183 power dt-bindings Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
Charles Keepax
|
fdc98f070b |
mfd: lochnagar: Add initial binding documentation
Lochnagar is an evaluation and development board for Cirrus Logic Smart CODEC and Amp devices. It allows the connection of most Cirrus Logic devices on mini-cards, as well as allowing connection of various application processor systems to provide a full evaluation platform. This driver supports the board controller chip on the Lochnagar board. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> |
||
|
Weiyi Lu
|
c3424f59a0 |
dt-bindings: clock: add clock for MT2712
Add new clock according to 3rd ECO design change. It's the parent clock of audio clock mux. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Jian Hu
|
25db146aa7 |
dt-bindings: clk: meson: add g12a periph clock controller bindings
Add new clock controller compatible and dt-bindings header for the Everything-Else domain of the g12a SoC Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190201145345.6795-3-jbrunet@baylibre.com |
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|
Kamil Konieczny
|
b80a40c659 |
clk: samsung: exynos5433: Fix name typo in sssx
Fix typo in sssx name, there should be three letters 's'. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
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|
Kamil Konieczny
|
7403e48d7a |
clk: samsung: dt-bindings: Add Exynos5433 IMEM CMU clock IDs
Add DT bindings to describe the IMEM CMU clocks for the SlimSSS (Slim Security SubSystem). Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> [s.nawrocki@samsung.com: edited commit description] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
||
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Lee Jones
|
fa56a62d01 | Merge branches 'ib-mfd-iio-input-5.1', 'ib-mfd-input-watchdog-5.1' and 'ib-mfd-platform-5.1' into ibs-for-mfd-merged | ||
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Linus Torvalds
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5b4746a031 |
Mostly driver fixes, but there's a core framework fix in here too.
- Revert the commits that introduce clk management for the SP
clk on MMP2 SoCs (used for OLPC). Turns out it wasn't a good
idea and there isn't any need to manage this clk, it just causes
more headaches.
- A performance regression that went unnoticed for many years where
we would traverse the entire clk tree looking for a clk by name
when we already have the pointer to said clk that we're looking
for
- A parent linkage fix for the qcom SDM845 clk driver
- An i.MX clk driver rate miscalculation fix where order of operations
were messed up
- One error handling fix from the static checkers
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlxTiOIRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSU+3Q/6Au7lVXMD2V/TTKFoj1f/lMSfqBTAFJWD
MV8obDsBglYFQVOLvMEDPauzK9JJx4diBmWNhAjPalonSsRIXS+UBhtEseknJ79u
G48aGSZbtJYcfc7JYaQbZShyulJ6361waKQrMPMnOvGdXy/9osQYawtq7KdHxDRN
Ac0Fq0O+vXcRuA3F4Xb/HEih6RtuArPA6HYAelU5luiKK9kVkn6DzPyGq6/MsDaf
W83HdWMllSTA8w5Pgq/n9S9pvuiJNikpZA9dRZhr59tdnQBI5RKQq7UrBh0ts/XU
XmDthCAk4omss+QjsrYIdX/8vCGqhSM7zkdY7pZvia/n6Kd/nnF65Wpq22KAqSmw
FXfzncpVxXBuTLy67dD/dxxRiiR9nbvmcxXJiNIaqepyZZojqgwQ6YzuD/oy5DKy
efQ+YuVYbTz8qmpMldhIOcjrmQ7rQ3+dpXJxxSgcfv5lOpMRr+erg6L+d2BnS064
/EzLwqW6kpuEtnDlc3Pue29u/REbawQ2k37LXcEUuEyVpctiw4y+3+pcKZAt9Uh3
eq3UoDl+aSFuyBD/UNgB3JFGcHM4ipbCj6PcQ4FHban0b+rMxCM7spMunc1Ec2jZ
cf/BeN0YE0Y1kYy5ArfSp1B1iuNLvfGnwV5dUKKoXDD5Fkryt9Nz8dUaYfqEWrGN
uvTJXtU1E/Q=
=G4M9
-----END PGP SIGNATURE-----
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd:
"Mostly driver fixes, but there's a core framework fix in here too:
- Revert the commits that introduce clk management for the SP clk on
MMP2 SoCs (used for OLPC). Turns out it wasn't a good idea and
there isn't any need to manage this clk, it just causes more
headaches.
- A performance regression that went unnoticed for many years where
we would traverse the entire clk tree looking for a clk by name
when we already have the pointer to said clk that we're looking for
- A parent linkage fix for the qcom SDM845 clk driver
- An i.MX clk driver rate miscalculation fix where order of
operations were messed up
- One error handling fix from the static checkers"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: qcom: gcc: Use active only source for CPUSS clocks
clk: ti: Fix error handling in ti_clk_parse_divider_data()
clk: imx: Fix fractional clock set rate computation
clk: Remove global clk traversal on fetch parent index
Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
Revert "clk: mmp2: add SP clock"
Revert "Input: olpc_apsp - enable the SP clock"
|
||
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Arnd Bergmann
|
3673a91c07 |
Merge tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.0, 2nd round: It contains a single fix for i.MX8MQ clock numbers, removing the duplicate use of 232 and numbering the clocks consecutively. * tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: imx8mq: Number clocks consecutively Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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Nava kishore Manne
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3f1b66be4a |
dt-bindings: reset: Add bindings for ZynqMP reset driver
Add documentation to describe Xilinx ZynqMP reset driver bindings. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
||
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Andrey Smirnov
|
4cab5bf616 |
dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
The driver now supports i.MX8MQ, so update bindings accordingly. Cc: p.zabel@pengutronix.de Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: cphealy@gmail.com Cc: l.stach@pengutronix.de Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
||
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Greg Kroah-Hartman
|
fdddcfd9c9 |
Merge 5.0-rc4 into char-misc-next
We need the char-misc fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Lubomir Rintel
|
401fbb34f5 |
Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
It seems that the kernel has no business managing this clock: once the SP
clock is disabled, it's not sufficient to just enable it in order to bring
the SP core back up.
Pretty sure nothing ever used this and it's safe to remove.
This reverts commit
|
||
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Rajendra Nayak
|
c6e6eff4d4 |
dt-bindings: power: Add qcom rpm power domain driver bindings
Add DT bindings to describe the rpm/rpmh power domains found on Qualcomm Technologies, Inc. SoCs. These power domains communicate a performance state to RPM/RPMh, which then translates it into corresponding voltage on a PMIC rail. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
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Felix Fietkau
|
6810ed320e
|
MIPS: ath79: export switch MDIO reference clock
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz clock. If that feature is not used, it defaults to the main reference clock, like on all other SoC. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: John Crispin <john@phrozen.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org |
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Felix Fietkau
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9b56e0d0cc
|
MIPS: ath79: add helpers for setting clocks and expose the ref clock
Preparation for transitioning the legacy clock setup code over to OF. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: John Crispin <john@phrozen.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org |
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David Dai
|
b5d2f74107 |
interconnect: qcom: Add sdm845 interconnect provider driver
Introduce Qualcomm SDM845 specific provider driver using the interconnect framework. Signed-off-by: David Dai <daidavid1@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Fabrizio Castro
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9d034e151b |
clk: renesas: r8a774a1: Add missing CANFD clock
This patch adds the missing CANFD clock to the r8a774a1 specific clock driver. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
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Fabrizio Castro
|
2a6efbc6da |
clk: renesas: r8a774c0: Add missing CANFD clock
This patch adds the missing CANFD clock to the r8a774c0 specific clock driver. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Ulrich Hecht
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adbb78e110 |
ARM: dts: r8a7778: Add HSCIF0/1 support
Add HSCIF0/1 clocks and device nodes, based on Rev. 1.00 of the R-Car M1A datasheet. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [geert: Squashed two patches] [geert: Correct HSCIF1 module clock index] [geert: Correct reg properties for non-LPAE] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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Jerome Brunet
|
3705add0b7 |
dt-bindings: reset: meson-axg: fix SPDX license id
As reported, the SPDX license id is not placed correctly and the variant
of the BSD License used should be specified.
Fixes:
|
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Pascal PAILLET-LME
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3eafbd3a77 |
dt-bindings: mfd: Document STPMIC1
STPMIC1 is a PMIC from STMicroelectronics. The STPMIC1 integrates 10 regulators, 3 power switches, a watchdog and an input for a power on key. Signed-off-by: Pascal Paillet <p.paillet@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> |
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Guido Günther
|
c5b11ee9f1 |
dt-bindings: imx8mq: Number clocks consecutively
This fixes a duplicate use of 232 and numbers the clocks without holes.
Fixes:
|
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|
Jeffrey Hugo
|
6131dc8121 |
clk: qcom: smd: Add support for MSM8998 rpm clocks
Add rpm smd clocks, PMIC and bus clocks which are required on MSM8998 for clients to vote on. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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|
Eric Anholt
|
670c672608 |
soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
This provides a free software alternative to raspberrypi-power.c's firmware calls to manage power domains. It also exposes a reset line, where previously the vc4 driver had to try to force power off the domain in order to trigger a reset. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> |
||
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Jerome Brunet
|
83d0ea237b |
dt-bindings: clk: meson: add ao slow clock path ids
Add the CLKIDs for the slow clock generation path Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181221160239.26265-2-jbrunet@baylibre.com |
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Linus Torvalds
|
645ff1e8e7 |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input updates from Dmitry Torokhov: "A tiny pull request this merge window unfortunately, should get more material in for the next release: - new driver for Raspberry Pi's touchscreen (firmware interface) - miscellaneous input driver fixes" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: elan_i2c - add ACPI ID for touchpad in ASUS Aspire F5-573G Input: atmel_mxt_ts - don't try to free unallocated kernel memory Input: drv2667 - fix indentation issues Input: touchscreen - fix coding style issue Input: add official Raspberry Pi's touchscreen driver Input: nomadik-ske-keypad - fix a loop timeout test Input: rotary-encoder - don't log EPROBE_DEFER to kernel log Input: olpc_apsp - remove set but not used variable 'np' Input: olpc_apsp - enable the SP clock Input: olpc_apsp - check FIFO status on open(), not probe() Input: olpc_apsp - drop CONFIG_OLPC dependency clk: mmp2: add SP clock dt-bindings: marvell,mmp2: Add clock id for the SP clock Input: ad7879 - drop platform data support |
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Linus Torvalds
|
0f2107daec |
One more patch to generalize a set of DT binding defines now before -rc1
comes out. This way the SoC DTS files can use the proper defines from a stable tag. -----BEGIN PGP SIGNATURE----- iQJFBAABCgAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlwmdjIRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSX8Iw//RZ3fJWCV5HdYO938SRl8mdn+kKc+8bfO Ng6abLS7hV79oB8G5sapYxS5BaoHw9O59NM2wldu+9vtM1s3cPlvPXJN60NQMHrA 9Bv8r5xOARKzcyou+0vCtWOVL0xt92KKU4fuPCgdP62OkeNppUeZqpoeVILZyOsz txfNX1CN6WdxPHWG4mxted8i1sX873EAdLsE+n8zEchfPk0ADZ/TEfKDlqHV9wAB XgFzk8W/ZyKg2zlNCwWIUBIk9IlqRUTnPArA9bzAgxMO6x0DT7W5LSgEHN0nk2kl uhLDjxcXUtQKic14hzlnBHDN+aSaCtrdUsoxxlgoyyq+cDh8eC9keh4DsBu32nBk ETQ00DteZWaPSMuqphQ6rOye3X/ff42cQREZCxo5anuUt2ekgwdCiS64XU/id+tk 1YdTGgiwiZTBZCTlvWqvoOpU2OannD7c2dEML9X7evM0H35f2KjNFODtWEDedDSg BFyP62gFs7063Pdz02wUdS37m6iC2WDbZioSUw+NJjSnnX4N4Uz7zI/Xh2AhwLwT 9bECXexsg2qUTSFbEvLsTTasE551bSqOJ5VzJuDwTL6OdmeLYEv+H+ZY5z/8lYkF gLx2rfo63P/2YljkVjKFxValu3jDUbt26ePEa0J9N4WK17CS28L6BXnC7TdEqNhP +Hs380jUFXw= =mZr0 -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull more clk updates from Stephen Boyd: "One more patch to generalize a set of DT binding defines now before -rc1 comes out. This way the SoC DTS files can use the proper defines from a stable tag" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: imx8qxp: make the name of clock ID generic |
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Linus Torvalds
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35ddb06a46 |
- Introduce device-managed registration devm_mbox_controller_un/register and convert drivers to use it
- Introduce flush api to support clients that must busy-wait in atomic context - Support multiple controllers per device - Hi3660: a bugfix and constify ops structure - TI-MsgMgr: off by one bugfix. - BCM: switch to spdx license - Tegra-HSP: support for shared mailboxes and suspend/resume. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAlwsSx4ACgkQf9lkf8eY P5V7VBAAkYp05XY1IsH5x1nSqhFb+cco0pv0kwO3Sr+IhYgC3i5aD2JMtIGu3N34 8lFrNXbrodDFsY37dAd8YDP4zoJ6LGmB9Z7brjuce/Mlgj63Z7EV5R+PW6UC/thP ul9RVM3d0YoRfutHz0p8+0vgB2d90Npng6f1XhNBwniWNtzFm1QoDl/rr5QI/126 tdgpuC/79fl1ymuzrBxMx7Yn5LG4P5B834gip16qiKlhaawL98nmWoF0EyIFwSMN Oo4yxpiMPsLC1Jt9EygXOHyybt1WSgCGlKV0fk6iiugR2YmDfVaiASq8e1gBN9W8 8ILFxEFkfbR4uat3fDErymGmdQrt0pFeSBnwej30JS/GTASz5i0XAIfpVYL113t9 WzsMR8YZGW3hk1Z+ZXJhecszYhDg4GAfew2kADqmdBeG6JX8eBn0wYFRFYjYPsXR idrsWkuzYmNXUaFg10Un3OgVwmpnhB7QmiKXTeqpWkcYlrI8MiljwAK+wXh2/23S vxM+hdbKLQ++0m6iMz/9HE3b5LJlJtXwz5UDagWvgr6t0UTxviPK7xpjvgvRlUny OYd2UuC0X3dHWWflST6eWR4hWqc96KHLsTAn3X9nm+S41ijZHU+MS3B/F1Z5R1LS tU3V0JK5Q+61Va5brSr7/XO3TEy+5n1jWl92SGnayFuqnVaXZyQ= =b4QB -----END PGP SIGNATURE----- Merge tag 'mailbox-v4.21' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - Introduce device-managed registration devm_mbox_controller_un/register and convert drivers to use it - Introduce flush api to support clients that must busy-wait in atomic context - Support multiple controllers per device - Hi3660: a bugfix and constify ops structure - TI-MsgMgr: off by one bugfix. - BCM: switch to spdx license - Tegra-HSP: support for shared mailboxes and suspend/resume. * tag 'mailbox-v4.21' of git://git.linaro.org/landing-teams/working/fujitsu/integration: (30 commits) mailbox: tegra-hsp: Use device-managed registration API mailbox: tegra-hsp: use devm_kstrdup_const() mailbox: tegra-hsp: Add suspend/resume support mailbox: tegra-hsp: Add support for shared mailboxes dt-bindings: tegra186-hsp: Add shared mailboxes mailbox: Allow multiple controllers per device mailbox: Support blocking transfers in atomic context mailbox: ti-msgmgr: Use device-managed registration API mailbox: stm32-ipcc: Use device-managed registration API mailbox: rockchip: Use device-managed registration API mailbox: qcom-apcs: Use device-managed registration API mailbox: platform-mhu: Use device-managed registration API mailbox: omap: Use device-managed registration API mailbox: mtk-cmdq: Remove needless devm_kfree() calls mailbox: mtk-cmdq: Use device-managed registration API mailbox: xgene-slimpro: Use device-managed registration API mailbox: sti: Use device-managed registration API mailbox: altera: Use device-managed registration API mailbox: imx: Use device-managed registration API mailbox: hi6220: Use device-managed registration API ... |
||
|
Linus Torvalds
|
78e8696c23 |
dmaengine-4.21-rc1
dmaengine updates for v4.21-rc1 - New driver for UniPhier MIO DMA controller - Remove R-Mobile APE6 support - Sprd driver updates and support for cyclic link-list - Remove dma_slave_config direction usage from rest of drivers - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcKipaAAoJEHwUBw8lI4NH87kQAJF5tSQzvh4alAwntJ+rNZfw bgiUW29f7PxEzEGDsTBuFsw9zPhGxPnwtXzLm2iSDBGqkEcwKc+yretuX3Pgkce+ IpPkCBGcfXptSJxFz4XxBi3HCkZ+jlhy33pH+hkW/tA4SIcA+VJjfQLePiY3sVMO 1QUFDaL9NEyEfgJTmUShaPvCiz+3OHjY/3LAMlbLqQer4C9zC3iyvZIf9lvPQQnt qJaFuEiqlhw6eOAGw+2frMYDEV57QEiRgghBZyFm5RxG19XCcPkVV9id22rz5TQb +mQXhyaLvDiztWf71dFlXW2nW8mjewcjNU4h5g3RTyLA7fpLNcpMyZY2WizIADVS x6a7/HSrDjD4CN6pGDmRi8vvqkTAEDCsrfUM6K43rAsoZzU5elVJwOv4m8WB3CCF pRlUwFi6ENt8Ov8CWgCCaY0/Bzj1FgjN3BY87amBsI9wF4fkpCPNdWw34a6lg1Kf SzyPty8Z+i+6rtKps7Mh9VOZI2tryPJzyAWrcOCDWQoiR/RWzgC3y6SuwCdiyaDf 8hFV4xnB0oVJ8vsTjF1AgxVwEsqQ7TVTIsLAns6jEnTC5FAnOLd0iwh56a+rw+lR 7e1iuQYllZ1rdMi+r5gWG4OCsZehmZgCqc250om51tzA1SDVDQ3bbx8clxZeha80 AKr5MVrIVp7riYFEICvp =+pTt -----END PGP SIGNATURE----- Merge tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine updates from Vinod Koul: "This includes a new driver, removes R-Mobile APE6 as it is no longer used, sprd cyclic dma support, last batch of dma_slave_config direction removal and random updates to bunch of drivers. Summary: - New driver for UniPhier MIO DMA controller - Remove R-Mobile APE6 support - Sprd driver updates and support for cyclic link-list - Remove dma_slave_config direction usage from rest of drivers - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers" * tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (48 commits) dmaengine: qcom_hidma: convert to DEFINE_SHOW_ATTRIBUTE dmaengine: pxa: remove DBGFS_FUNC_DECL() dmaengine: mic_x100_dma: convert to DEFINE_SHOW_ATTRIBUTE dmaengine: amba-pl08x: convert to DEFINE_SHOW_ATTRIBUTE dmaengine: Documentation: Add documentation for multi chan testing dmaengine: dmatest: Add transfer_size parameter dmaengine: dmatest: Add alignment parameter dmaengine: dmatest: Use fixed point div to calculate iops dmaengine: dmatest: Add support for multi channel testing dmaengine: rcar-dmac: Document R8A774C0 bindings dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0 dmaengine: zynqmp_dma: replace spin_lock_bh with spin_lock_irqsave dmaengine: sprd: Add me as one of the module authors dmaengine: sprd: Support DMA 2-stage transfer mode dmaengine: sprd: Support DMA link-list cyclic callback dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channel dmaengine: sprd: Fix the last link-list configuration dmaengine: sprd: Get transfer residue depending on the transfer direction dmaengine: sprd: Remove direction usage from struct dma_slave_config dmaengine: dmatest: fix a small memory leak in dmatest_func() ... |
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|
Linus Torvalds
|
c9bef4a651 |
Pin control bulk changes for the v4.21 kernel cycle:
No core changes this time.
New drivers:
- NXP (ex Freescale) i.MX 8 QXP SoC driver.
- Mediatek MT6797 SoC driver.
- Mediatek MT7629 SoC driver.
- Actions Semiconductor S700 SoC driver.
- Renesas RZ/A2 SoC driver.
- Allwinner sunxi suniv F1C100 SoC driver.
- Qualcomm PMS405 PMIC driver.
- Microsemi Ocelot Jaguar2 SoC driver.
Improvements:
- Some RT improvements (using raw spinlocks where appropriate).
- A lot of new pin sets on the Renesas PFC pin controllers.
- GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
chips, and Xway.
- Major modernization of the Intel pin control drivers.
- STM32 pin control driver will now synchronize usage of pins
with another CPU using a hardware spinlock.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJcKN2qAAoJEEEQszewGV1zK5wP/2QbrvH8eW+mF9YD+1fr11Sp
oCe52C7n1YMKt5R6vSFyLtqPYDehCP9gTS0Zlbz4HKyTe2E9OIuigrmg+1uQwxWp
GSvxmMx9QFlNqUcWOvc90DYDfOh5ZPVIsP16k3DIlodVsQlSu4O4KF0pJseRyuSh
PVn/MjPrGtyTB2TJzO/Oj3sadHhVRzTb6Zlk7uk5hak6ys5AYHetBHhuxAcicFv4
OGwEOvaV5DiTO5wbbyNSmkF5NI+ApV2o4DRRNTXC+mJJSPCpQxFskLTmHu9wYKmE
/p6Gp9dtxSS3QLA4NXsY+IrFJsU1q261gEvIsFa2upW5j7T8bLzRAzoFG+/dil6t
k5GDnx8t7qSPXLme8/nJlX40O2CJs4sXKwCQY4vjsySW31ryqBMm4JNSQKTxe9Ma
1RrZ7UR+P6IwupUsEYZkcneuu+oGMNYpbDG48R2utgECY4KN17wUjjZHkYHZNiDi
Yk/CMkOXXuZnAZGfmaj8R9yjkjFZMZAqOYDJcruMzLFjAkw6fCmFipZLoSIN4+sJ
u4RERrbsF+e5PY4BOfxYw5NIzTl60AQquttj//RJyLQDsQ/HMU9jaovW6E3JQytO
NgU9RtEwrtK50ef5OYS4EtTlNi2B3arU83noI/oX3R52SoAIdMTHtVMgyECm3dMg
XeLn9x2Ffy7a4PRruLoy
=cm6m
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"We have no core changes but lots of incremental development in drivers
all over the place: Renesas, NXP, Mediatek and Actions Semiconductor
keep churning out new SoCs.
I have some subtree maintainers for Renesas and Intel helping out to
keep down the load, it's been working smoothly (Samsung also have a
subtree but it was not used this cycle.)
New drivers:
- NXP (ex Freescale) i.MX 8 QXP SoC driver.
- Mediatek MT6797 SoC driver.
- Mediatek MT7629 SoC driver.
- Actions Semiconductor S700 SoC driver.
- Renesas RZ/A2 SoC driver.
- Allwinner sunxi suniv F1C100 SoC driver.
- Qualcomm PMS405 PMIC driver.
- Microsemi Ocelot Jaguar2 SoC driver.
Improvements:
- Some RT improvements (using raw spinlocks where appropriate).
- A lot of new pin sets on the Renesas PFC pin controllers.
- GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
chips, and Xway.
- Major modernization of the Intel pin control drivers.
- STM32 pin control driver will now synchronize usage of pins with
another CPU using a hardware spinlock"
* tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits)
dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ
pinctrl: imx-scu: Depend on IMX_SCU
pinctrl: ocelot: Add dependency on HAS_IOMEM
pinctrl: ocelot: add MSCC Jaguar2 support
pinctrl: bcm: ns: support updated DT binding as syscon subnode
dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
MAINTAINERS: merge at91 pinctrl entries
pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP
pinctrl: uniphier: constify uniphier_pinctrl_socdata
pinctrl: mediatek: improve Kconfig dependencies
pinctrl: msm: mark PM functions as __maybe_unused
dt-bindings: pinctrl: sunxi: Add supply properties
pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD
pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD
pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
...
|
||
|
Linus Torvalds
|
b7badd1d7a |
ARM: Device-tree updates
As usual, this is where the bulk of our changes end up landing each merge window. The individual updates are too many to enumerate, many many platforms have seen additions of device descriptions such that they are functionally more complete (in fact, this is often the bulk of updates we see). Instead I've mostly focused on highlighting the new platforms below as they are introduced. Sometimes the introduction is of mostly a fragment, that later gets filled in on later releases, and in some cases it's near-complete platform support. The latter is more common for derivative platforms that already has similar support in-tree. Two SoCs are slight outliers from the usual range of additions. Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping in the Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at infrastructure/networking. TI updates stick out in the diff stats too, in particular because they have moved the description of their L4 on-chip interconnect to devicetree, which opens up for removal of even more of their platform-specific 'hwmod' description tables over the next few releases. SoCs: - Qualcomm QCS404 (4x Cortex-A53) - Allwinner T3 (rebranded R40) and f1c100s (armv5) - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4) - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72) New platforms: - Rockchip: Gru Scarlet (RK3188 Tablet) - Amlogic: Phicomm N1 (S905D), Libretech S805-AC - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708) - Qualcomm: QCS404 base platform and EVB - Qualcomm: Remove of Arrow SD600 - PXA: First PXA3xx DT board: Raumfeld - Aspeed: Facebook Backpack-CMM BMC - Renesas iWave G20D-Q7 (RZ/G1N) - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s) - Allwinner Emlid Neutis N5, Mapleboard MP130 - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE) - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva - VF610: Liebherr's BK4 device, ZII SCU4 AIB board - i.MX7D PICO Hobbit baseboard - i.MX7ULP EVK board - NXP LX2160AQDS and LX2160ARDB boards Other: - Coresight binding updates across the board - CPU cooling maps updates across the board -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqgVYPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3ybAQAKAhd7XI5oY/wgdZZmxwcX+p7sU6LXeIlpWU XsPN1c14KU0siQv/znVA5OpF+fgn9eRqfWnMoDPlvdScTq07FM2NBmOJfVJYDPJa uvsll5m+84FCYanIR//YybS0tCM0b0BHoHo2DoyIxWeAwmw7BBVslddBdNg6R7hG S9rU9rUeqfCj7HbcPLqVn0DecMtEe7R8zmDtG1CSMqrhncifmoV4gtUnbYAg0GGT cSvj/zT8A1j0oJcU2Upl/Fr+7WJ7XB9pnku91nUOSXLv5VkyctLGomKq5F7O2/Xs 2DhpH2yKwQt7S7TDiDd0jy64Of6+Xup35wEHevCeKrzGXcVRqqHwCkanLz9FdjVt yg4UrI/P1nY7h4ifZPplgigv+kA+IjRGiMrTRIEgSE5YK9U5AYkgembTWksRDikd 5EpeJcMj2tBv4SDellNNtzh6GGTPBf3GJw3P9uRuxnQY/T31N2eX0XGeRikL+Lzf 9nbQdJealmql3rCa5oFEJwSxrSaAv/ub7/294kPdEmXj8+3qUuH3hZAZOI9LSXGW GCuxsgccB2GF1M48x48/QpHgxb93okyXmndONZnU8uN8ba0zS4b8QLwvIY5rqv5Z kqD1VPBQf9kGVyzDyABRjFmGCDJcoOJf4QrzvNk9+xo8fXVk1xNtxu4MUsHvc2lS cU2RYWm/ =sFVi -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM Device-tree updates from Olof Johansson: "As usual, this is where the bulk of our changes end up landing each merge window. The individual updates are too many to enumerate, many many platforms have seen additions of device descriptions such that they are functionally more complete (in fact, this is often the bulk of updates we see). Instead I've mostly focused on highlighting the new platforms below as they are introduced. Sometimes the introduction is of mostly a fragment, that later gets filled in on later releases, and in some cases it's near-complete platform support. The latter is more common for derivative platforms that already has similar support in-tree. Two SoCs are slight outliers from the usual range of additions. Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping in the Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at infrastructure/networking. TI updates stick out in the diff stats too, in particular because they have moved the description of their L4 on-chip interconnect to devicetree, which opens up for removal of even more of their platform-specific 'hwmod' description tables over the next few releases. SoCs: - Qualcomm QCS404 (4x Cortex-A53) - Allwinner T3 (rebranded R40) and f1c100s (armv5) - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4) - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72) New platforms: - Rockchip: Gru Scarlet (RK3188 Tablet) - Amlogic: Phicomm N1 (S905D), Libretech S805-AC - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708) - Qualcomm: QCS404 base platform and EVB - Qualcomm: Remove of Arrow SD600 - PXA: First PXA3xx DT board: Raumfeld - Aspeed: Facebook Backpack-CMM BMC - Renesas iWave G20D-Q7 (RZ/G1N) - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s) - Allwinner Emlid Neutis N5, Mapleboard MP130 - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE) - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva - VF610: Liebherr's BK4 device, ZII SCU4 AIB board - i.MX7D PICO Hobbit baseboard - i.MX7ULP EVK board - NXP LX2160AQDS and LX2160ARDB boards Other: - Coresight binding updates across the board - CPU cooling maps updates across the board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits) ARM: dts: suniv: Fix improper bindings include patch ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node ARM: dts: suniv: Fix improper bindings include patch arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller arm64: dts: Remove unused properties from FSL QSPI driver nodes ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes ARM: dts: Remove unused properties from FSL QSPI driver nodes arm64: dts: ti: k3-am654: Enable main domain McSPI0 arm64: dts: ti: k3-am654: Add McSPI DT nodes arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM arm64: dts: ti: k3-am65-main: Add ECAP PWM node arm64: dts: ti: k3-am654-base-board: Add I2C nodes arm64: dts: ti: am654-base-board: Add pinmux for main uart0 arm64: dts: ti: k3-am65: Add pinctrl regions dt-bindings: pinctrl: k3: Introduce pinmux definitions ARM: dts: exynos: Specify I2S assigned clocks in proper node ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2 ... |
||
|
Linus Torvalds
|
d36377c6eb |
ARM: SoC driver updates
Misc driver updates for platforms, many of them power related.
- Rockchip adds power domain support for rk3066 and rk3188
- Amlogic adds a power measurement driver
- Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1)
- Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
- Broadcom fixes suspend/resume with Thumb2 kernels, and improves
stability of a handful of firmware/platform interfaces
- PXA completes their conversion to dmaengine framework
- Renesas does a bunch of PM cleanups across many platforms
- Tegra adds support for suspend/resume on T186/T194, which includes
some driver cleanups and addition of wake events
- Tegra also adds a driver for memory controller (EMC) on Tegra2
- i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC
- Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
+ misc cleanups across several platforms
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqd4APHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3HXoP/icWJTGrbf9R6T7r0RWB3xeV8ouTPMM8YM5C
6wD4LkkjgZ16Hz/ellJ0Oug77LdnJ/ZI7jH2u0IcKRXr4sL94hEo11jAJLLtCHpt
rGiItMuEDMhNFcAK/yREI6FtRqjNZhsTuR+gkcjzMnGLCaTA1+RwQNdugH0hh0fF
z8C6tjN+fRIeS0wInBzR/402GcgRU0DIJrr0kmklS0u6tc2QW24ffv8ymvMiVO46
l8VemmdxVZsBU2iehraPy6mSXsyTm04dNTuHnrIw3nE3kTJF7jMvpqI/euU1eZl6
6EzrrCym8nC66IlqhHMBB427PK8sRqJTqwqSXO6e90AqiK4H2bMovXKiob/Psq+e
yWqPOrAr8YBLqTgauvCzVm/xneT5rZM4N0BYhOk172Uk52qenNWDnqHj41A4CMSM
/id3L1cHs5nf2qwuMncXvLX+Y2vO2n6cMmF8cDRLu592OBZRcVepUM0xoaSdZScv
LJsP3jH3RRcY3L2rf7bY2Mitp48bDgZMZdw/viSHsFS+SVr225uNFALFDQ9kNEoZ
2d9i9IvC7xOMhdVAX03U7DuRcpKXBPcv+arA57PiVvR4M1HeU7VvD4ayP5loVX2J
GoDIKiPQitAsOKzyPyZ5Jw04lxio3xZbrbmmVzEH8uKWIV5omdiMnSrFsEfduRCT
rU+Mqe2j
=yEX2
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Misc driver updates for platforms, many of them power related.
- Rockchip adds power domain support for rk3066 and rk3188
- Amlogic adds a power measurement driver
- Allwinner adds SRAM support for three platforms (F1C100, H5, A64
C1)
- Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
- Broadcom fixes suspend/resume with Thumb2 kernels, and improves
stability of a handful of firmware/platform interfaces
- PXA completes their conversion to dmaengine framework
- Renesas does a bunch of PM cleanups across many platforms
- Tegra adds support for suspend/resume on T186/T194, which includes
some driver cleanups and addition of wake events
- Tegra also adds a driver for memory controller (EMC) on Tegra2
- i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
GPC
- Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
and misc cleanups across several platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
ARM: at91: add support in soc driver for new SAM9X60
ARM: at91: add support in soc driver for LPDDR2 SiP
memory: omap-gpmc: Use of_node_name_eq for node name comparisons
bus: ti-sysc: Check for no-reset and no-idle flags at the child level
ARM: OMAP2+: Check also the first dts child for hwmod flags
soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
soc: imx: gpc: Increase GPC_CLK_MAX to 7
soc: renesas: rcar-sysc: Fix power domain control after system resume
soc: renesas: rcar-sysc: Merge PM Domain registration and linking
soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
dt-bindings: sram: Add Allwinner suniv F1C100s
soc: sunxi: sram: Add support for the H5 SoC system control
soc: sunxi: sram: Enable EMAC clock access for H3 variant
soc: imx: gpcv2: add support for i.MX8MQ SoC
soc: imx: gpcv2: move register access table to domain data
soc: imx: gpcv2: prefix i.MX7 specific defines
dmaengine: pxa: make the filter function internal
...
|
||
|
Linus Torvalds
|
24dc83635f |
This is the bulk of GPIO changes for the v4.21 kernel series:
Core changes:
- Some core changes are already in outside of this pull
request as they came through the regulator tree, most
notably devm_gpiod_unhinge() that removes devres refcount
management from a GPIO descriptor. This is needed in
subsystems such as regulators where the regulator core
need to take over the reference counting and lifecycle
management for a GPIO descriptor.
- We dropped devm_gpiochip_remove() and devm_gpio_chip_match()
as nothing needs it. We can bring it back if need be.
- Add a global TODO so people see where we are going. This
helps setting the direction now that we are two GPIO
maintainers.
- Handle the MMC CD/WP properties in the device tree core.
(The bulk of patches activating this code is already
merged through the MMC/SD tree.)
- Augment gpiochip_request_own_desc() to pass a flag so
we as gpiochips can request lines as active low or open
drain etc even from ourselves.
New drivers:
- New driver for Cadence GPIO blocks.
- New driver for Atmel SAMA5D2 PIOBU GPIO lines.
Driver improvements:
- A major refactoring of the PCA953x driver - this driver has
been around for ages, and is now modernized to reduce code
duplication that has stacked up and is using regmap to read
write and cache registers.
- Intel drivers are now maintained in a separate tree and
start with a round of cleanups and unifications.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJcJJcmAAoJEEEQszewGV1zdCoQAMSLPh+4QdYLFS3ZmnsPvZkg
Zkz94RVT+uLLmHpR8XBl0wl4mmYCiwB50IwsXwlvJGceSXjCn6hLg9BZBP5hFMCb
yFk3fgXQSh7TOnpjgbCWSssCjpejQ0cOb/2nWHz5s/fbYKYlh3VXckW9hhW+R+b3
6+Mno1SzmBkpVVQ21ISlZeLoNDynkCW6DfjiKMuHAyxzxa0oZ9Qid+tnVDnQM4rD
rCnvYLuvxlXw97W+LI7AU9KoCITdO+2M/0dtGVEEYKfHseRReSy2Oo3nlqCglygX
cNkBe9RYU1CJdas1P/c18wjDAqWp/pbugzHDkYF5Y3tBtB2rQSftjtnQngiVMXMt
De7ejPvL7/OLECvI2WUD6y9NAduw/HE4FO8BBdn0gP/a9svJpVZ993yPd3F9n7EZ
ZIBpycDZVtkcE7dwQgek17bFILRY5nBBMB9oCLL2wk48qdmjpcAbxVfGSsYOe6wO
+cZRZuj/eR3i9gHRugfFx7Evoc7l4erihTpES/YAy3De1s3uV8KjT4zE7Jh+M9LW
GM797BcXJJeb5toC7HZ/G2UAVMyWEhY0n7PGG616CS8IrzmzIZpJOL9kUVOWPb0F
9CPt6qhVbUl9rxp1H/Z3TxvYqIw6icn/z5YewZxLU1zaBlpE3jc7PhZb5hOGnFUf
/DWwe4n99JsjHTrGx1ra
=05LW
-----END PGP SIGNATURE-----
Merge tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.21 kernel series.
Core changes:
- Some core changes are already in outside of this pull request as
they came through the regulator tree, most notably
devm_gpiod_unhinge() that removes devres refcount management from a
GPIO descriptor. This is needed in subsystems such as regulators
where the regulator core need to take over the reference counting
and lifecycle management for a GPIO descriptor.
- We dropped devm_gpiochip_remove() and devm_gpio_chip_match() as
nothing needs it. We can bring it back if need be.
- Add a global TODO so people see where we are going. This helps
setting the direction now that we are two GPIO maintainers.
- Handle the MMC CD/WP properties in the device tree core. (The bulk
of patches activating this code is already merged through the
MMC/SD tree.)
- Augment gpiochip_request_own_desc() to pass a flag so we as
gpiochips can request lines as active low or open drain etc even
from ourselves.
New drivers:
- New driver for Cadence GPIO blocks.
- New driver for Atmel SAMA5D2 PIOBU GPIO lines.
Driver improvements:
- A major refactoring of the PCA953x driver - this driver has been
around for ages, and is now modernized to reduce code duplication
that has stacked up and is using regmap to read write and cache
registers.
- Intel drivers are now maintained in a separate tree and start with
a round of cleanups and unifications"
* tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (99 commits)
gpio: sama5d2-piobu: Depend on OF_GPIO
gpio: Add Cadence GPIO driver
dt-bindings: gpio: Add bindings for Cadence GPIO
gpiolib-acpi: remove unused variable 'err', cleans up build warning
gpio: mxs: read pin level directly instead of using .get
gpio: aspeed: remove duplicated statement
gpio: add driver for SAMA5D2 PIOBU pins
dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller
gpio/mmc/of: Respect polarity in the device tree
dt-bindings: gpio: rcar: Add r8a774c0 (RZ/G2E) support
memory: omap-gpmc: Get the header of the enum
ARM: omap1: Fix new user of gpiochip_request_own_desc()
gpio: pca953x: Add regmap dependency for PCA953x driver
gpio: raspberrypi-exp: decrease refcount on firmware dt node
gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB
gpio: pca953x: Restore registers after suspend/resume cycle
gpio: pca953x: Zap single use of pca953x_read_single()
gpio: pca953x: Zap ad-hoc reg_output cache
gpio: pca953x: Zap ad-hoc reg_direction cache
gpio: pca953x: Perform basic regmap conversion
...
|
||
|
Aisheng Dong
|
08972760d3 |
clk: imx8qxp: make the name of clock ID generic
SCU clock can be used in a similar way by IMX8QXP and IMX8QM SoCs. Let's make the name of clock ID generic to allow other SoCs to reuse the common part. This patch only changes the clock id name and file name, so no functional change. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: devicetree@vger.kernel.org Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Aisheng Dong
|
88cc9fc41c |
dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
Update binding doc to support imx8qm pinctrl. Cc: Rob Herring <robh+dt@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
Linus Torvalds
|
1fbb2dc6f0 |
This round is dominated by NXP's i.MX clk drivers. We gained support for two or
three i.MX SoCs in here and that mostly means a lot of driver code and data.
Beyond that platform, there are some new Mediatek, Amlogic, and Qualcomm clk
drivers added in here, and then we get to the long tail of driver updates and
non-critical fixes all around, including code for vendors such as Renesas,
Rockchip, Nvidia, and Allwinner. Overall, the driver updates look normal.
Beyond the usual driver updates we have an update to make registering OF based
clk providers a little simpler when they're devices created as a child of a
device backed by a node in DT. Drivers don't have to jump through hoops to
unregister the provider upon driver removal anymore because the API does the
right thing and uses the parent device DT node.
Core:
- Make devm_of_clk_add_hw_provider() use parent dt node if necessary
- Various SPDX taggings
- Mark clk_ops const when possible
New Drivers:
- NXP i.MX7ULP SoC clock support
- NXP i.MX8QXP SoC clock support
- NXP i.MX8MQ SoC clock support
- NXP QorIQ T1023 SoC support
- Qualcomm SDM845 audio subsystem clks
- Qualcomm SDM845 GPU clck controllers
- Qualcomm QCS404 RPM clk support
- Mediatek MT7629 SoC clk controllers
- Allwinner F1c100s SoC clocks
- Allwinner H6 display engine clocks
- Amlogic GX video clocks
- Support for Amlogic meson8b CPU frequency scaling
- Amlogic Meson8b CPU post-divider clocks
Updates:
- Proper suspend/resume on VersaClock5
- Shrink code some with DEFINE_SHOW_ATTRIBUTE()
- Register fixes for Rockchip rk3188 and rk3328
- One new critical clock for Rockchip rk3188 and a fixed clock id (double used number)
- New clock id for Rockchip rk3328
- Amlogic Meson8/Meson8b video clock support
- Amlogic got a clk-input helper and used it for the axg-audio clock driver
- Sigma Delta modulation for the Allwinner A33 audio clocks
- Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and RZ/G2 SoCs
- Support for SDHI HS400 clocks on early revisions of Renesas R-Car H3 and M3-W
- Support for SDHI and USB clocks on Renesas RZ/A2
- Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas R-Car V3M
- Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks, etc.)
-----BEGIN PGP SIGNATURE-----
iQJFBAABCgAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlwZeqgRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSU7qA/8C7p4EL36zkFFHhF6wh9+CiLIcTt1OKEu
ePgTo0UP9Q94BzHy0SOZhwV6w6yqeOfTXCAYZWdV2UcNKyPDPlIMZPkxrNbH5twq
kptjuBS1FqnnMgfusUP88bUrhQ5hUGEaKaC4iCDK7s0YI4nBfVB28G5ZMbFTSE5L
hrIufRfZ0aQWQw6y8aGI4qDtUeg09s6cEwFw8cA+vArAJ+2hwv0zjFGMxQskNJ6N
JubPopVCWuP+jsqMrGP48Rg4BphSQ97h4B65Uj0BNPQ4HTIMLVvXX6Pr8sRGvKiO
IMsNQq+fS+ECmdcV7IUzSv14cX2mLCb9XWgfCnWEK67/Ny3deaurtzF0qloWnrtv
kFSDE4df5cJkMkK2HZF8/e0/qn0FbGP6/wDSwfdhuVuJPmfdF5m552TtQuehNHey
YNy/pIY4sCh0zCkeU212TFKvAaRLd8qVqh2nikn3Cs7ik0G5Bhv2GAqQmIGJEh6g
f3n/WLTzVUqFksPC5KRZHu/1UIe4sz8i14AZXmxvCyH8buLSznhoniB0wwRrQdLL
VcJ2ia4b4e4JBJg1A5b9IqfEliJBNUV0UZTakduXBnThBpXQeH0t6YesXNaPqKaM
qJKvaQbNk0FNFsIO4GHxwrmujrf8SrHdhWuf/rh5O6mfOiXnNTzFcLZ59+nx86Bh
3sUFruRiDx8=
=iNvu
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This round is dominated by NXP's i.MX clk drivers. We gained support
for two or three i.MX SoCs in here and that mostly means a lot of
driver code and data.
Beyond that platform, there are some new Mediatek, Amlogic, and
Qualcomm clk drivers added in here, and then we get to the long tail
of driver updates and non-critical fixes all around, including code
for vendors such as Renesas, Rockchip, Nvidia, and Allwinner. Overall,
the driver updates look normal.
Apart from the usual driver updates we have an update to make
registering OF based clk providers a little simpler when they're
devices created as a child of a device backed by a node in DT. Drivers
don't have to jump through hoops to unregister the provider upon
driver removal anymore because the API does the right thing and uses
the parent device DT node.
Summary:
Core:
- Make devm_of_clk_add_hw_provider() use parent dt node if necessary
- Various SPDX taggings
- Mark clk_ops const when possible
New Drivers:
- NXP i.MX7ULP SoC clock support
- NXP i.MX8QXP SoC clock support
- NXP i.MX8MQ SoC clock support
- NXP QorIQ T1023 SoC support
- Qualcomm SDM845 audio subsystem clks
- Qualcomm SDM845 GPU clck controllers
- Qualcomm QCS404 RPM clk support
- Mediatek MT7629 SoC clk controllers
- Allwinner F1c100s SoC clocks
- Allwinner H6 display engine clocks
- Amlogic GX video clocks
- Support for Amlogic meson8b CPU frequency scaling
- Amlogic Meson8b CPU post-divider clocks
Updates:
- Proper suspend/resume on VersaClock5
- Shrink code some with DEFINE_SHOW_ATTRIBUTE()
- Register fixes for Rockchip rk3188 and rk3328
- One new critical clock for Rockchip rk3188 and a fixed clock id
(double used number)
- New clock id for Rockchip rk3328
- Amlogic Meson8/Meson8b video clock support
- Amlogic got a clk-input helper and used it for the axg-audio clock
driver
- Sigma Delta modulation for the Allwinner A33 audio clocks
- Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and
RZ/G2 SoCs
- Support for SDHI HS400 clocks on early revisions of Renesas R-Car
H3 and M3-W
- Support for SDHI and USB clocks on Renesas RZ/A2
- Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas
R-Car V3M
- Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks,
etc)"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (172 commits)
clk: imx: imx7ulp: add arm hsrun mode clocks support
dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
clk: Use of_node_name_eq for node name comparisons
clk: vc5: Add suspend/resume support
clk: qcom: Drop unused 8998 clock
clk: qcom: Leave mmss noc on for 8998
clk: tegra: Return the exact clock rate from clk_round_rate
clk: tegra30: Use Tegra CPU powergate helper function
soc/tegra: pmc: Drop SMP dependency from CPU APIs
clk: tegra: Fix maximum audio sync clock for Tegra124/210
clk: tegra: get rid of duplicate defines
clk: imx: add imx8qxp lpcg driver
clk: imx: add lpcg clock support
clk: imx: add imx8qxp clk driver
clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant
clk: imx: add scu clock common part
clk: imx: add configuration option for mmio clks
dt-bindings: clock: add imx8qxp lpcg clock binding
dt-bindings: clock: imx8qxp: add SCU clock IDs
clk: qcom: Add missing msm8998 resets
...
|
||
|
Linus Torvalds
|
79f20778fb |
regulator: Updates for v4.20
This has been a very busy release for the core, some fixes, one large new
feature and a big bit of refactoring to update the GPIO API:
- Support for coupled regulators from Dmitry Osipenko based on a prior
attempt by Maciej Purski, allowing us to handle situations where the
voltages on two regulators can't be too far apart from each other.
- Conversion of the GPIO support in both drivers and the core to use
GPIO descriptors rather than numbers, part of the overall project to
remove GPIO numbers.
- Support for standby mode suspend states from Andrei Stefanescu.
- New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and
Microchip MPC16502.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlwhKkcTHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0DFfB/91/ECmybKTP+RvwUTZ0rrqFFs2C9Vl
76vH242exyJuzv44inWi9gOcXFDn7c9hf7Vl4Jd5UVP53Nzm5I8ZwExQsxax9BsN
hltlX01UpRAmHNkMNrnJH6YAntD3EicYGSUDjohkWItIDqpMAjhWpx/yGXTEjBir
gvkV51bF3qAYQe0g6MmK3KeVw96QPNjUhoPbsqbpaXaF6fmyOVzMiFrffJGmUAyM
J5qRv3OhsZiZy2/zxNLkUI6y4XKDEaFJ3RhSKoUwItGyKQt2saXMoJGyEEWm2b6X
coTm0ZQk+EU+b659lDHErTM4YUx7p7tQt3VM09NoMD8B261TdZ0y99Oh
=8Rxt
-----END PGP SIGNATURE-----
Merge tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"This has been a very busy release for the core, some fixes, one large
new feature and a big bit of refactoring to update the GPIO API:
- Support for coupled regulators from Dmitry Osipenko based on a
prior attempt by Maciej Purski, allowing us to handle situations
where the voltages on two regulators can't be too far apart from
each other.
- Conversion of the GPIO support in both drivers and the core to use
GPIO descriptors rather than numbers, part of the overall project
to remove GPIO numbers.
- Support for standby mode suspend states from Andrei Stefanescu.
- New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and
Microchip MPC16502"
* tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (90 commits)
regulator: tps65910: fix a missing check of return value
regulator: mcp16502: Select REGMAP_I2C to fix build error
regulator: convert to DEFINE_SHOW_ATTRIBUTE
regulator: mcp16502: Fix missing n_voltages setting
regulator: mcp16502: Use #ifdef CONFIG_PM_SLEEP around mcp16502_suspend/resume_noirq
regulator: mcp16502: code cleanup
regulator: act8945a-regulator: make symbol act8945a_pm static
drivers/regulator: fix a missing check of return value
regulator: act8945a-regulator: fix 'defined but not used' compiler warning
regulator: axp20x: fix set_ramp_delay for AXP209/dcdc2
regulator: mcp16502: add support for suspend
mfd: axp20x: use explicit bit defines
mfd: axp20x: Clean up included headers
regulator: dts: enable soft-start and ramp delay for the OLinuXino Lime2
dt-bindings: mfd: axp20x: Add software based soft_start for AXP209 LDO3
regulator: axp20x: add software based soft_start for AXP209 LDO3
dt-bindings: mfd: axp20x: add support for regulator-ramp-delay for AXP209
regulator: axp20x: add support for set_ramp_delay for AXP209
mfd: axp20x: name voltage ramping define properly
regulator: mcp16502: add regulator driver for MCP16502
...
|
||
|
Linus Torvalds
|
8e61e7b5c4 |
sound updates for 4.21
There are no intensive changes in both ALSA and ASoC core parts while
rather most of changes are a bunch of driver fixes and updates.
A large diff pattern appears in ASoC TI part which now merges both
OMAP and DaVinci stuff, but the rest spreads allover the places.
Note that this pull request includes also some updates for LED trigger
and platform drivers for mute LEDs, appearing in the diffstat as well.
Some highlights:
ASoC:
- Preparatory work for merging the audio-graph and audio-graph-scu
cards
- A merge of TI OMAP and DaVinci directories, as both product lines
get merged together. Also including a few architecture changes as
well.
- Major cleanups of the Maxim MAX9867 driver
- Small fixes for tablets & co with Intel BYT/CHT chips
- Lots of rsnd updates as usual
- Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with
RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx I2S
controllers
HD-audio:
- Introduce audio-mute LED trigger for replacing the former hackish
dynamic binding
- Huawei WMI hotkey and mute LED support
- Refactoring of PM code and display power controls
- Headset button support in the generic jack code
- A few updates for Tegra
- Fixups for HP EliteBook and ASUS UX391UA
- Lots of updates for Intel ASoC HD-audio, including the improved DSP
detection and the fallback binding from ASoC SST to legacy HD-audio
controller drivers
Others:
- Updates for FireWire TASCAM and Fireface devices, some other fixes
- A few potential Spectre v1 fixes that are all trivial
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAlwbbCIOHHRpd2FpQHN1
c2UuZGUACgkQLtJE4w1nLE+RoQ//TNKliUP3bOv4BdnSmUHcCSAP3st96Ror5lC+
RZ103UyjlCsfa7hSPfH7/4WHAjk7wXYdazjA3m2swsxsbcjPMW4uBIBJlegQNM/9
PmNt4y60UgdgMCT/uu10BlEO8GsqBkRpxFYHtUJ3Lq6h9ECa+VDLazNjK9jABItK
BVG668/LZp0le94cnJsLICmZ7fwKpAvi58hOsgOJLrPP4gzSGTj1gJXw/yyZ99QC
MPLVj1PruXq1l8zfxM+MUuOa7hayafx64bCbftlITPonWfEr7OvBCQ7Vf9HqzJIJ
OzEXAclVSc89R7RQT2omPiRKC7AyL85M9PCkpTtXh2D7DGXw9CFj5IDL6eIC4Ip4
sycArLOo6LA8ZYu45zCiY3rfh9Hx0Zn2qHz3qJeQtBrv5XYULuf6ZNwq6xJDEUz/
jxS558wSGHYWAyjv/IaPha1+JD6Us7zkSQgum+/qqnYYnYlDyxXnBatj4HzWZP/M
Khuhj+k+Y8UXK1MbRiekVCGIwCHGf3cUv4H7tq+qpEzvJZwTFnOBh7/twVL8gN96
x4ozZogaiaenZwlEZlkzowAMBBYMYb537Y+Y5suxzWGz3HN/Z8raaL8GTkIIB/BO
bNprJtPR8GJLfdu8NE++dUR2VuHfMnWat+frXk0eAsWutoviRyB4JLCRppfpgrA/
vDhIreU=
=SG61
-----END PGP SIGNATURE-----
Merge tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"There are no intensive changes in both ALSA and ASoC core parts while
rather most of changes are a bunch of driver fixes and updates. A
large diff pattern appears in ASoC TI part which now merges both OMAP
and DaVinci stuff, but the rest spreads allover the places.
Note that this pull request includes also some updates for LED trigger
and platform drivers for mute LEDs, appearing in the diffstat as well.
Some highlights:
ASoC:
- Preparatory work for merging the audio-graph and audio-graph-scu
cards
- A merge of TI OMAP and DaVinci directories, as both product lines
get merged together. Also including a few architecture changes as
well.
- Major cleanups of the Maxim MAX9867 driver
- Small fixes for tablets & co with Intel BYT/CHT chips
- Lots of rsnd updates as usual
- Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with
RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx
I2S controllers
HD-audio:
- Introduce audio-mute LED trigger for replacing the former hackish
dynamic binding
- Huawei WMI hotkey and mute LED support
- Refactoring of PM code and display power controls
- Headset button support in the generic jack code
- A few updates for Tegra
- Fixups for HP EliteBook and ASUS UX391UA
- Lots of updates for Intel ASoC HD-audio, including the improved DSP
detection and the fallback binding from ASoC SST to legacy HD-audio
controller drivers
Others:
- Updates for FireWire TASCAM and Fireface devices, some other fixes
- A few potential Spectre v1 fixes that are all trivial"
* tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (280 commits)
ALSA: HD-Audio: SKL+: force HDaudio legacy or SKL+ driver selection
ALSA: HD-Audio: SKL+: abort probe if DSP is present and Skylake driver selected
ALSA: HDA: export process_unsol_events()
ALSA: hda/realtek: Enable audio jacks of ASUS UX391UA with ALC294
ALSA: bebob: fix model-id of unit for Apogee Ensemble
ALSA: emu10k1: Fix potential Spectre v1 vulnerabilities
ALSA: rme9652: Fix potential Spectre v1 vulnerability
ASoC: ti: Kconfig: Remove the deprecated options
ARM: davinci_all_defconfig: Update the audio options
ARM: omap1_defconfig: Do not select ASoC by default
ARM: omap2plus_defconfig: Update the audio options
ARM: davinci: dm365-evm: Update for the new ASoC Kcofnig options
ARM: OMAP2: Update for new MCBSP Kconfig option
ARM: OMAP1: Makefile: Update for new MCBSP Kconfig option
MAINTAINERS: Add entry for sound/soc/ti and update the OMAP audio support
ASoC: ti: Merge davinci and omap directories
ALSA: hda: add mute LED support for HP EliteBook 840 G4
ALSA: fireface: code refactoring to handle model-specific registers
ALSA: fireface: add support for packet streaming on Fireface 800
ALSA: fireface: allocate isochronous resources in mode-specific implementation
...
|
||
|
Mikko Perttunen
|
fed8b7e366 |
dt-bindings: tegra186-hsp: Add shared mailboxes
Shared mailboxes are a mechanism to transport data from one processor in the system to another. They are bidirectional links with both a producer and a consumer. Interrupts are used to let the consumer know when data was written to the mailbox by the producer, and to let the producer know when the consumer has read the data from the mailbox. These interrupts are mapped to one or more "shared interrupts". Typically each processor in the system owns one of these shared interrupts. Add documentation to the device tree bindings about how clients can use mailbox specifiers to request a specific shared mailbox and select which direction they drive. Also document how to specify the shared interrupts in addition to the existing doorbell interrupt. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
||
|
Arnd Bergmann
|
10f9d7fd56 |
AM65x DT changes for 4.21. Includes:
- Pinctrl support - I2C support - ECAP PWM support - Power domain handling for UARTs - McSPI support -----BEGIN PGP SIGNATURE----- iQJEBAABCAAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAlwTdrAQHHQta3Jpc3Rv QHRpLmNvbQAKCRDK+r0xeVAaEc2MEACH5s+PG7jESFPKiHDWcQcUwHibBkby8bDU WaDwEUpwiNfwG4QnBkeDMiiMGr4afUzWtgXIKkA/AttrMVvt7vU+NTuD5K3XT5mo gc4kTZ5DWxo5IJuwUqXKSH9eu/TSoGH8xJam/acGAPdzlyFZfbrpjyOPEKa8rUBO r/KAHBoGPCxoS+ycYQr+HUYG7iicngQOiXhPM412zxAJLtFh+Gfup77EY0EgRgWT PZaqo6j6G/FY0ryQZSDI3h0Zm3oSeHGB9+CRv5WsVBcMGFEef1zSReLBufzMs6on 66h0JeRuxEIhnRAuxZk4CzgCdYHtrSP2cZlxLQ4PG1NJ2bFMX5yvdke6sIzeM5EZ 3fMZDK2+dT0Z+uGBjO0JY05J768sys/ud0KkNx0HjzcZxLQo1d+P6azF6cg78spg xtIzSqii1++KgCIDGnZ4FAmtD1aP2IH2TUbU5OO5pbVFxz3lDf6B2OJBOOjfmWYa 7QcCHV8GFi3TQpT1nLMGUKpi6PFjym7J5e5TWLck5hZVEqq65doBq6dx36Di8cNJ RpGe0OZo/y+8EOqntVafLU67pIuLbIUDWVsRFKFMhx04Dpw9UozCXep8YiQbNOn1 t0c/fED2HfPovWV0Tb/IHgjkU/NCxJJlNm7MMTVVcVumecc/SLSgjMEJzRh7b5bt 1A6++3yLIQ== =wUbp -----END PGP SIGNATURE----- Merge tag 'am654-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into next/dt AM65x DT changes for 4.21. Includes: - Pinctrl support - I2C support - ECAP PWM support - Power domain handling for UARTs - McSPI support * tag 'am654-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-am654: Enable main domain McSPI0 arm64: dts: ti: k3-am654: Add McSPI DT nodes arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM arm64: dts: ti: k3-am65-main: Add ECAP PWM node arm64: dts: ti: k3-am654-base-board: Add I2C nodes arm64: dts: ti: am654-base-board: Add pinmux for main uart0 arm64: dts: ti: k3-am65: Add pinctrl regions dt-bindings: pinctrl: k3: Introduce pinmux definitions arm64: dts: ti: k3-am654: Fix wakeup_uart reg address Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Stephen Boyd
|
b677574bdf |
Merge branch 'clk-imx7ulp' into clk-next
* clk-imx7ulp: clk: imx: imx7ulp: add arm hsrun mode clocks support dt-bindings: clock: imx7ulp: add HSRUN mode related clocks |
||
|
Anson Huang
|
401371fb59 |
dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
There are HSRUN mode clock mux and divider in SCG1 module, and SMC1 can control i.MX7ULP CPU to run in RUN mode or HSRUN mode, the mode switch bits are actually a clock mux, add these clocks for clock driver and dtb to use. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Stephen Boyd
|
44a6951777 |
Merge branch 'clk-qcom-8998-resets' into clk-next
- Add resets and make Qualcomm MSM8998 GCC driver more functional * clk-qcom-8998-resets: clk: qcom: Drop unused 8998 clock clk: qcom: Leave mmss noc on for 8998 clk: qcom: Add missing msm8998 resets clk: qcom: gcc-msm8998: Add clkref clocks clk: qcom: gcc-msm8998: Disable halt check of UFS clocks clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_at clk: qcom: Enumerate remaining msm8998 resets clk: qcom: Add xo dummy clk on msm8998 clk: qcom: Fix MSM8998 resets |
||
|
Stephen Boyd
|
58c05c823b |
Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp' and 'clk-imx8mq' into clk-next
- NXP i.MX7ULP SoC clock support - Support for i.MX8QXP SoC clocks - Support for NXP i.MX8MQ clock controllers * clk-imx7ulp: clk: imx: add imx7ulp clk driver clk: imx: implement new clk_hw based APIs clk: imx: make mux parent strings const dt-bindings: clock: add imx7ulp clock binding doc clk: imx: add imx7ulp composite clk support clk: imx: add pfdv2 support clk: imx: add pllv4 support clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support clk: imx: add gatable clock divider support * clk-imx6-fixes: clk: imx6q: handle ENET PLL bypass clk: imx6q: optionally get CCM inputs via standard clock handles clk: imx6q: reset exclusive gates on init * clk-imx-fixes: clk: imx6q: add DCICx clocks gate clk: imx6sl: ensure MMDC CH0 handshake is bypassed clk: imx7d: remove UART1 clock setting * clk-imx8qxp: clk: imx: add imx8qxp lpcg driver clk: imx: add lpcg clock support clk: imx: add imx8qxp clk driver clk: imx: add scu clock common part clk: imx: add configuration option for mmio clks dt-bindings: clock: add imx8qxp lpcg clock binding dt-bindings: clock: imx8qxp: add SCU clock IDs firmware: imx: add pm svc headfile dt-bindings: fsl: scu: update power domain binding firmware: imx: remove resource id enums dt-bindings: imx: add scu resource id headfile * clk-imx8mq: clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant clk: imx: remove redundant initialization of ret to zero clk: imx: Add SCCG PLL type clk: imx: Add fractional PLL output clock clk: imx: Add clock driver for i.MX8MQ CCM clk: imx: Add imx composite clock dt-bindings: Add binding for i.MX8MQ CCM |
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Stephen Boyd
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ffe05540d1 |
Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and 'clk-rockchip' into clk-next
* clk-renesas: clk: renesas: rcar-gen3: Add HS400 quirk for SD clock clk: renesas: rcar-gen3: Add documentation for SD clocks clk: renesas: rcar-gen3: Set state when registering SD clocks clk: renesas: r8a77995: Simplify PLL3 multiplier/divider clk: renesas: r8a77995: Add missing CPEX clock clk: renesas: r8a77995: Remove non-existent SSP clocks clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks clk: renesas: r8a77995: Correct parent clock of DU clk: renesas: r8a77990: Correct parent clock of DU clk: renesas: r8a77970: Add CPEX clock clk: renesas: r8a77965: Add CPEX clock clk: renesas: r8a7796: Add CPEX clock clk: renesas: r8a7795: Add CPEX clock clk: renesas: r8a774a1: Add CPEX clock dt-bindings: clock: r8a7796: Remove CSIREF clock dt-bindings: clock: r8a7795: Remove CSIREF clock clk: renesas: Mark rza2_cpg_clk_register static clk: renesas: r7s9210: Add USB clocks clk: renesas: r8a77970: Add RPC clocks clk: renesas: r7s9210: Add SDHI clocks * clk-allwinner: clk: sunxi-ng: a64: Allow parent change for VE clock clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL clk: sunxi-ng: h3: Allow parent change for ve clock clk: sunxi-ng: add support for suniv F1C100s SoC dt-bindings: clock: Add Allwinner suniv F1C100s CCU clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL clk: sunxi-ng: a64: Fix gate bit of DSI DPHY clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I clk: sunxi-ng: Add support for H6 DE3 clocks dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description clk: sunxi-ng: h6: Set video PLLs limits clk: sunxi-ng: Use u64 for calculation of NM rate clk: sunxi-ng: Adjust MP clock parent rate when allowed clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock * clk-tegra: clk: tegra: Return the exact clock rate from clk_round_rate clk: tegra30: Use Tegra CPU powergate helper function soc/tegra: pmc: Drop SMP dependency from CPU APIs clk: tegra: Fix maximum audio sync clock for Tegra124/210 clk: tegra: get rid of duplicate defines clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC clk: tegra20: Turn EMC clock gate into divider * clk-meson: (25 commits) clk: meson: axg-audio: use the clk input helper function clk: meson: add clk-input helper function clk: meson: Mark some things static clk: meson: meson8b: add the read-only video clock trees clk: meson: meson8b: add the fractional divider for vid_pll_dco clk: meson: meson8b: fix the offset of vid_pll_dco's N value clk: meson: Fix GXL HDMI PLL fractional bits width clk: meson: meson8b: add the CPU clock post divider clocks clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3 clk: meson: clk-regmap: add read-only gate ops clk: meson: meson8b: allow changing the CPU clock tree clk: meson: meson8b: run from the XTAL when changing the CPU frequency clk: meson: meson8b: add support for more M/N values in sys_pll clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel clk: meson: clk-pll: check if the clock is already enabled clk: meson: meson8b: fix the width of the cpu_scale_div clock clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table clk: meson: meson8b: use the HHI syscon if available dt-bindings: clock: meson8b: use the registers from the HHI syscon ... * clk-rockchip: clk: rockchip: add clock-id to gate of ACODEC for rk3328 clk: rockchip: add clock ID of ACODEC for rk3328 clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328 clk: rockchip: fix I2S1 clock gate register for rk3328 clk: rockchip: make rk3188 hclk_vio_bus critical clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering clk: rockchip: fix rk3188 sclk_smc gate data clk: rockchip: fix typo in rk3188 spdif_frac parent |
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Stephen Boyd
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1a501c8def |
Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and 'clk-ops-const' into clk-next
- Make devm_of_clk_add_hw_provider() use parent dt node if necessary - Various SPDX taggings - Mark clk_ops const when possible * clk-managed-registration: clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock clk: apcs-msm8916: simplify probe cleanup by using devm clk: clk-twl6040: Free of_provider at remove clk: rk808: use managed version of of_provider registration clk: clk-hi655x: Free of_provider at remove clk: of-provider: look at parent if registered device has no provider info clk: Add kerneldoc to managed of-provider interfaces * clk-spdx: clk: Tag basic clk types with SPDX clk: Tag clk core files with SPDX clk: bcm2835: Switch to SPDX identifier * clk-remove-basic: clk: Loongson1: Remove usage of CLK_IS_BASIC clk: samsung: s3c2410: Remove usage of CLK_IS_BASIC clk: versatile: sp810: Remove usage of CLK_IS_BASIC clk: hisilicon: Remove usage of CLK_IS_BASIC clk: h8300: Remove usage of CLK_IS_BASIC clk: axm5516: Remove usage of CLK_IS_BASIC clk: st: Remove usage of CLK_IS_BASIC clk: renesas: Remove usage of CLK_IS_BASIC * clk-ops-const: clk: s2mps11: constify clk_ops structure clk: pxa: constify clk_ops structures clk: pistachio: constify clk_ops structures clk: palmas: constify clk_ops structure clk: max77686: constify clk_ops structure |
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Stephen Boyd
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3315fe5faf |
Merge branch 'clk-qcom-sdm845-lpass' into clk-next
- Qualcomm SDM845 audio subsystem clks * clk-qcom-sdm845-lpass: clk: qcom: Add lpass clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM LPASS clock bindings dt-bindings: clock: Update GCC bindings for protected-clocks |
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Stephen Boyd
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f4ad7fba06 |
Merge branches 'clk-qcom-kconfig', 'clk-qcom-gpucc', 'clk-qcom-qcs404-rpm', 'clk-qcom-spi' and 'clk-qcom-videocc-binding' into clk-next
- Qualcomm SDM845 GPU clock controllers - Qualcomm QCS404 RPM clk support * clk-qcom-kconfig: clk: qcom: Move to menuconfig and reduce lines * clk-qcom-gpucc: dt-bindings: clock: qcom: Fix the xo parent in gpucc example clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6 clk: qcom: Add a dummy enable function for GX gdsc clk: qcom: gdsc: Don't override existing gdsc pd functions clk: qcom: Add graphics clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Graphics clock bindings * clk-qcom-qcs404-rpm: clk: qcom: smd: Add support for QCS404 rpm clocks * clk-qcom-spi: clk: qcom: msm8916: Additional clock rates for spi * clk-qcom-videocc-binding: dt-bindings: clock: Require #reset-cells in sdm845-videocc |
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Rohit kumar
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76119509d2
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ASoC: qdsp6: dt-bindings: Add q6afe display_port dt binding
This patch adds bindings required for DISPLAY_PORT_RX port on AFE. Signed-off-by: Rohit kumar <rohitkr@codeaurora.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org> |