I2C adapter drivers are supposed to handle retries on nack by themselves
if they do, so there's no point in setting .retries if they don't.
As this retry mechanism is going away (at least in its current form),
clean this up now so that we don't get build failures later.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
The D-Link DNS-323 uses a M41T80 RTC chip, so enable this driver in
the Orion defconfig.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Cc: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Basic selections for Orion machines
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
With this patch USB, SATA (via sata_mv), Ethernet, RTC, LEDs and NOR Flash
work.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
add MV88F5181 support bits required by D-link DNS-323 patch
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Only serial, NOR, NAND, PCI and Ethernet is activated at the moment.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
serial, NOR, PCI and Ethernet is activated at the moment.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Orion Ethernet port is the same port used in the Discovery
family (MV643XX). This patch include the common platform_device
stuff according to the existing mv643xx_eth conventions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for Orion edge sensitive GPIO IRQs.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
CC: Thomas Gleixner <tglx@linutronix.de>
This is a pre-requisite for implementing proper hardware accelerated
GPIO LED flashing, and since we want proper locking, it's sensible to provide
the orion specific orion_gpio_set_blink() implementation within
mach-orion/gpio.c. The functions orion_gpio_set_blink() and gpio_set_value()
implicitly turn off each others state.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Orion has fully programable address map. There's a separate address
map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB,
Gigabit Ethernet, DMA/XOR engines, etc.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
This patch adds support for PCI and PCI-E controllers in the
Orion, Orion-NAS and Orion2.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
This enables the usage of some old Feroceon cores
for which the CPU ID is equal to the ARM926 ID.
Relevant for Feroceon-1850 and old Feroceon-2850.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache replacement policy on the Feroceon core doesn't guarantee
that reading through a linear chunk of memory flushes the entire cache.
This is however what the default method for ARMv5TE cores does.
Although the Feroceon is an ARMv5TE core, it implements the same
cache handling instructions as the ARMv5TEJ cores, and must use it for
proper cache flush.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The default ARMv4 method consisting of reading through some memory
area isn't compatible with the cache replacement policy of some
ARMv5TEJ compatible cache implementations. It is also a bit wasteful
when a dedicated instruction can do the needed work optimally.
It is hard to tell if all ARMv5TEJ cores will support the used CP15
instruction, but at least all those implementations Linux currently
knows about (ARM926 and ARM1026) do support it.
Tested on an OMAP1610 H2 target.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Tested-by: George G. Davis <gdavis@mvista.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Feroceon is a family of independent ARMv5TE compliant CPU core
implementations, supporting a variable depth pipeline and out-of-order
execution. The Feroceon is configurable with VFP support, and the
later models in the series are superscalar with up to two instructions
per clock cycle.
This patch adds the initial low-level cache/TLB handling for this core.
Signed-off-by: Assaf Hoffman <hoffman@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
LatencyTOP kernel infrastructure; it measures latencies in the
scheduler and tracks it system wide and per process.
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Use HR-timers (when available) to deliver an accurate preemption tick.
The regular scheduler tick that runs at 1/HZ can be too coarse when nice
level are used. The fairness system will still keep the cpu utilisation 'fair'
by then delaying the task that got an excessive amount of CPU time but try to
minimize this by delivering preemption points spot-on.
The average frequency of this extra interrupt is sched_latency / nr_latency.
Which need not be higher than 1/HZ, its just that the distribution within the
sched_latency period is important.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Replace all lock_cpu_hotplug/unlock_cpu_hotplug from the kernel and use
get_online_cpus and put_online_cpus instead as it highlights the
refcount semantics in these operations.
The new API guarantees protection against the cpu-hotplug operation, but
it doesn't guarantee serialized access to any of the local data
structures. Hence the changes needs to be reviewed.
In case of pseries_add_processor/pseries_remove_processor, use
cpu_maps_update_begin()/cpu_maps_update_done() as we're modifying the
cpu_present_map there.
Signed-off-by: Gautham R Shenoy <ego@in.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6:
[AVR32] extint: Set initial irq type to low level
[AVR32] extint: change set_irq_type() handling
[AVR32] NMI debugging
[AVR32] constify function pointer tables
[AVR32] ATNGW100: Update defconfig
[AVR32] ATSTK1002: Update defconfig
[AVR32] Kconfig: Choose daughterboard instead of CPU
[AVR32] Add support for ATSTK1003 and ATSTK1004
[AVR32] Clean up external DAC setup code
[AVR32] ATSTK1000: Move gpio-leds setup to setup.c
[AVR32] Add support for AT32AP7001 and AT32AP7002
[AVR32] Provide more CPU information in /proc/cpuinfo and dmesg
[AVR32] Oprofile support
[AVR32] Include instrumentation menu
Disable VGA text console for AVR32 architecture
[AVR32] Enable debugging only when needed
ptrace: Call arch_ptrace_attach() when request=PTRACE_TRACEME
[AVR32] Remove redundant try_to_freeze() call from do_signal()
[AVR32] Drop GFP_COMP for DMA memory allocations
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (125 commits)
[CRYPTO] twofish: Merge common glue code
[CRYPTO] hifn_795x: Fixup container_of() usage
[CRYPTO] cast6: inline bloat--
[CRYPTO] api: Set default CRYPTO_MINALIGN to unsigned long long
[CRYPTO] tcrypt: Make xcbc available as a standalone test
[CRYPTO] xcbc: Remove bogus hash/cipher test
[CRYPTO] xcbc: Fix algorithm leak when block size check fails
[CRYPTO] tcrypt: Zero axbuf in the right function
[CRYPTO] padlock: Only reset the key once for each CBC and ECB operation
[CRYPTO] api: Include sched.h for cond_resched in scatterwalk.h
[CRYPTO] salsa20-asm: Remove unnecessary dependency on CRYPTO_SALSA20
[CRYPTO] tcrypt: Add select of AEAD
[CRYPTO] salsa20: Add x86-64 assembly version
[CRYPTO] salsa20_i586: Salsa20 stream cipher algorithm (i586 version)
[CRYPTO] gcm: Introduce rfc4106
[CRYPTO] api: Show async type
[CRYPTO] chainiv: Avoid lock spinning where possible
[CRYPTO] seqiv: Add select AEAD in Kconfig
[CRYPTO] scatterwalk: Handle zero nbytes in scatterwalk_map_and_copy
[CRYPTO] null: Allow setkey on digest_null
...
David Brownell pointed out a mismatch in the avr32 extint code:
> I noticed a small glitch that's not fixed by this patch: the
> initial type is falling edge, but IRQ_TYPE_NONE is mapped to
> IRQ_TYPE_LEVEL_LOW. Potentially surprising.
Fix it by setting the initial type (and handler) to low level,
matching the meaning of IRQ_TYPE_NONE.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Update the AVR32 EIC code to use the new __set_irq_handler_unlocked()
call, getting rid of one more instance of this widespread problem.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Change the NMI handler to use the die notifier chain to signal anyone
who cares. Add a simple "nmi debugger" which hooks into this chain and
that may dump registers, task state, etc. when it happens.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Remove the CPU selection menu and instead let it be selected by the
board or daughterboard option. Add daughterboard selection for
ATSTK1000 (this was previously determined based on CPU type.)
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1003 and ATSTK1004 are CPU daughterboards for ATSTK1000 featuring
the AT32AP7001 and AT32AP7002 CPUs, respectively.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Reduce the ridiculous amount of #ifdef clutter in atstk1002.c a bit by
moving all the extdac stuff into its own function and providing an
empty stub for the case when it isn't wanted.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
There may be other boards than STK1002 that want to use the leds on
STK1000. Move it to stk1000 common code to make it easier to reuse.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
These are derivatives of the AT32AP7000 chip, which means that most of
the code stays the same. Rename a few files, functions, definitions
and config symbols to reflect that they apply to all AP700x chips, and
exclude some platform devices from chips where they aren't present.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add the following fields to /proc/cpuinfo:
* chip type and revision (from the JTAG chip id)
* cpu MHz (from clk_get_rate())
* features (from the CONFIG0 register)
Also rename "cpu family" to "cpu arch" and "cpu type" to "cpu core" to
remove some ambiguity.
Show chip type and revision at bootup, and clarify that the other
kinds of IDs that we're already printing are for the cpu core and
architecture. Rename "AP7000" to "AP7" since that's the name of the
core.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This adds the necessary architecture code to run oprofile on AVR32
using the performance counters documented by the AVR32 Architecture
Manual.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Philippe Elie <phil.el@wanadoo.fr>
Keep track of processes being debugged (including the kernel itself)
and turn the OCD system on and off as appropriate. Since enabling
debugging turns off some optimizations in the CPU core, this fixes the
issue that enabling KProbes support or simply running a program under
gdbserver will reduce system performance significantly until the next
reboot.
The CPU performance will still be reduced for all processes while a
process is being debugged, but this is a lot better than reducing the
performance forever.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
get_signal_to_deliver() will call try_to_freeze(), so there's no point
in do_signal() doing it as well.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
dma_alloc_coherent wants to split pages after allocation in order to
reduce the memory footprint. This does not work well with GFP_COMP
pages, so drop this flag before allocation.
This patch was forward-ported from BSP 2.0
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
All kobjects require a dynamically allocated name now. We no longer
need to keep track if the name is statically assigned, we can just
unconditionally free() all kobject names on cleanup.
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
There is no need for kobject_unregister() anymore, thanks to Kay's
kobject cleanup changes, so replace all instances of it with
kobject_put().
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This code is really really really broken. So much so that it's almost
impossible to fix with a simple patch, so just comment out the offending
registration with the kobject core, and mark the driver as broken.
The problem is that the code is trying to register a "raw" struct
device, which is not allowed. struct device is only for use within the
driver model. This is being done to try to use the firmware layer which
wants a struct device. To properly fix this, use something easy, like a
platform device, which is a struct device and can be used for this kind
of thing.
Cc: Mikael Starvik <starvik@axis.com>
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
