Commit Graph

12 Commits

Author SHA1 Message Date
Tony Lindgren
2d3c8ba3cf ARM: dts: Fix wrong clocks for dra7 mcasp
The ahclkr clkctrl clock bit 28 only exists for mcasp 1 and 2 on dra7.
This causes the following warning on beagle-x15:

ti-sysc 48468000.target-module: could not add child clock ahclkr: -19

Also the mcasp clkctrl clock bits are wrong:

For mcasp1 and 2 we have four clocks at bits 28, 24, 22 and 0:

bit 28 is ahclkr
bit 24 is ahclkx
bit 22 is auxclk
bit 0 is fck

For mcasp3 to 8 we have three clocks at bits 24, 22 and 0.

bit 24 is ahclkx
bit 22 is auxclk
bit 0 is fck

We do not have currently mapped auxclk at bit 22 for the drivers, that can
be added if needed.

Fixes: 5241ccbf28 ("ARM: dts: Add missing ranges for dra7 mcasp l3 ports")
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-23 10:33:12 -07:00
Tony Lindgren
89bbc6f1eb ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7
We are currently using a wrong register for dcan revision. Although
this is currently only used for detecting the dcan module, let's
fix it to avoid confusion.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24 00:51:27 -07:00
Tony Lindgren
2e8647bbe1 ARM: dts: Fix flags for gpio7
The ti,no-idle-on-init and ti,no-reset-on-init flags need to be at
the interconnect target module level for the modules that have it
defined. Otherwise we get the following warnings:

dts flag should be at module level for ti,no-idle-on-init
dts flag should be at module level for ti,no-reset-on-init

Reviewed-by: Suman Anna <s-anna@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24 00:51:27 -07:00
Tony Lindgren
34f61de870 ARM: dts: Drop bogus CLKSEL for timer12 on dra7
There is no CLKSEL for timer12 on dra7 unlike for timer1. This
causes issues on booting the device that Tomi noticed if
DEBUG_SLAB is enabled and the clkctrl clock does not properly
handle non-existing clock. Let's drop the bogus CLKSEL clock,
the clkctrl clock handling gets fixed separately.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Fixes: 4ed0dfe3cf ("ARM: dts: dra7: Move l4 child devices to probe them with ti-sysc")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-30 00:25:23 -07:00
Keerthy
f7b9cb944a ARM: dts: dra76x: Disable rtc target module
rtc is fused out on dra76 and accessing target module
register is causing a boot crash hence disable it.

Fixes: 549fce068a ("ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data")
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-20 08:26:56 -07:00
Roger Quadros
bcbb63b802 ARM: dts: dra7: Separate AM57 dtsi files
AM5 and DRA7 SoC families have different set of modules
in them so the SoC sepecific dtsi files need to be separated.

e.g. Some of the major differences between AM576 and DRA76

		DRA76x	AM576x

USB3		x
USB4		x
ATL		x
VCP		x
MLB		x
ISS		x
PRU-ICSS1		x
PRU-ICSS2		x

This patch only deals with disabling USB3, USB4 and ATL for
AM57 variants.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-12 09:57:07 -07:00
Grygorii Strashko
e8acd8564b ARM: dts: dra7: switch to use phy-gmii-sel
Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-02-20 08:14:02 -08:00
Tony Lindgren
5241ccbf28 ARM: dts: Add missing ranges for dra7 mcasp l3 ports
We need to add mcasp l3 port ranges for mcasp to use a correct l3
data port address for dma. And we're also missing the optional clocks
that we have tagged with HWMOD_OPT_CLKS_NEEDED in omap_hwmod_7xx_data.c.

Note that for reading the module revision register HWMOD_OPT_CLKS_NEEDED
do not seem to be needed. So they could be probably directly managed
only by the mcasp driver, and then we could leave them out for the
interconnect target module.

Fixes: 4ed0dfe3cf ("ARM: dts: dra7: Move l4 child devices to probe
them with ti-sysc")
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-12-11 07:31:25 -08:00
Tero Kristo
b79e7b3bd1 ARM: dts: dra7: Move the ti,no-idle quirk on proper gmac node
Hwmod parses the DT hierarchically from root to search for matching
ti,hwmod property. With the introduction of L4 data, we have two nodes
with the ti,hwmod = "gmac" declaration, and the hwmod core only matches
the first one found, which is the target-module one. This node incorrectly
dropped the ti,no-idle flag, which causes number of problems, like ignoring
errata i877, and also causing an intermittent boot failure on certain dra7
boards.

Fix the issue by moving the ti,no-idle flag to the proper node.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-11-29 11:08:23 -08:00
Tony Lindgren
10aee7aeeb ARM: dts: Use dra7 mcasp compatible for mcasp instances
Looks like dra7 needs optional clocks enabled for mcasp unlike
am33xx and am437x do.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-11-08 10:36:16 -08:00
Tony Lindgren
4ed0dfe3cf ARM: dts: dra7: Move l4 child devices to probe them with ti-sysc
With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to
their proper location and enable probing using ti-sysc.

In general the first child device address range starts at range 0
from the ti-sysc interconnect target so the move involves adjusting
the child device reg properties for that.

In case of any regressions, problem devices can be reverted to probe
with legacy platform data as needed by moving them back and removing
the related interconnect target module node.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-10-18 10:04:02 -07:00
Tony Lindgren
549fce068a ARM: dts: dra7: Add l4 interconnect hierarchy and ti-sysc data
Similar to commit 8f42cb7f64 ("ARM: dts: omap4: Add l4 interconnect
hierarchy and ti-sysc data"), let's add proper interconnect hierarchy
for l4 interconnect instances with the related ti-sysc interconnect
module data as in Documentation/devicetree/bindings/bus/ti-sysc.txt.

Using ti-sysc driver binding allows us to start dropping legacy platform
data in arch/arm/mach-omap2/omap*hwmod*data.c files later on in favor of
ti-sysc dts data.

This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.

Note that we cannot yet include this file from the SoC dtsi file until
the child devices are moved to their proper locations in the
interconnect hierarchy in the following patch. Otherwise we would have
the each module probed twice.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-10-18 10:04:02 -07:00