Commit Graph

4 Commits

Author SHA1 Message Date
Ramneek Mehresh
465aceb832 powerpc/85xx: Add usb controller version info
Add usb controller version info for the following:
MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
P3041, P3060, P5020

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16 10:46:13 -05:00
Jerry Huang
f8b5a31877 powerpc/85xx: Fix cmd12 bug and add the chip compatible for eSDHC
According to latest kernel, the auto-cmd12 property should be
"sdhci,auto-cmd12", and according to the SDHC binding and the workaround for
the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc",
"fsl,mpc8536-esdhc", "fsl,p1020-esdhc", "fsl,p2020-esdhc" and
"fsl,p1010-esdhc".

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-18 08:01:53 -06:00
Kumar Gala
396a5a5691 powerpc/85xx: Add crypto engine to P1010 SoC device tree
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
96488746bb powerpc/85xx: Rework P1010RDB and P1010 device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1010-IP..." from compatibles for standard blocks
* PCI interrupt map - wrong IRQs for PCI-0 controller
* SDHC interrupt sense was wrong

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00