Commit Graph

634054 Commits

Author SHA1 Message Date
Xiaoguang Chen
b0122f3114 drm/i915/gvt: fix detect_host calling logic
Like other routines, intel_gvt_hypervisor_detect_host returns 0
for success.

Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-26 13:23:04 +08:00
Min He
64fafcf5a2 drm/i915/gvt: fix an typo in skl_decode_mi_display_flip
Fix type to set correct pipe number.

Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-26 13:12:03 +08:00
Andrzej Hajda
4397752c2e dt-bindings: add Silicon Image SiI8620 bridge bindings
SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0. It is controlled
via I2C bus.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1475823762-16237-3-git-send-email-a.hajda@samsung.com
2016-10-26 10:30:21 +05:30
Andrzej Hajda
00c635e5a4 video: add header file for Mobile High-Definition Link (MHL) interface
This header adds definitions specific to MHL protocol.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1475823762-16237-2-git-send-email-a.hajda@samsung.com
2016-10-26 10:29:58 +05:30
Akash Goel
ed4596ea99 drm/i915/guc: WA to address the Ringbuffer coherency issue
Driver accesses the ringbuffer pages, via GMADR BAR, if the pages are
pinned in mappable aperture portion of GGTT and for ringbuffer pages
allocated from Stolen memory, access can only be done through GMADR BAR.
In case of GuC based submission, updates done in ringbuffer via GMADR
may not get committed to memory by the time the Command streamer starts
reading them, resulting in fetching of stale data.

For Host based submission, such problem is not there as the write to Ring
Tail or ELSP register happens from the Host side prior to submission.
Access to any GFX register from CPU side goes to GTTMMADR BAR and Hw already
enforces the ordering between outstanding GMADR writes & new GTTMADR access.
MMIO writes from GuC side do not go to GTTMMADR BAR as GuC communication to
registers within GT is contained within GT, so ordering is not enforced
resulting in a race, which can manifest in form of a hang.

To ensure the flush of in-flight GMADR writes, a POSTING READ is done to
GuC register prior to doorbell ring.
There is already a similar WA in i915_gem_object_flush_gtt_write_domain(),
which takes care of GMADR writes from User space to GEM buffers, but not the
ringbuffer writes from KMD.
This WA is needed on all recent HW.

v2:
- Use POSTING_READ_FW instead of POSTING_READ as GuC register do not lie
  in any forcewake domain range and so the overhead of spinlock & search
  in the forcewake table is avoidable. (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1477413323-1880-1-git-send-email-akash.goel@intel.com
2016-10-25 21:00:29 +01:00
Christian König
9982ca681e drm/amdgpu: add amdgpu_ttm_bo_eviction_valuable callback
This way we can correctly check split VRAM buffers as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:04 -04:00
Christian König
a2ab19fed9 drm/ttm: make eviction decision a driver callback v2
This way the driver can decide if it is valuable to evict a BO or not.

The current implementation is added as default to all existing drivers.

v2: fix some typos found during internal testing

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:04 -04:00
Christian König
585ffd6544 drm/ttm: fix coding style in ttm_bo_driver.h
A few 80chars issues and spaces at wrong places.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:03 -04:00
Lucas Stach
1c331f75aa drm/radeon/pm: autoswitch power state when in balanced mode
The current default of always using the performance power state leads
to increased power consumption of mobile devices, which have a dedicated
battery power state. Switch between the performance and battery power
state automatically, dpending on the current AC power status, when the
user asked for the balanced power state.

The user can still override this logic by asking for the performance
or battery power state explicitly.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:03 -04:00
Colin Ian King
fad742f89d drm/amd/powerplay: fix spelling mistake and add KERN_WARNING to printks
Fix trivial spelling mistake cant't -> can't and add KERN_WARNING to
printk messages.  Remove redundant spaces before \n too (thanks to
Joe Perches for spotting those).

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:44:02 -04:00
Monk Liu
aafcafa0fa drm/amdgpu:new ids flag for preempt
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:59 -04:00
Baoyou Xie
d1936cc2fc drm/amdgpu: mark symbols static where possible
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/si.c:908:5: warning: no previous prototype for 'si_pciep_rreg' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/si.c:921:6: warning: no previous prototype for 'si_pciep_wreg' [-Wmissing-prototypes]

In fact, both functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:58 -04:00
Baoyou Xie
356aee305a drm/amdgpu: change function declarations and add missing header dependencies
We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c:38:6: warning: no previous prototype for 'amdgpu_atombios_crtc_overscan_setup' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c:661:6: warning: no previous prototype for 'dce_v8_0_disable_dce' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:40:5: warning: no previous prototype for 'amdgpu_gfx_scratch_get' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:62:6: warning: no previous prototype for 'amdgpu_gfx_scratch_free' [-Wmissing-prototypes]
....

In fact, these functions are declared in
drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
drivers/gpu/drm/amd/powerplay/inc/pp_acpi.h.
So this patch adds missing header dependencies.

By the way, this patch changes declaration of amdgpu_gfx_parse_disable_cu()
to subject to its implement, and clean three function declarations
in pp_acpi.h up.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:58 -04:00
Alex Deucher
f93932bcdc drm/amdgpu: s/amdgpuCrtc/amdgpu_crtc/ in pageflip code
Fix random CamelCase that has annoyed me for a while.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:57 -04:00
Alex Deucher
f1e68a7cf5 drm/amdgpu/atom: remove a bunch of unused functions
Leftovers from the radeon.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:56 -04:00
Alex Deucher
72a57438d1 drm/amdgpu: consolidate atom scratch reg handling for hangs
Move from asic specific code to common atom code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:56 -04:00
Alex Deucher
a76ed485c5 drm/amdgpu: use amdgpu_bo_[create|free]_kernel for wb
Rather than open coding it.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:55 -04:00
Christian König
9861470181 drm/amdgpu: add VCE VM session tracking
Fix the problems with killing VCE sessions in VM mode.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:55 -04:00
Christian König
45088efc85 drm/amdgpu: improve parse_cs handling a bit
This way we can use parse_cs and still keep VM mode enabled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:54 -04:00
Rex Zhu
5e876c62d8 drm/amdgpu: refine set power state logic for dpm.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:53 -04:00
Rex Zhu
8c8e2c30d2 drm/amdgpu: update current ps/requeset ps in adev with real ps.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:53 -04:00
Alex Deucher
6061789a45 drm/amdgpu: add an implement for check_power_state equal for KV
KV/KB/ML was missed these was implemented for other asics.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:52 -04:00
Rex Zhu
3411717501 drm/amdgpu: add an implement for check_power_state equal for Si.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:52 -04:00
Rex Zhu
73909a746a drm/amdgpu: add an implement for check_power_state equal for Cz.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:51 -04:00
Rex Zhu
1d516c41d9 drm/amdgpu: add an implement for check_power_state equal for CI
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:50 -04:00
Rex Zhu
fbebf2c6bc drm/amdgpu: add new callback to check power state info
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:50 -04:00
Rex Zhu
db82b67c57 drm/amdgpu: check min clock set by DAL before set ps.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:49 -04:00
Tom St Denis
74f3ce31e9 drm/amd/amdgpu: Put in rest of wave fields
Add the rest of the basic SQ WAVE fields to
finish off the implementation.  Eventually,
a separate interface will be needed for GPRs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:49 -04:00
Tom St Denis
472259f026 drm/amd/amdgpu: re-factor debugfs wave reader
Move IP version specific code into a callback.

Also add support for gfx7 devices.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:48 -04:00
Tom St Denis
394fdde256 drm/amd/amdgpu: Make debugfs write compliment read
Add PG lock support as well as bank selection to
the MMIO write function.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:47 -04:00
Tom St Denis
32977f93b4 drm/amd/amdgpu: Allow broadcast on debugfs read (v2)
Allow any of the se/sh/instance fields to be
specified as a broadcast by submitting 0x3FF.

(v2) Fix broadcast range checking

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:47 -04:00
Tom St Denis
5ecfb3b8fc drm/amd/amdgpu: Fix debugfs wave reader
On non VI/CZ platforms it would not free
the grbm index lock.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:46 -04:00
Tom St Denis
273d7aa13c drm/amd/amdgpu: Add wave reader to debugfs
Currently supports CZ/VI.  Allows nearly atomic read
of wave data from GPU.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:46 -04:00
Alex Deucher
a125510721 drm/amdgpu: rework IP block registration (v2)
This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables.  This also stored the status
information in the same structure.

v2: split out spelling fix into a separate patch
    add a function to add IPs to the list

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:45 -04:00
Alex Deucher
cf35c7ca3d drm/amdgpu/powerplay: fix spelling in amdgpu_powerplay.h
and update a comment as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:44 -04:00
Alex Deucher
623fea1868 drm/amdgpu/virtual_dce: move define into source file
It's not used outside the file.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:44 -04:00
Alex Deucher
2120df475d drm/amdgpu: enable virtual dce on SI
Add the proper IP module when requested.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:43 -04:00
Alex Deucher
07fecde5d3 drm/amdgpu: fill in vce clock info ioctl query (v2)
Returns the vce clock table for the user mode driver.
The user mode driver can fill this data into vce clock
data packet for optimal VCE DPM.

v2: update to the new API

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:43 -04:00
Alex Deucher
597be302f1 drm/amdgpu/powerplay: add an implementation for get_vce_clock_state (v3)
Used by the powerplay dpm code.

v2: update to the new API
v3: drop old include

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:42 -04:00
Alex Deucher
825cc9974d drm/amdgpu/dpm: add an implementation for get_vce_clock_state (v2)
Used by the non-powerplay dpm code.

v2: update to the new API

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:41 -04:00
Alex Deucher
230cf1ba72 drm/amdgpu/dpm: add new callback to fetch vce clock state (v2)
Will be used by the new info ioctl query.

v2: fetch a single state per request

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:41 -04:00
Alex Deucher
bbe8797476 drm/amdgpu: add info ioctl query for vce clock info (v3)
This is needed to set up the vce clock table in userspace
for proper VCE DPM.

v2: fix copy paste typo in comment
v3: track number of valid states

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:40 -04:00
Rex Zhu
66ba1afd85 drm/amdgpu: save number of vce states in dpm struct.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:40 -04:00
Rex Zhu
0d8de7ca0b drm/amdgpu: use same vce state definition in dpm and powerplay
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:39 -04:00
Alex Deucher
cf0978819c drm/amdgpu: move dpm related definitions to amdgpu_dpm.h
No intended functional change.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:38 -04:00
Christian König
7988714237 drm/amdgpu: move align_mask and nop into ring funcs as well (v2)
They are constant as well.

v2: update uvd and vce phys ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:38 -04:00
Christian König
21cd942e5c drm/amdgpu: move the ring type into the funcs structure (v2)
It's constant, so it doesn't make to much sense to keep it
with the variable data.

v2: update vce and uvd phys mode ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:37 -04:00
Christian König
e12f3d7a23 drm/amdgpu: move IB and frame size directly into the engine description
I should have suggested that on the initial patchset. This saves us a
few CPU cycles during CS and a bunch of loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Christian König
7bc6be825a drm/amdgpu: remove explicit NULL init for parse_cs
sed -i "/\.parse_cs = NULL,/d" drivers/gpu/drm/amd/amdgpu/*.c

That's just a leftover from radeon.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Christian König
e08c90a774 drm/amdgpu: remove 128 NOP hack from vm_flush v2
With the padding raised to 256 DW that shouldn't be needed any more.

v2: reduce estimation as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:35 -04:00