Commit Graph

28 Commits

Author SHA1 Message Date
Rob Herring
8dccafaa28 arm: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-20 00:37:54 +02:00
Rafał Miłecki
69d22c70ac ARM: dts: BCM5301X: Specify USB ports for each controller
Northstar has 3 controllers: OHCI and EHCI (each with 2 ports) and XHCI
(with just 1 port). Describe them in the DT. In future this will allow
to reference them as trigger sources.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-08-01 18:05:42 -07:00
Rafał Miłecki
23f1eca6d5 ARM: dts: BCM5301X: Specify MDIO bus in the DT
Northstar devices have MDIO bus that may contain various PHYs attached.
A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:35 -07:00
Rafał Miłecki
36c2cb1830 ARM: dts: BCM5301X: Add CPU thermal sensor and zone
This uses CPU thermal sensor available on every Northstar chipset to
monitor temperature. We don't have any cooling or throttling so only a
critical trip was added.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12 09:52:34 -07:00
Rafał Miłecki
5be82d0475 ARM: dts: BCM5301X: Specify serial console params in dtsi files
So far every Northstar device we have seen was using the same serial
console params (115200n8). It probably make the most sense to put it in
some proper dtsi files instead of repeating over and over for every
single device. As different boards may use different bootloaders it
seems the safest idea is to use board specific dtsi files.

Just in case some vendor decides to use different UART (parameters) this
can be always easily overwritten.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-22 09:48:24 -07:00
Jon Mason
bb097e3e00 ARM: dts: BCM5301X: Add I2C support to the DT
Add I2C support to the bcm5301x Device Tree.  Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-18 09:39:53 -07:00
Jon Mason
f22c635e58 ARM: dts: BCM5301X: Add TWD WD Support to DT
Add support for the ARM TWD Watchdog to the bcm5301x device tree.  The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that.  Also, the GIC masks were added for these.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-18 09:39:39 -07:00
Jon Mason
0e34079cd1 ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
GIC_PPI flags were misconfigured for the timers, resulting in errors
like:
[    0.000000] GIC: PPI11 is secure or misconfigured

Changing them to being edge triggered corrects the issue

Suggested-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-18 09:37:41 -07:00
Jon Mason
1c8f406507 ARM: dts: BCM5301X: convert to iProc QSPI
The iproc-qspi driver is the SPI driver that should be used going
forward.  Modify the SPI DT entry to use this driver, and add an entry
in the bcm953012k DTS file to enable the SPI.

Tested on the bcm953012k board.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-05 16:59:02 -08:00
Rafał Miłecki
5d1f2d2c25 ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000
Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets
two of them for 5 GHz band. Both seem the same and their firmwares
report the same set of channels. The problem is due to hardware / board
design there are extra limitations that should be respected.

First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be
used for U-NII-1. Using them in a different way may result in wireless
not working or in noticeably reduced performance. Basic version of this
info was provided by Broadcom employee, then it has been verified by me
using original vendor firmware (which has limitations hardcoded in UI).

This patch uses recently introduced ieee80211-freq-limit property to
describe these limitations at DT level.

Referencing PCIe devices in DT required specifying all related bridges.
Below you can see (a bit complex) PCI tree from R8000 that explains all
entries that I needed to put in DT.

0000:00:00.0		14e4:8012	Bridge Device
└─ 0000:01:00.0		14e4:aa52	Network Controller

0001:00:00.0		14e4:8012	Bridge Device
└─ 0001:01:00.0		10b5:8603	Bridge Device
   ├─ 0001:02:01.0	10b5:8603	Bridge Device
   │  └─ 0001:03:00.0	14e4:aa52	Network Controller
   ├─ 0001:02:02.0	10b5:8603	Bridge Device
   │  └─ 0001:04:00.0	14e4:aa52	Network Controller
   ├─ 0001:02:03.0	000d:0000	0x000000
   ├─ 0001:02:04.0	000d:0000	0x000000
   ├─ 0001:02:05.0	000d:0000	0x000000
   ├─ 0001:02:06.0	000d:0000	0x000000
   ├─ (...)
   ├─ 0001:02:1d.0	000d:0000	0x000000
   ├─ 0001:02:1e.0	000d:0000	0x000000
   └─ 0001:02:1f.0	000d:0000	0x000000

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-01-18 17:18:27 -08:00
Rafał Miłecki
0725c8421c ARM: dts: BCM5301X: Specify USB controllers in DT
There are 3 separated controllers, one per USB /standard/. With PHY
drivers in place they can be simply supported with generic drivers.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-01-18 17:17:48 -08:00
Rafał Miłecki
92b7b6ad1a ARM: BCM5301X: Specify USB 3.0 PHY in DT
Driver for Northstar USB 3.0 PHY has been recently added under the name
phy-bcm-ns-usb3. Add binding for it into the DT files.
The only slightly tricky part is BCM47094 which uses different PHY
version and requires different compatible value.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19 06:40:48 -07:00
Rafał Miłecki
2709d3932c ARM: BCM5301X: Specify PHY of USB 2.0 in DT
Driver for Northstar USB 2.0 PHY was added in 4.7-rc1 by:
commit d3feb40673 ("phy: bcm-ns-usb2: new driver for USB 2.0 PHY on
Northstar").
It should be used to let EHCI platform driver init PHY.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 11:06:30 -07:00
Florian Fainelli
36e55669eb ARM: dts: BCM5301x: Add RNG Device Tree node
Add the DT node for the random number generator peripheral.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-27 10:15:14 -07:00
Florian Fainelli
2cd0c0202f ARM: dts: BCM5301X: Add SRAB interrupts
Add interrupt mapping for the Switch Register Access Block. Only 12
interrupts are usable at the moment even though up to 32 are dedicated
to the SRAB.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-13 12:43:39 -07:00
Florian Fainelli
59f0ce1a3e ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
Add the Switch Register Access Block which is a special piece of
hardware allowing us to perform indirect read/writes towards the
integrated BCM5301X Ethernet switch.

We also add the 4 Gigabit MAC Device Tree nodes within the brcm,bus-axi
bus node to get proper binding between the BCMA instantiated core and
the Device Tree nodes. We will need that to be able to reference
Ethernet Device Tree nodes in a future patch adding the switch ports
layout.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-13 12:43:38 -07:00
Rafał Miłecki
1b47b98acc ARM: BCM5301X: Add DT entry for SPI controller and NOR flash
Controller is present on every BCM4708* board but only few devices have
serial flash attached so mark it as disabled by default.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-22 11:59:29 -07:00
Rafał Miłecki
5a6516ff13 ARM: BCM5301X: Enable earlycon on tested devices
This allows reporting & debugging problems occurring early in the boot
process.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13 09:18:03 -07:00
Rafał Miłecki
dd70ccfaa7 ARM: BCM5301X: Set vcc-gpio for USB controllers of few devices
There are few devices that have USB power controlled using GPIO. Linux
USB host driver (bcma-hcd) already supports this by reading vcc-gpio
from DT. Set it properly for all known devices.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13 09:18:01 -07:00
Jon Mason
cdc36b22f0 ARM: dts: enable clock support for BCM5301X
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-20 10:14:31 -08:00
Felix Fietkau
1ff8036352 ARM: BCM5301X: Add profiling support
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:17:24 +02:00
Hauke Mehrtens
db44f1342d ARM: BCM5301X: activate some additional options in pl310 cache controller
In the default Broadcom SDK the shared override is activated for this
cache controller, do the same in the upstream code. Data and
instruction prefetching is not activated by default for this cache
controller on the bcm53xx SoC, do it manually like it is done in the
vendor SDK.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:17:23 +02:00
Hauke Mehrtens
1f80de6863 ARM: BCM5301X: add IRQ numbers for PCIe controller
The driver for the PCIe controller was just added, this adds the
missing definition of the IRQ numbers to device tree. The driver itself
will be automatically detected by bcma.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-06-06 16:12:40 -07:00
Hauke Mehrtens
9faa5960ee ARM: BCM5301X: add NAND flash chip description
This adds the NAND flash chip description for a standard chip found
connected to this SoC. This makes use of generic Broadcom NAND driver
with the iProc interface.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-06-06 16:05:50 -07:00
Rafał Miłecki
f6f8234439 ARM: BCM5301X: Add buttons for Netgear R6250
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2014-12-04 20:57:58 +01:00
Hauke Mehrtens
dec378827c ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
IRQ support for Broadcom's bus-axi driver bcma was merged into John
Linville's wireless tree and will show up in 3.19. This patch makes use
of this feature in the DTS file for the the BCM5301X SoCs. I left the
PCIe controller out, because this still needs some discussion.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2014-12-01 22:47:33 +01:00
Rafał Miłecki
fb026d3de3 ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
This has been successfully tested on Netgear R6250 and two other
development (unnamed) devices, all of them BCM4708 based.
We also got a possitive feedback from R7000 (BCM4709) tester.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2014-11-27 22:30:32 +01:00
Hauke Mehrtens
d27509f19b ARM: BCM5301X: add dts files for BCM4708 SoC
This uses the newly added BCM5301X SoC code.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Christian Daudt <bcm@fixthebug.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
2014-02-19 09:15:59 -05:00