* RZ/G1C (r8a77470) SoC: Use r8a77470-cpg-mssr binding definitions
* Add GR-Peach audio camera shield support with MT9V111 image sensor
* Add initial support for RZ/N1D (r9a06g032) SoC and its RZN1D-DB board
* Use SPDX identifiers in DT for all SoCs and boards
* Add missing OPP properties for all CPUs on various SoCs
* Add missing PMIC nodes to R-Car Gen2 M2-W (r8a7791) based porter board
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Merge tag 'renesas-arm-dt-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.19
* RZ/G1C (r8a77470) SoC: Use r8a77470-cpg-mssr binding definitions
* Add GR-Peach audio camera shield support with MT9V111 image sensor
* Add initial support for RZ/N1D (r9a06g032) SoC and its RZN1D-DB board
* Use SPDX identifiers in DT for all SoCs and boards
* Add missing OPP properties for all CPUs on various SoCs
* Add missing PMIC nodes to R-Car Gen2 M2-W (r8a7791) based porter board
* tag 'renesas-arm-dt-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a77470: Use r8a77470-cpg-mssr binding definitions
ARM: dts: gr-peach: Add GR-Peach audiocamerashield support
ARM: dts: Renesas R9A06G032 SMP enable method
ARM: dts: Renesas RZN1D-DB Board base file
ARM: dts: Renesas R9A06G032 base device tree file
ARM: dts: convert to SPDX identifier for Renesas boards
ARM: dts: r8a77(43|9[013]): Add missing OPP properties for CPUs
ARM: dts: porter: Add missing PMIC nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Replace the hardcoded clock indices by R8A77470_CLK_* symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add device tree header for GR-Peach's audiocamerashield with MT9V111
image sensor.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a special enable method for the second CA7 of the R9A06G032
as well as the default value for the "cpu-release-addr" property.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds a base device tree file for the RZN1-DB board, with only the
basic support allowing the system to boot to a prompt. Only one UART is
used, with only a single CPU running.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds the Renesas R9A06G032 bare bone support.
This currently only handles the SYSCTRL block note,
generic parts (gic, architected timer) and a UART.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: updated MAINTAINERS file
[simon: do not use r9a06g032-sysctrl.h as it is not in the renesas tree yet]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing properties (like, clock latency, voltage tolerance,
etc) as well to make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Add device tree support for i.MX6SLL SoC.
- New board support: ConnectCore 6UL System-On-Module and SBC Express;
ZII SCU2 Mezz, SCU3 ESB, SSMB SPU3 and CFU1 board; i.MX6SLL EVK
board; Engicam i.CoreM6 1.5 Quad/Dual MIPI; LogicPD MX31Lite board;
i.MX53 HSC/DDC boards from K+P.
- Remove fake regulator bus container node and enable USB OTG support
for i.MX6 wandboard and riotboard.
- Populate RAVE SP EEPROM, backlight, power button and watchdog devices
for ZII boards.
- Add cooling-cells for cpufreq cooling device, and add OPP properties
for all CPUs.
- A series from Anson Huang to enable LCD panel and backlight support
for imx6sll-evk board.
- Make pfuze100 sw4 regulator always-on for for a few Freescale/NXP
development boards, because the regulator is critical there and
cannot be turned off.
- Add more device support for i.MX5: AIPSTZ, SAHARA Crypto, M4IF,
Tigerp, PMU, CodaHx4 VPU.
- Enable PMU secure-reg-access for imx51-babbage, imx51-zii-rdu1 and
imx53-ppd board.
- Switch more device tree license to use SPDX identifier.
- Switch to use OF graph to describe the display for imx7d-nitrogen7.
- Add chosen/stdout-path for more boards, so that earlycon can be
enabled more easily on kernel cmdline.
- Convert GPC to new device tree bindings and add Vivante gpu nodes
for i.MX6SL SoC.
- Add more device support for imx6dl-mamoj board: parallel display,
WiFi and USB.
- A series from Stefan Agner to update i.MX6 apalis/colibri boards on
various aspects: SD/MMC card detection, regulators, etc.
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Merge tag 'imx-dt-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.19:
- Add device tree support for i.MX6SLL SoC.
- New board support: ConnectCore 6UL System-On-Module and SBC Express;
ZII SCU2 Mezz, SCU3 ESB, SSMB SPU3 and CFU1 board; i.MX6SLL EVK
board; Engicam i.CoreM6 1.5 Quad/Dual MIPI; LogicPD MX31Lite board;
i.MX53 HSC/DDC boards from K+P.
- Remove fake regulator bus container node and enable USB OTG support
for i.MX6 wandboard and riotboard.
- Populate RAVE SP EEPROM, backlight, power button and watchdog devices
for ZII boards.
- Add cooling-cells for cpufreq cooling device, and add OPP properties
for all CPUs.
- A series from Anson Huang to enable LCD panel and backlight support
for imx6sll-evk board.
- Make pfuze100 sw4 regulator always-on for for a few Freescale/NXP
development boards, because the regulator is critical there and
cannot be turned off.
- Add more device support for i.MX5: AIPSTZ, SAHARA Crypto, M4IF,
Tigerp, PMU, CodaHx4 VPU.
- Enable PMU secure-reg-access for imx51-babbage, imx51-zii-rdu1 and
imx53-ppd board.
- Switch more device tree license to use SPDX identifier.
- Switch to use OF graph to describe the display for imx7d-nitrogen7.
- Add chosen/stdout-path for more boards, so that earlycon can be
enabled more easily on kernel cmdline.
- Convert GPC to new device tree bindings and add Vivante gpu nodes
for i.MX6SL SoC.
- Add more device support for imx6dl-mamoj board: parallel display,
WiFi and USB.
- A series from Stefan Agner to update i.MX6 apalis/colibri boards on
various aspects: SD/MMC card detection, regulators, etc.
* tag 'imx-dt-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (96 commits)
ARM: dts: imx7d: remove "operating-points" property for cpu1
ARM: dts: vf610-zii-ssmb-spu3: Fix W=1 level warnings
ARM: dts: vf610: Add ZII CFU1 board
ARM: dts: imx6dl-mamoj: Add usb host and device support
ARM: dts: imx6dl-mamoj: Add Wifi support
ARM: dts: imx6dl-mamoj: Add parallel display support
ARM: dts: vf610: Add ZII SSMB SPU3 board
ARM: dts: imx6ul-pico-hobbit: Do not hardcode the memory size
ARM: dts: imx6sl-evk: make pfuze100 sw4 always on
ARM: dts: imx6sll-evk: make pfuze100 sw4 always on
ARM: dts: imx6sx-sdb-reva: make pfuze100 sw4 always on
ARM: dts: imx6qdl-sabresd: make pfuze100 sw4 always on
ARM: dts: imx6sl-evk: add missing GPIO iomux setting
ARM: dts: imx51-zii-scu3-esb: Fix RAVE SP watchdog compatible string
ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
ARM: dts: imx6sx-nitrogen6sx: remove obsolete display configuration
ARM: dts: imx7d-nitrogen7: use OF graph to describe the display
ARM: dts: imx: Switch Boundary Devices boards to SPDX identifier
ARM: dts: imx6sl: Add vivante gpu nodes
ARM: dts: imx6sll-evk: enable SEIKO 43WVF1G lcdif panel
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
- fix the PMC compatibles
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Merge tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
AT91 DT for 4.19:
- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
- fix the PMC compatibles
* tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: fix typos for SSC TD functions
ARM: dts: add support for Laird SOM60 module and DVK boards
ARM: dts: add support for Gatwick board based on WB50N
ARM: dts: add support for Laird WB50N cpu module and DVK
ARM: dts: add support for Laird WB45N cpu module and DVK
ARM: dts: at91: add labels to soc dtsi for derivative boards
dt-bindings: add laird and giantec vendor prefix
ARM: dts: fix PMC compatible
ARM: at91: fix USB clock detection handling
dt-bindings: clk: at91: Document all the PMC compatibles
dt-bindings: arm: remove PMC bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing properties (clocks, clock latency) as well to
make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds dts files for two new beaglebone variants for
Octavo Systems OSD3358-SM-RED and Sancloud am335x-sancloud-bbe.
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Merge tag 'omap-for-v4.19/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Few more beaglebone variants for v4.19 merge window
This adds dts files for two new beaglebone variants for
Octavo Systems OSD3358-SM-RED and Sancloud am335x-sancloud-bbe.
* tag 'omap-for-v4.19/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: add am335x-sancloud-bbe board support
dt-bindings: Add vendor prefix for Sancloud
ARM: dts: Add DT support for Octavo Systems OSD3358-SM-RED based on TI AM335x
Signed-off-by: Olof Johansson <olof@lixom.net>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing property (clock latency) as well to make it all
work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix all nodes to use proper GIC_* macros for the interrupt type and the
interrupt trigger settings to avoid the boot warnings.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Commit b97872d4eb ("ARM: dts: imx: Add missing OPP properties for CPUs")
added "operating-points" property for all CPUs, but i.MX7D already has
"operating-points-v2" property on both CPUs, so no need to add
"operating-points" property again, this patch removes it.
Fixes: b97872d4eb ("ARM: dts: imx: Add missing OPP properties for CPUs")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix typo for TD function of pins PIN_PB22 and PIN_PC14
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add support for the LoRa gateway from Laird, the RG1xx.
This board houses the WB50NBT CPU module along with a Semtech SX1301 based
concentrator card.
https://www.lairdtech.com/products/rg1xx-lora-gateway
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds support for Lairds CPU module, featuring Atheros wifi, CSR
Bluetooth and, Atmel SAMA5D3 CPU.
https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds support for Lairds combo CPU module, featuring on board
Atheros wifi, CSR Bluetooth radio and, Atmel CPU.
https://www.lairdtech.com/products/wb45nbt
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary
The patch is removing these useless properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add an LED node, connected to the Processing System (PS)
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Include GPIO dt-bindings and use GPIO_ACTIVE_* constants
to improve readability
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
According to the reference manual, the board has two Micron
MT41K256M16HA-125 DDR3L memory ICs, which have 512 MiB each
Tested on a ZYBO-Z7-20 board
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Replace the current value of the model property by a more accurate
description of each board (which includes the manufacturer), as some
of the boards had the same value ("Xilinx Zynq")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both boards are made by Avnet, Inc. So add an additional
value to the compatible property
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a dts for MYIR Z-turn board and respective target in Makefile.
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds parallel display support for i.MX6DL Mamoj board
along with relevant backlight through pwm.
LCD power sequence is added by 'Michael Trimarchi'.
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:
* Gigabit capable PHY
* Extra USB hub, optional i2c control
* lps3331ap barometer connected over i2c
* MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
* 1GiB DDR3 RAM
* RTL8723 Wifi/Bluetooth connected over USB
Tested on a revision G board.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are two variants of imx6ul-pico boards: one with 256MB and
another one with 512MB of RAM.
Do not hardcode the memory size in the device tree and let the
bootloader fill the correct value instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SL EVK board, pfuze100 sw4 supplies
LPDDR2 which is critical for system, must be
always on.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SLL EVK board, pfuze100 sw4 supplies
LPDDR3 which is critical for system, must be
always on.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SX SDB Rev-A board, pfuze100 sw4 supplies
csi, audio codec and i2c etc., these modules do NOT
implement power domain control, so pfuze100 sw4
needs to be always on to make sure these modules
work normally.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6QDL Sabre-SD board, pfuze100 sw4 supplies
GPS, touch and RGMII etc., these modules do NOT
implement power domain control, so pfuze100 sw4
needs to be always on to make sure these modules
work normally.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OSD3358-SM-RED is a dev board for OSD335x System-in-Package(SiP) devices from
Octavo Systems.
This board family can be indentified by the A335BNLTOS00 in the at24 eeprom:
A2: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 4f 53 30 30 |.U3.A335BNLTOS00|]
https://octavosystems.com/octavo_products/osd3358-sm-red/
Signed-off-by: Neeraj Dantu <neeraj.dantu@octavosystems.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Robert Nelson <robertcnelson@gmail.com>
CC: Jason Kridner <jkridner@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On i.MX6SL EVK board, the MX6SL_PAD_KEY_ROW5 pin is
used as lcd 3v3 regulator control pin, need to make
sure MX6SL_PAD_KEY_ROW5 is muxed as GPIO function
for controlling lcd 3v3 regulator.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by; Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It looks like I made a nasty typo in the original patch which resulted
in missing watchdog device. Fix it.
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: cphealy@gmail.com
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
