Commit Graph

7 Commits

Author SHA1 Message Date
Thomas Gleixner
2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Alexandre Belloni
5c16ffa795 clk: at91: sckc: handle different RC startup time
The sama5d3 slow RC oscillator as a different startup time than all the
previous SoCs. Handle that using its own compatible.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 11:43:15 -07:00
Alexandre Belloni
45b5ec8498 clk: at91: modernize sckc binding
Remove the need for child nodes in the sckc binding and register the whole
sckc tree (3 clocks in total) from the sckc node.

DT backward compatibility is kept by looking for properties in child nodes
when they are not present in the sckc node.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 11:42:10 -07:00
Alexandre Belloni
4135b7f8d4 clk: at91: sckc: optimize boot time
Assume that if the oscillator is enabled (OSC32EN bit is present), the
delay has already elapsed as the bootloader probably waited for the
oscillator to settle. This could waste up to 1.2s.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 17:03:04 -07:00
Alexandre Belloni
4b13b6451a clk: at91: Add sama5d4 sckc support
Starting with sama5d4, the crystal oscillator is always enabled at startup
and the SCKC doesn't have an OSC32EN bit anymore.

Add support for that new controller.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 17:02:58 -07:00
Alexandre Belloni
ec187ef0ce clk: at91: move slow clock controller clocks to sckc.c
Move all clocks related to the slow clock controller to sckc.c. This avoids
extern definitions and allows to remove sckc.h

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
[sboyd@codeaurora.org: Mark some functions static]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-20 17:02:38 -07:00
Boris BREZILLON
80eded6ce8 clk: at91: add slow clks driver
AT91 slow clk is a clk multiplexer.

In some SoCs (sam9x5, sama5, sam9g45 families) this multiplexer can
choose among 2 sources: an internal RC oscillator circuit and an oscillator
using an external crystal.

In other Socs (sam9260 family) the multiplexer source is hardcoded with
the OSCSEL signal.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-07 18:27:45 +02:00