Commit Graph

3412 Commits

Author SHA1 Message Date
Arnd Bergmann
262c083d13 Berlin64 DT changes for v4.20
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Merge tag 'berlin64-dt-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin into next/dt

Berlin64 DT changes for v4.20

* tag 'berlin64-dt-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
  arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC
  dt-bindings: arm: syna: add support for the AS370 SoC
  dt-bindings: arm: move berlin binding documentation to syna.txt

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-28 12:37:18 +02:00
Rob Herring
09bae3b64c arm64: dts: lg: Fix SPI controller node names
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.

Cc: Chanho Min <chanho.min@lge.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-28 12:33:21 +02:00
Rob Herring
e9f0878c4b arm64: dts: amd: Fix SPI bus warnings
dtc has new checks for SPI buses. Fix the warnings in node names.

arch/arm64/boot/dts/amd/amd-overdrive.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'

Cc: Brijesh Singh <brijeshkumar.singh@amd.com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-28 12:32:51 +02:00
Jisheng Zhang
087682f5a7 arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC
Add initial dtsi file to support Synaptics AS370 SoC with quad
Cortex-A53 CPUs.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
2018-09-27 14:48:43 +08:00
Liviu Dudau
74cf77e8be arm64: dts: broadcom: Use the .dtb name in the rule, rather than .dts
Commit a7eb26392b ("arm64: dts: broadcom: Add reference to Compute
Module IO Board V3") adds the bcm2837-rpi-cm3-io3.dts file as a target
in the Makefile, rather than the .dtb name. This will skip the
generation of the .dtb file at compile time and will fail the dtbs_install
target.

Fixes: a7eb26392b ("arm64: dts: broadcom: Add reference to Compute Module IO Board V3")
Signed-off-by: Liviu Dudau <liviu@dudau.co.uk>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 11:49:51 -07:00
Olof Johansson
42724dd893 ARM64: DT: Hisilicon SoC DT updates for 4.20
- Add missing clocks for Hi6220
 - Switch to updated coresight bindings for Hi6220
 - Add DT bindings and support for Hi3670 SoC and HiKey970 board
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Merge tag 'hisi-arm64-dt-for-4.20' of git://github.com/hisilicon/linux-hisi into next/dt

ARM64: DT: Hisilicon SoC DT updates for 4.20

- Add missing clocks for Hi6220
- Switch to updated coresight bindings for Hi6220
- Add DT bindings and support for Hi3670 SoC and HiKey970 board

* tag 'hisi-arm64-dt-for-4.20' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: Add devicetree support for HiKey970 board
  dt-bindings: arm: hisilicon: Add binding for HiKey970 board
  arm64: dts: Add devicetree for Hisilicon Hi3670 SoC
  dt-bindings: arm: hisilicon: Add binding for Hi3670 SoC
  arm64: dts: hi6220: Update coresight bindings for hardware ports
  arm64: dts: hisilicon: Add missing clocks property for CPUs

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:37:47 -07:00
Olof Johansson
f240bd3b4b TI AM654 support for v4.20 merge window.
This branch adds changes for the Texas Instruments AM654 SoC. Included
 changes are:
 - Add uart nodes
 - Change address cells and size-cells of interconnect tfrom 1 to 2
 - Add secure proxy instance for main domain
 - Add DMSC support
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Merge tag 'am654-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into next/dt

TI AM654 support for v4.20 merge window.

This branch adds changes for the Texas Instruments AM654 SoC. Included
changes are:
- Add uart nodes
- Change address cells and size-cells of interconnect tfrom 1 to 2
- Add secure proxy instance for main domain
- Add DMSC support

* tag 'am654-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-am6: Add Device Management Security Controller support
  arm64: dts: ti: am654: Add secure proxy instance for main domain
  arm64: dts: ti: am654: Add uart nodes
  arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of interconnect to 2

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:31:04 -07:00
Olof Johansson
6302cbe759 ARMv8 Juno/Vexpress updates for v4.20
1. Enablement of scatter gather mode for CoreSight TMC-ETR routing
 
 2. Usage of updated coresight graph bindings that eliminates loads of
    dtc warnings
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Merge tag 'juno-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

ARMv8 Juno/Vexpress updates for v4.20

1. Enablement of scatter gather mode for CoreSight TMC-ETR routing

2. Usage of updated coresight graph bindings that eliminates loads of
   dtc warnings

* tag 'juno-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Enable coresight tmc scatter gather in ETR
  arm64: dts: juno: Update entries to match latest coresight bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:28:51 -07:00
Olof Johansson
b610209c5d This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.20, please pull the following:
 
 - Stefan provides a reference to the Compute Module IO Board V3 such
   that we can reference the arm counterpart and still build it for arm64
 
 - Rob fixes I2C and SPI bus warnings which are going to show up with his
   update to DTC scheduled for 4.20
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Merge tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into next/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.20, please pull the following:

- Stefan provides a reference to the Compute Module IO Board V3 such
  that we can reference the arm counterpart and still build it for arm64

- Rob fixes I2C and SPI bus warnings which are going to show up with his
  update to DTC scheduled for 4.20

* tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Fix I2C and SPI bus warnings
  arm64: dts: broadcom: Add reference to Compute Module IO Board V3

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:28:19 -07:00
Olof Johansson
68df1dba22 Amlogic ARM64 DT updates for v4.20
- AXG: cleanup/reorder nodes
 - AXG: add audio PDM support for s400 board
 - GX: increase CMA memory size
 - GX: new canvas driver
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Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Amlogic ARM64 DT updates for v4.20
- AXG: cleanup/reorder nodes
- AXG: add audio PDM support for s400 board
- GX: increase CMA memory size
- GX: new canvas driver

* tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson: Switch simple-mfd and syscon order
  arm64: dts: meson-axg-s400: Add chosen and memory nodes
  arm64: dts: meson-axg: use the proper compatible for ethmac
  arm64: dts: meson-axg: s400: add pdm to the sound card
  arm64: dts: meson-axg: s400: add dmic codec
  arm64: dts: meson-axg: add pdm
  arm64: dts: meson-gx: add dmcbus and canvas nodes.
  arm64: dts: meson: libretech: update board model
  arm64: dts: meson-gx: increase default shared CMA pool size
  arm64: dts: meson-axg: sort nodes consistently
  arm64: dts: meson-axg: s400: add sound card
  arm64: dts: meson-axg: s400: enable audio devices
  arm64: dts: meson-axg: add audio fifos

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:21:10 -07:00
Olof Johansson
923769f7b3 New soc support for the px30 quad-core Cortex-A35.
New boards are the px30 eval board and roc-rk3399-pc.
 The rk3328 got support for the one gpio controlled via the general
 register files and the rk3399 finally got its idle-states defined.
 And finally fixes and improvements for firefly-rk3399 (wifi),
 roc-rk3328-cc (sdmmc-uhs, io-domains), rk3328-rock64 (gpio-regulator
 pin fix) and rk3399-sapphire (gpio-regulator pin fix, pmic pin fix
 and type-c port supply).
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Merge tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

New soc support for the px30 quad-core Cortex-A35.
New boards are the px30 eval board and roc-rk3399-pc.
The rk3328 got support for the one gpio controlled via the general
register files and the rk3399 finally got its idle-states defined.
And finally fixes and improvements for firefly-rk3399 (wifi),
roc-rk3328-cc (sdmmc-uhs, io-domains), rk3328-rock64 (gpio-regulator
pin fix) and rk3399-sapphire (gpio-regulator pin fix, pmic pin fix
and type-c port supply).

* tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Add type-c port supply on rk3399-sapphire board
  arm64: dts: rockchip: fix vcc_host1_5v pin assign on rk3328-rock64
  arm64: dts: rockchip: add WiFi module support for Firefly-RK3399
  arm64: dts: rockchip: remove dvs2 pinctrl from pmic on rk3399-sapphire
  arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphire
  arm64: dts: rockchip: re-order vcc_sys on rk3399-sapphire
  arm64: dts: rockchip: add missing vop properties for px30
  arm64: dts: rockchip: Add idle-states to device tree for rk3399
  arm64: dts: rockchip: add sdmmc UHS support for roc-rk3328-cc
  arm64: dts: rockchip: add GRF GPIO controller to rk3328
  arm64: dts: rockchip: add io-domain to roc-rk3328-cc
  arm64: dts: rockchip: add PX30 evaluation board devicetree
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  dt-bindings: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add support for ROC-RK3399-PC board

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:20:06 -07:00
Olof Johansson
89cb3a4c97 Renesas ARM64 Based SoC DT Updates for v4.20
* Correct whitespace around assignments
 
 * R-Car Gen-3 SoCs:
   - Enable SDR104 for SD devices
   - Include R-Car product name in DTSI files to ease maintenance
 * R-Car Gen-3 SoC based boards: Convert to new LVDS DT bindings
 * R-Car Gen 3 Salvator-X and Salvator-XS boards:
   - Override secondary addresses of ADV748x to avoid address conflicts
 * R-Car Gen 3 based Salvator-XS board: Enable SATA
 
 * R-Car M3-N (r8a77965) SoC:
   - Add FDP1 device nodes
   - Move arm_cc630p and timer nodes to restore sort-order of file
   - Correct clock/reset for usb2_phy1
   - Correct HS-USB compat string
   - Add OPPs table for cpu devices enabling CPUFreq support
   - Add CAN device placeholder nodes to facilitate adding
     initial device tree for KF daughter board
   - Attach SYS-DMAC to the IPMMU
 * R-Car M3-N (r8a77965) based ULCB board:
   - Initial device tree for board and KF daughter board
 
 * R-Car E3 (r8a77990) SoC:
   - Add SYS-DMAC, I2C VIN, CSI-2, MSIOF device nodes
   - Add BRG support to SCIF2 which allows an increase in serial clock accuracy
   - Use CPG/MSSR and SYSC binding definitions
 * R-Car E3 (r8a77990) based Ebisu board: Enable PWM
 
 * R-Car D3 (r8a77995) SoC: Attach the SYS-DMAC to the IPMMU
 * R-Car D3 (r8a77995) based Draak board: Sort device nodes
 
 * R-Car V3H (r8a77980) based V3HSK board:
   - Move lvds0 node to restore sort-order of file
 * R-Car V3H (r8a77980) SoC:
   - Add RWDT, CSI2 and VIN, Cortex-A53 PMU nodes
   - Move IPMMU and CAN clock nodes to restore sort-order of file
 
 * R-Car V3M (r8a77970) SoC:
   - Add MMC nodes
   - Move CAN clock node to restore sort-order of file
 * R-Car V3M (r8a77970) based V3MSK board: Add eMMC support
 * R-Car V3H (r8a77980) based Condor board: Add PCIe, DU, LVDS and HDMI support
 
 * RZ/G2M (r8a774a1) SoC:
   - Initial device tree
   - Add SYS-DMAC, SCIF, HSCIF, INTC-EX, EtherAVB, RWDT, pinctl, GPIO,
     SDHI, I2C, IIC-DVFS, thermal, IPMMU, MSIOF, Cortex-A53 CPU core,
     PWM, Audio, FCPF, FCPV, USB2.0, USB-DMAC, HSUSB and USB3.0 device nodes
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Merge tag 'renesas-arm64-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM64 Based SoC DT Updates for v4.20

* Correct whitespace around assignments

* R-Car Gen-3 SoCs:
  - Enable SDR104 for SD devices
  - Include R-Car product name in DTSI files to ease maintenance
* R-Car Gen-3 SoC based boards: Convert to new LVDS DT bindings
* R-Car Gen 3 Salvator-X and Salvator-XS boards:
  - Override secondary addresses of ADV748x to avoid address conflicts
* R-Car Gen 3 based Salvator-XS board: Enable SATA

* R-Car M3-N (r8a77965) SoC:
  - Add FDP1 device nodes
  - Move arm_cc630p and timer nodes to restore sort-order of file
  - Correct clock/reset for usb2_phy1
  - Correct HS-USB compat string
  - Add OPPs table for cpu devices enabling CPUFreq support
  - Add CAN device placeholder nodes to facilitate adding
    initial device tree for KF daughter board
  - Attach SYS-DMAC to the IPMMU
* R-Car M3-N (r8a77965) based ULCB board:
  - Initial device tree for board and KF daughter board

* R-Car E3 (r8a77990) SoC:
  - Add SYS-DMAC, I2C VIN, CSI-2, MSIOF device nodes
  - Add BRG support to SCIF2 which allows an increase in serial clock accuracy
  - Use CPG/MSSR and SYSC binding definitions
* R-Car E3 (r8a77990) based Ebisu board: Enable PWM

* R-Car D3 (r8a77995) SoC: Attach the SYS-DMAC to the IPMMU
* R-Car D3 (r8a77995) based Draak board: Sort device nodes

* R-Car V3H (r8a77980) based V3HSK board:
  - Move lvds0 node to restore sort-order of file
* R-Car V3H (r8a77980) SoC:
  - Add RWDT, CSI2 and VIN, Cortex-A53 PMU nodes
  - Move IPMMU and CAN clock nodes to restore sort-order of file

* R-Car V3M (r8a77970) SoC:
  - Add MMC nodes
  - Move CAN clock node to restore sort-order of file
* R-Car V3M (r8a77970) based V3MSK board: Add eMMC support
* R-Car V3H (r8a77980) based Condor board: Add PCIe, DU, LVDS and HDMI support

* RZ/G2M (r8a774a1) SoC:
  - Initial device tree
  - Add SYS-DMAC, SCIF, HSCIF, INTC-EX, EtherAVB, RWDT, pinctl, GPIO,
    SDHI, I2C, IIC-DVFS, thermal, IPMMU, MSIOF, Cortex-A53 CPU core,
    PWM, Audio, FCPF, FCPV, USB2.0, USB-DMAC, HSUSB and USB3.0 device nodes

* tag 'renesas-arm64-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (58 commits)
  arm64: dts: r8a77965: add FDP1 device nodes
  arm64: dts: renesas: draak: Sort device nodes
  arm64: dts: renesas: enable SDR104 on R-Car Gen3
  arm64: dts: renesas: r8a77990: Add SYS-DMAC device nodes
  arm64: dts: renesas: r8a77990: Add I2C device nodes
  arm64: dts: renesas: r8a77990: Add VIN and CSI-2 device nodes
  arm64: dts: renesas: r8a77990: Add all MSIOF nodes
  arm64: dts: renesas: r8a7795: Move arm_cc630p node
  arm64: dts: renesas: r8a77990: Add BRG support to SCIF2
  arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitions
  arm64: dts: renesas: salvator-xs: Improve SATA switch settings comments
  arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1
  arm64: dts: renesas: r8a77965: Fix HS-USB compatible
  arm64: dts: renesas: r8a77965: Move timer node
  arm64: dts: renesas: v3hsk: Move lvds0 node
  arm64: dts: renesas: Fix whitespace around assignments
  arm64: dts: renesas: r8a77965: m3nulcb-kf: Initial device tree
  arm64: dts: renesas: condor: add PCIe support
  arm64: dts: renesas: r8a77980: add PCIe support
  arm64: dts: renesas: r8a774a1: Add USB3.0 device nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23 06:19:04 -07:00
Manivannan Sadhasivam
5510ee99c0 arm64: dts: Add devicetree support for HiKey970 board
Add devicetree support for HiKey970 development board which
based on Hi3670 SoC and is also one of the 96Boards Consumer
Edition and AI platform.

Only UART6 is enabled which is the default console required
by the 96Boards Consumer Edition Specification.

This patch has been tested on HiKey970 Board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19 16:15:25 +01:00
Manivannan Sadhasivam
dd8c7b78c1 arm64: dts: Add devicetree for Hisilicon Hi3670 SoC
Add initial devicetree support for Hisilicon Hi3670 SoC which
is similar to Hi3660 SoC with NPU support.

This SoC has Octal core BigLittle CPUs in two clusters(4 * A53 & 4 * A73).

Only UART6 has been added for console support which is
pre configured by the bootloader. A fixed clock is sourcing
the UART6 which will get replaced by the clock driver when available.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19 16:14:36 +01:00
Suzuki K Poulose
e917b9432d arm64: dts: hi6220: Update coresight bindings for hardware ports
Switch to updated coresight bindings for hw ports.

Cc: xuwei5@hisilicon.com
Cc: lipengcheng8@huawei.com
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19 16:06:02 +01:00
Viresh Kumar
b27dedf551 arm64: dts: hisilicon: Add missing clocks property for CPUs
The clocks property should either be present for all the CPUs of a
cluster or none. If these are present only for a subset of CPUs of a
cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.

Add missing clocks property.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19 15:54:05 +01:00
Nishanth Menon
42e54f6467 arm64: dts: ti: k3-am6: Add Device Management Security Controller support
Add TISCI compatible System controller for AM6 SoCs.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18 18:25:06 +03:00
Nishanth Menon
77ccbae4f9 arm64: dts: ti: am654: Add secure proxy instance for main domain
Add secure proxy instance for Main domain

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18 18:25:06 +03:00
Nishanth Menon
4201af2544 arm64: dts: ti: am654: Add uart nodes
Add uart nodes for AM654 device tree components.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18 18:25:06 +03:00
Kishon Vijay Abraham I
3bc1572068 arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of interconnect to 2
AM65 has two PCIe controllers and each PCIe controller has '2' address
spaces one within the 4GB address space of the SoC and the other above
the 4GB address space of the SoC (cbass_main) in addition to the
register space. The size of the address space above the 4GB SoC address
space is 4GB. These address ranges will be used by CPU/DMA to access
the PCIe address space. In order to represent the address space above
the 4GB SoC address space and to represent the size of this address
space as 4GB, change address-cells and size-cells of interconnect to 2.

Since OSPI has similar need in MCU Domain Memory Map, change
address-cells and size-cells of cbass_mcu interconnect also to 2.

Fixes: ea47eed33a ("arm64: dts: ti: Add Support for AM654 SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vignesh R <vigneshr@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18 18:25:06 +03:00
Rob Herring
7cdbe45da1 arm64: dts: broadcom: Fix I2C and SPI bus warnings
dtc has new checks for I2C and SPI buses. Fix the warnings in node names
and unit-addresses.

arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (i2c_bus_reg): /hsls/i2c@e0000/pcf8574@20: I2C bus unit address format error, expected "27"
arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dtb: Warning (i2c_bus_reg): /hsls/i2c@e0000/pcf8574@20: I2C bus unit address format error, expected "27"
arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (spi_bus_bridge): /hsls/ssp@180000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (spi_bus_bridge): /hsls/ssp@190000: node name for SPI buses should be 'spi'

Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Jon Mason <jonmason@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-09-13 15:05:47 -07:00
Neil Armstrong
445f2bda35 arm64: dts: meson: Switch simple-mfd and syscon order
The order between "syscon" and "simple-mfd" is important because in these
particular cases, the node needs to be first a "simple-mfd" to expose
it's sub-nodes, and later on a "syscon" to permit other nodes to access
this register space through the "syscon" mechanism.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-13 09:16:36 -07:00
Hoan Nguyen An
450d6079e8 arm64: dts: r8a77965: add FDP1 device nodes
The r8a77965 has a single FDP1 instance.

Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:48:13 +02:00
Geert Uytterhoeven
7acc17b1a3 arm64: dts: renesas: draak: Sort device nodes
- Device nodes with unit addresses are sorted by unit address,
  - Device nodes without unit addresses and references are sorted
    alphabetically.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:48:12 +02:00
Wolfram Sang
9bc03b5727 arm64: dts: renesas: enable SDR104 on R-Car Gen3
Successfully tested on H3 ES1.0 and ES2.0, M3-W ES1.0, and M3-N ES1.0.
Even previously stubborn cards work fine. Transfer rates were >60MB/s.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:48:11 +02:00
Takeshi Kihara
3943e8967a arm64: dts: renesas: r8a77990: Add SYS-DMAC device nodes
This patch adds SYS-DMAC{0,1,2} device nodes for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:48:10 +02:00
Takeshi Kihara
bc011dfa30 arm64: dts: renesas: r8a77990: Add I2C device nodes
Add device nodes for I2C ch[0-7] to R-Car E3 R8A77990 device tree.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:48:06 +02:00
Koji Matsuoka
ec70407ae7 arm64: dts: renesas: r8a77990: Add VIN and CSI-2 device nodes
Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[simon: sorted nodes by bus address, then IP block]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:48:00 +02:00
Geert Uytterhoeven
4b7e3ab191 arm64: dts: renesas: r8a77990: Add all MSIOF nodes
Add the device nodes for all MSIOF SPI controllers, incl. clocks, power
domains, and resets properties.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:58 +02:00
Geert Uytterhoeven
8db067d553 arm64: dts: renesas: r8a7795: Move arm_cc630p node
To preserve by-address-per-group sort order.

Fixes: 0f6d237caf ("arm64: dts: renesas: r8a7795: add ccree to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:57 +02:00
Takeshi Kihara
103db9b539 arm64: dts: renesas: r8a77990: Add BRG support to SCIF2
Add the device node for the external SCIF_CLK, and describe the clock
inputs for the Baud Rate Generator for External Clock (BRG) for SCIF2,
which can increase serial clock accuracy.

The presence of the SCIF_CLK crystal and its clock frequency depend on
the actual board.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Enhance patch description]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:56 +02:00
Geert Uytterhoeven
83e7d2ec0d arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitions
Use the SoC-specific CPG/MSSR include file to allow future use of
R8A77990_CLK_* symbols.
Replace the hardcoded power domain indices by R8A77990_PD_* symbols.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:55 +02:00
Geert Uytterhoeven
48e1f50bd6 arm64: dts: renesas: salvator-xs: Improve SATA switch settings comments
The comments describing the non-default switch settings to use SATA are
confusing: 'Off' refers to the switch position, not to the MD12 logic
value, while the parentheses suggest otherwise.  Rephrase to fix this.

Fixes: bec000784d5bb571 ("arm64: dts: renesas: salvator-xs: enable SATA")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:53 +02:00
Geert Uytterhoeven
7a590fe317 arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1
usb2_phy1 accidentally uses the same clock/reset as usb2_phy0.

Fixes: b5857630a8 ("arm64: dts: renesas: r8a77965: add usb2_phy nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:52 +02:00
Geert Uytterhoeven
99584d93e3 arm64: dts: renesas: r8a77965: Fix HS-USB compatible
Should be "renesas,usbhs-r8a77965", not "renesas,usbhs-r8a7796".

Fixes: a06e8af801 ("arm64: dts: renesas: r8a77965: add HS-USB node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:51 +02:00
Geert Uytterhoeven
ff55027185 arm64: dts: renesas: r8a77965: Move timer node
To preserve alphabetical sort order.

Fixes: 4c529600ee ("arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:50 +02:00
Geert Uytterhoeven
47d7f68228 arm64: dts: renesas: v3hsk: Move lvds0 node
To preserve alphabetical sort order.

Fixes: 4edac426aff11a37 ("arm64: dts: renesas: condor/v3hsk: add DU/LVDS/HDMI support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:48 +02:00
Geert Uytterhoeven
fced3a97f8 arm64: dts: renesas: Fix whitespace around assignments
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: updated for a few new cases]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:47 +02:00
Eugeniu Rosca
c41fc11850 arm64: dts: renesas: r8a77965: m3nulcb-kf: Initial device tree
This is based on the existing KF device tree sources:
$ ls -1 arch/arm64/boot/dts/renesas/*-kf.dts
arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:46 +02:00
Sergei Shtylyov
c6eb20473f arm64: dts: renesas: condor: add PCIe support
Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor
board.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:45 +02:00
Sergei Shtylyov
ffa967e24c arm64: dts: renesas: r8a77980: add PCIe support
Describe the PCIe PHY, PCIEC, and PCIe bus clock in the R8A77980 device
tree.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:44 +02:00
Biju Das
453240f665 arm64: dts: renesas: r8a774a1: Add USB3.0 device nodes
Add usb3.0 phy, host and function device nodes on RZ/G2M SoC dtsi.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:43 +02:00
Biju Das
ed898d4fc1 arm64: dts: renesas: r8a774a1: Add USB-DMAC and HSUSB device nodes
Add usb dmac and hsusb device nodes on RZ/G2M SoC dtsi.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:41 +02:00
Biju Das
4c2c2fb998 arm64: dts: renesas: r8a774a1: Add USB2.0 phy and host(EHCI/OHCI) device nodes
Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2M SoC dtsi.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:40 +02:00
Fabrizio Castro
282419526a arm64: dts: renesas: r8a774a1: Add FCPF and FCPV instances
Add FCPF and FCPV instances to the r8a774a1 dtsi, similarly
to what was done for the r8a7796 with commit 41dbbf0c5b
("arm64: dts: r8a7796: Add FCPF and FCPV instances"),
commit 69490bc966 ("arm64: dts: renesas: r8a7796: Point
FDP1 via FCPF to IPMMU-VI0"), and commit cef942d0bd ("arm64:
dts: renesas: r8a7796: Point VSPI via FCPVI to IPMMU-VC0").

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:39 +02:00
Biju Das
e2f04248fc arm64: dts: renesas: r8a774a1: Add audio support
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1).

This work is based on similar work done on the R8A7796 SoC
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:38 +02:00
Fabrizio Castro
9567a85668 arm64: dts: renesas: r8a774a1: Add PWM device nodes
This patch adds PWM[0123456] device nodes to the RZ/G2M (a.k.a R8A774A1)
device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:37 +02:00
Biju Das
09f49bcf6f arm64: dts: renesas: r8a774a1: Add Cortex-A53 CPU cores
This patch adds definitions for L2 cache for the Cortex-A53 CPU
cores (512 KiB in size, organized as 32 KiB x 16 ways), adds
Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57
+ 4 x Cortex-A53), and finally enables the performance monitor
unit for the Cortex-A53 cores on the R8A774A1 SoC.

Based on work done for r8a7796 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:36 +02:00
Biju Das
c512110d64 arm64: dts: renesas: r8a774a1: Add all MSIOF nodes
Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC.

Based on several similar patches of the R8A7796 device tree
by Geert Uytterhoeven <geert+renesas@glider.be>
and Simon Horman <horms+renesas@verge.net.au>.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:35 +02:00
Fabrizio Castro
8f507babc6 arm64: dts: renesas: r8a774a1: Add IPMMU device nodes
Add r8a774a1 IPMMU nodes.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13 09:47:33 +02:00