Our usual bunch of DT patches for the Allwinner arm32 SoCs.
The most notable changes are:
- Support for the video decoding / encoding engine on the
A10s/A13/A20/A33
- IR support for the A83t
- SATA support for the R40
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluvkSIACgkQ0rTAlCFN
r3Snkw/9FtNLppZKqT2l5NdU7eRE2nUGNvBBh1Dgw2lIlWyzpffjsdMBzZRGahTT
wK/uZwvrLmdtb2WKWCnEJ4k2Vrp3nPGGNlOdonsf9I5CqR/Cl88Z6HPIdEI1FwMC
bNgrC8LENP+zsDPjMZkgOJ/JBlOmPco9l42mC8c2kfLtSiKdiQWNZ88oPgCoiRbJ
VCWnxnxU7pQkX10yj/aIu1bhcFgxLYa1M2C0rj4AkxIdWChVaDZxiDCncuSIqcHt
7a4NchkBXOZeqYY2Dz3ppdxFnQWOhvR0qQJjHzVcGdKNDKurNv0Ud6Mq2v4+Doo9
gJUKGy0PcbvMwm3spOK/CdcW+c3IfO2bJaOz36mE3S3d6a78Ku7UeIc2GnlL9zfx
EYsowLaERm3213ZsbXWB07vfOxoJtk7cmCRIdnuk2S9sFaTZzB65/x+0lNCdxAbL
6Pc4/ZBYVp596T2fGjjnPho6bx9SQ2+ybz9/epEHVRTBYja2zIfJ/Pw4D8ofxDBR
bDZznX3EmE4L1m1w6FaDQzDsoQNv6pS/fiTfsXD35OnzNY0KplbFfcOCZQpF31Mi
7s6iADszYEcefXOwmuIekG5Zw2qcCt4sNkWu/U0hjPXf3TVMnaImPce5K6PBXJHt
zu9DabmboEHicazYPlvJflWD9gkbM5lHdNGAmqWVm/eQ7IDH0Z8=
=vyaf
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.20
Our usual bunch of DT patches for the Allwinner arm32 SoCs.
The most notable changes are:
- Support for the video decoding / encoding engine on the
A10s/A13/A20/A33
- IR support for the A83t
- SATA support for the R40
* tag 'sunxi-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun9i: Fix I2C bus warnings
ARM: dts: sunxi: Fix I2C bus warnings
ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodes
ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes
ARM: dts: sun5i: Add Video Engine and reserved memory nodes
ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI
ARM: dts: sun8i: r40: add sata node
ARM: dts: sunxi: Don't use cd-inverted in sun8i-r40-bananapi-m2-ultra
ARM: dts: sun8i: a83t: bananapi-m3: Enable IR controller
ARM: dts: sun8i: a83t: Add support for the cir interface
ARM: dts: sun8i: a83t: Add the cir pin for the A83T
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is our usual H3/H5 pull request
The most notable changes are:
- the video decoding / encoding unit is finally enabled on the H3
- Mali support for the H5
- New boards: BananaPi M2+ v1.2, Orange Pi Zero Plus 2 H3 support
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAluvhigACgkQ0rTAlCFN
r3SHzA/+IsYaAQgvy8NE7Ok1rhy/OU7eLPjd2JVqBgJ6SwCkcM4eW7Zol6SoMawG
Wt9Bh+1JFvyzi4GiftwL/rPzOh2rxjuuDZMmLo5sZBztTLoFmKv9XIYgjnv8kVJY
WXQ5Z3BOKA0H6lyIw6jinS6uotTGiWhtvihOpoAeus8pHJ/AWo3lbntb0tdPob7b
fA95Dsm5ddqhPonrkqq1WEJ+Yepetoa7m2U2dJLOUHPaX8AmIm4GgQNoA6MEVYRJ
0sZ/FDhe+5yvDRKbebVRrlqITGgwEYuTPYO1zQEQleQo6SPEvJuUOo+CW5R3Pgqc
sKk5UxohaAvxbATt5gYhqTl4GwSKkMrNdJroVTc3bf8CekwxgpnNoV2nszGQSrjH
yU2Nwy0d2ok4ZacxoFBjosbGWYh2UuqAlv7lX/UPr79GbeJpA9IUDXQxBGJoodTH
0Wy3rUSgAUU/nRfsaDZtkLqIB8/keiSZzWV97aCnIUGHWk00MfnB8nzhkU1YEel0
8Lbqh+9NY4+P3Ps4UxsnOIL0LQZt2Twf738GF/boa4RftYQOUJJQmvNO8TpFL0OK
VKe10hX0trfsNOv2Ws7oTsGrLZXqLsB8r6jjsSX84NR2Dft2CYj8s7u2lpnmFTxd
ciBjzeyFb4TbYW2iYOsYLRaei0w8GSNMdHShNU04fO/zh1dP8lU=
=AJmQ
-----END PGP SIGNATURE-----
Merge tag 'sunxi-h3-h5-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 and H5 DT additions for 4.20
This is our usual H3/H5 pull request
The most notable changes are:
- the video decoding / encoding unit is finally enabled on the H3
- Mali support for the H5
- New boards: BananaPi M2+ v1.2, Orange Pi Zero Plus 2 H3 support
* tag 'sunxi-h3-h5-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees
ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes
arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5
ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus
ARM: dts: sun8i: h3: bpi-m2-plus: Fix address for external RGMII Ethernet PHY
ARM: dts: sun8i: h3-h5: ir register size should be the whole memory block
arm64: dts: allwinner: h5: Add device node for Mali-450 GPU
ARM: dts: sun8i: Add initial Orangepi Zero Plus 2 H3 support
nvmem: sunxi-sid: add support for H5's SID controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bananapi released an updated revision of the H3/H5 based Bananapi M2+.
Version 1.2 enables voltage control for the CPU's regulator by using
a GPIO line to toggle a MOSFET that can change the effective resistance
value in the regulator's feedback network.
This patch adds a common .dtsi file for this new revision, which
includes the original common sunxi-bananapi-m2-plus.dtsi file, and
adds the GPIO-controlled regulator and a cpu-supply reference. H3
and H5 variant dts files are added as well.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This adds nodes for the Video Engine and the associated reserved memory
for the H3. Up to 96 MiB of memory are dedicated to the CMA pool.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Three more variants of the Bananapi M2 Plus have been introduced. One
with the H5 instead of the H3, another with the H2+ instead, and the
last with the H3 but with WiFi and eMMC removed.
All these variants use the same board. This patch splits out the
non-SoC-specific parts of the device tree, so that they can be shared
among all the variants. The original Bananapi M2 Plus has been renamed
to Bananapi M2 Plus H3.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The external RTL8211E RGMII Ethernet PHY is configured via external
resistors to use the address 0x1. The 0x0 address is a broadcast address
for this family of PHYs, and should not be used explicitly.
Fixes: 8c7ba536e7 ("ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i")
Fixes: 4904337fe3 ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The size of the register should be the size of the whole memory block,
not just the registers, that are needed.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Orangepi Zero Plus 2 is an open-source single-board computer, available in two
Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the
H5 is already supported by sun50i-h5-orangepi-zero-plus2.dts.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* RZ/G1M (r8a7743) based iWave G20D-Q7 board and camera daughter board
- Move PCIe node out of common dtsi to allow reuse of the common dtsi
on the iWave RZ/G1N board
* RZ/G1C (r8a77470) SoC: Add I2C4, SDHI2 and SMP support
* R-Car Gen1 based boards and R-Car Gen2 SoCs:
- Enhance top-of-file comments to include SoC name
* RZ/N1D (r9a06g032) SoC:
- Correct UART0 description and add all other UARTs
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlut51oACgkQ189kaWo3
T77BKg//fhxvkarcATUM+l5hImWpPqAs2J6/+ymR2tsmY6ei8mWlKKdqHP5TCQUe
nYev93hjOP+MUmMv5Wlgz3Ql6BPyci0nzNGGp53EgADB8ku8olFDXPxykhi3InXc
MYndvUK/hTMdxP20B0Z+ALbfCWccBO7CnT2La+hHS2IkMGHwiOmYj+rXYneX29yA
vUgDY7tzg4qHHUjzWpaCtZxo7P3sD1HPFF5dxel6k8ua2gmYIhZ2NEUQTCBofMSl
186C6KN6x8YnAR3goWf4a1JgzPBlX5U8NZXBOiPgxl8kbxJniXLWtGFs323BK8Sz
09ilSM4w//HWxDK8n9LxIxzMyrMiXblQA4JPdp1q913f6xePryEEYbV2/tPI0XMM
iCnZNfkjqUE5ykADcQmNiWrZTbwxFvpT2L8YW1xspQK8yOEgy9yN/Y12Y7yWQ7jy
dbEVIcxsEm4ccTOed8v5u5SILxujMLhpwUgSvUBIVIPrxAbiO/b/AckykloXX4ej
TbNHig0TnurnDx0XBMDYcOrVnIEtNycEOiU/Dxp+uk5TxjXnTdcEMh7oCNemjm0r
ybU56U0XrMNzjVcEwLR44wCp8TPOqL4lvEXuOAgrN0biyaUWInq5NrSlHKJT667R
7zNtd/TVONUKVZm/xF7p6JGRSlazb9lDkVl9iCO8MBCvPZhGd9Q=
=xv5S
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt2-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.20
* RZ/G1M (r8a7743) based iWave G20D-Q7 board and camera daughter board
- Move PCIe node out of common dtsi to allow reuse of the common dtsi
on the iWave RZ/G1N board
* RZ/G1C (r8a77470) SoC: Add I2C4, SDHI2 and SMP support
* R-Car Gen1 based boards and R-Car Gen2 SoCs:
- Enhance top-of-file comments to include SoC name
* RZ/N1D (r9a06g032) SoC:
- Correct UART0 description and add all other UARTs
* tag 'renesas-arm-dt2-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: iwg20d-q7-common: Move pciec node out of common dtsi
ARM: dts: r8a77470: Add I2C4 support
ARM: dts: r8a77470: Add SDHI2 support
ARM: dts: r8a77470: Add SMP support
ARM: dts: R-Car Gen1 board comment update
ARM: dts: Include R-Car Gen2 product name in DTSI files
ARM: dts: r9a06g032: Correct UART and add all other UARTs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- fix clock controller register sizes
- new board: Endless Mini (EC-100) by Endless Mobile
- add voltage regulators
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlurT/EACgkQWTcYmtP7
xmXSGA/+PW0Z0oflNIoqwdqy5MIJ53pQjLvNzL7lzWa/l8pYFRyBC5TIatJrOUOL
QwtSnhiCH2nylzlXUwEgWhLq2Zrn/Z9NDNe3lf73alzugAnEwQ9Jzbl3TdQs4Zzu
n8hU/p8BKKkNRXdkjdu+DCd71x6lzt40oVCbQuFqLzFkE/a12GrY98OWmnAG4LWA
muP//fuIKTHd2eosRmVs2vmK3uHOq/JZUaIZJCpNC3SlIM00P5EGzLhQ+2ZoVXfm
FvSFXiSbq6E9lybrTT+exZOdR3S5tcLR+dxzMhcTksz/Ng7euQONfgTew9+UE0ko
ikZwf9KgqWih/eVX7Ut6nwOdhXHMgkw2kIf79qE93Hqt+17eCqcQY9GD5Hqk4Q6S
gDmihGZeUQKg9h0MIrqSBANryx/2TwYpVZORHDeEvT7PENgeDwN7X245fyaz+YkS
xOMPpleQXSgE9iZC+LpRcTOxjo5OuxUzaRBqRp7TTwJnZVr5+KILO58/noSFZl/P
EkzIPIpqQFaEo+mrdypkZ5LOYpfvGMUMWqyhgnFjMqmDCg2yLUEkiWbb/FX1Gb5w
DzLQ7+1ODmsnjoxuOKOTNHX/OPKmSK9ZscZJyZIXxRw8ZP6qPIyIk8AxSWojaqhB
obSMTof8gO5FH5G+wjOzZrDA/0bgtLf0Rsoo5CoieKTsY8OX5o0=
=U6kf
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
ARM: dts: Amlogic updates for v4.20
- fix clock controller register sizes
- new board: Endless Mini (EC-100) by Endless Mobile
- add voltage regulators
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: add stdout-path property
ARM: dts: meson8b: odroidc1: enable the SAR ADC
ARM: dts: meson8b: odroidc1: add the fixed voltage regulators
ARM: dts: meson8b: odroidc1: add the CPU voltage regulator
ARM: dts: meson8b: Add support for the Endless Mini (EC-100)
ARM: dts: meson8b: add the RMII pins
ARM: dts: meson8b: add the I2C_A, PWM_C and UART_B pins
dt-bindings: arm: amlogic: Add the Endless Mobile Endless Mini (EC-100)
dt-bindings: add vendor prefix for "Endless Mobile, Inc."
ARM: dts: meson8b: fix the clock controller register size
ARM: dts: meson8: fix the clock controller register size
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
PCIe is not populated by default on iWave RZ/G1N board. RZ/G1N board
is almost identical to RZ/G1M. In order to reuse the common dtsi for
both the boards, it is required to move pcie node from common dtsi
to board specific dts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SoC specific device tree definitions for the SDHI2 interface.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Include R-Car Gen1 product names for Bock-W and Marzen.
The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve the user friendliness of the DTS code base by including the
R-Car product name in each R-Car Gen2 DTSI file.
The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The power key is controlled solely by the EC, which only tiggeres this
gpio after wakeup.
Fixes immediately return to suspend after wake from LP1.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix indentation and alignment when spaces were used instead of tabs.
This fixes checkpatch errors like:
ERROR: code indent should use tabs where possible
#306: FILE: arch/arm/boot/dts/tegra20-paz00.dts:306:
+^I^I <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;$
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add an evaluation board device tree more in-line with all our other
device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename ac97 label to tegra_ac97 to be more in-line with the device tree
binding documentation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename tps6586x@34 to pmic@34 and drop the unused pmic label.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename i2c_ddc to hdmi_ddc to be more in-line with other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Simplify model and compatible by dropping the 256/512 MB from the model,
-512 from the compatible and rename that property from toradex,iris to
toradex,colibri_t20-iris to be more in-line with all our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Simplify model and compatible by dropping the 256/512 MB from the model
and -512 from the compatible properties to be more in-line with all our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate the SD card, its detect pin and move the SD card detect GPIO
definition from the module to the carrier board more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE
register of the TPS658643 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename and annotate LM95245 temperature sensor more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add dr_mode property to the USB controller.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Update sound nvidia,model to be more in-line with our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
