Commit Graph

115 Commits

Author SHA1 Message Date
John Crispin
5b4500d194 MIPS: ralink: make early_printk work on RT2880
RT2880 has a different location for the early serial port.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5170/
2013-05-08 01:19:08 +02:00
John Crispin
2947382294 MIPS: ralink: add missing comment in irq driver
Trivial patch that adds a comment that makes the code more readable.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5168/
2013-05-08 01:19:08 +02:00
John Crispin
6ac8579b96 MIPS: ralink: fix RT305x clock setup
Add a few missing clocks.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5167/
2013-05-08 01:19:08 +02:00
Gabor Juhos
48b4aba7a8 MIPS: ralink: add PCI IRQ handling
The Ralink IRQ code was not handling the PCI IRQ yet. Add this functionaility
to make PCI work on rt3883.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5165/
2013-05-08 01:19:07 +02:00
Gabor Juhos
d3d2b4200b MIPS: ralink: add CPU interrupt controller to of_irq_ids
Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF
mappings.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4900/
2013-02-17 01:25:34 +01:00
John Crispin
ae2b5bb657 MIPS: ralink: adds Kbuild files
Add the Kbuild symbols and Makefiles needed to actually build the ralink code
from this series

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4899/
2013-02-17 01:25:32 +01:00
John Crispin
5644da4f63 MIPS: ralink: adds rt305x devicetree
This adds the devicetree file that describes the rt305x evaluation kit.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4898/
2013-02-17 01:25:32 +01:00
John Crispin
2809b31770 MIPS: ralink: adds support for RT305x SoC family
Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4896/
2013-02-17 01:25:31 +01:00
John Crispin
5fff610b7c MIPS: ralink: adds early_printk support
Add the code needed to make early printk work.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4897/
2013-02-17 01:25:31 +01:00
John Crispin
3a5bfe7bdb MIPS: ralink: adds OF code
Until there is a generic MIPS way of handing the DTB over from bootloader to
kernel we rely on a built in devicetrees. The OF code also remaps those register
ranges that we use global in our drivers.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4895/
2013-02-17 01:25:31 +01:00
John Crispin
3f0a06b036 MIPS: ralink: adds clkdev code
These SoCs have a limited number of fixed rate clocks. Add support for the
clk and clkdev api.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4894/
2013-02-17 01:25:30 +01:00
John Crispin
7e47cefa69 MIPS: ralink: adds prom and cmdline code
Add minimal code to handle commandlines.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4892/
2013-02-17 01:25:30 +01:00
John Crispin
c06e836ada MIPS: ralink: adds reset code
Resetting these SoCs requires no real magic. The code is straight forward.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4891/
2013-02-17 01:25:29 +01:00
John Crispin
19d3814e7b MIPS: ralink: adds irq code
All of the Ralink Wifi SoC currently supported by this series share the same
interrupt controller (INTC).

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4890/
2013-02-17 01:25:29 +01:00
John Crispin
8563991026 MIPS: ralink: adds include files
Before we start adding the platform code we add the common include files.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4893/
2013-02-17 01:25:28 +01:00