Commit Graph

14 Commits

Author SHA1 Message Date
Masahiro Yamada
7b8330d28c ARM: dts: uniphier: fix size of sdctrl nodes
All registers are located within 0x400 size from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-28 23:58:48 +09:00
Masahiro Yamada
80a687041a ARM: dts: uniphier: add AIDET nodes
Add UniPhier AIDET (ARM Interrupt Detector) nodes to support
active low interrupts.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-28 23:58:48 +09:00
Masahiro Yamada
69f9cdc633 ARM: dts: uniphier: add Denali NAND controller node
Add NAND controller node to LD4, Pro4, sLD8, Pro5, and PXs2.
Set up pinctrl to enable 2 chip select lines except Pro4.  The CS1
for Pro4 is multiplexed with other peripherals such as UART2, so
I did not enable it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-16 01:47:01 +09:00
Masahiro Yamada
ed8bc76bec ARM: dts: uniphier use #include instead of /include/
To include dt-bindings headers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-16 01:46:54 +09:00
Masahiro Yamada
4376f01a1c ARM: dts: uniphier: use SPDX-License-Identifier (2nd)
Commit fa53757bca ("ARM: dts: uniphier: use SPDX-License-Identifier")
missed to touch these two.  Now updating.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-07-16 12:23:45 +09:00
Masahiro Yamada
1808867859 ARM: dts: uniphier: fix simple-bus unit address format error
Compiling the UniPhier DT files with W=1, DTC warns like follows:

Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/ethernet@00000000 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/uart@000b0000 simple-bus unit address format error, expected "b0000"
Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-06 09:20:24 +09:00
Viresh Kumar
f21683ae6e ARM: dts: uniphier: Use - instead of @ for DT OPP entries
Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-06 09:20:20 +09:00
Masahiro Yamada
8e2b908b9f ARM: dts: uniphier: remove skeleton.dtsi inclusion
Commit 9c0da3cc61 ("ARM: dts: explicitly mark skeleton.dtsi as
deprecated") declared that skeleton.dtsi was deprecated.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-03-07 05:22:56 +09:00
Masahiro Yamada
2752bcaa1a ARM: dts: uniphier: make 32bit SoC DTSI linear
I notice some mistakes in the SoC DTSI; wrong interrupts properties
of timer nodes, mismatch between the node name and the compatible
for sdctrl block.  Given those problems fixed, the common parts
among SoCs are less than I had first expected.  The more and more
property overrides are making the SoC DTSI unreadable.

Stretch out the SoC DTSI files and fix the following:

 - Fix the 3rd cell of the interrupts property of the timer nodes
   for Pro4, Pro5, PXs2

 - Fix the node name mioctrl to sdctrl for Pro5, PXs2

 - Fix the second region of l2 node for PXs2

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-11-05 23:18:26 +09:00
Masahiro Yamada
35167e27f2 ARM: dts: uniphier: add CPU clocks and OPP table for Pro5 SoC
Add a CPU clock to every CPU node and a CPU OPP table to use the
generic cpufreq driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2016-11-05 16:40:08 +09:00
Masahiro Yamada
1bdb60ef18 ARM: dts: uniphier: change MIO node to SD control node
I made a mistake bacuse the Media I/O block is not implemented in
these SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-22 21:59:15 +09:00
Masahiro Yamada
ad0561d464 ARM: dts: uniphier: use clock/reset controllers
The UniPhier reset controller driver has been merged.  Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-31 05:27:27 +09:00
Masahiro Yamada
3bdba5ac18 ARM: dts: uniphier: switch over to PSCI
Use PSCI for enable-method instead of SoC specific implementation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-30 21:13:13 +09:00
Masahiro Yamada
77896e4d05 ARM: dts: uniphier: match DT names to other projects and documents
All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer.  Recent documents and other
projects are not using PH1- prefixes any more.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-30 21:12:58 +09:00