Commit Graph

27 Commits

Author SHA1 Message Date
Vladimir Barinov
6d81daf306 arm64: dts: r8a7795: h3ulcb: Add DU external dot clocks
The DU0/DU1/DU2/DU3 external dot clocks are provided by the programmable
Versaclock5 clock generator.

Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 15:59:45 +02:00
Geert Uytterhoeven
6fad293ddb arm64: dts: renesas: Move CPG_AUDIO_CLK_I from board to soc files
The definition of CPG_AUDIO_CLK_I is SoC-specific, not board-specific.
Hence move it from the board-specific .dts files to the SoC-specific
.dtsi files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 15:53:58 +02:00
Geert Uytterhoeven
fb5202dbeb arm64: dts: r8a7795: h3ulcb: Add support for R-Car H3 ES2.0
Split off support for H3ULCB boards with the ES1.x revision of the R-Car
H3 SoC into a separate file.  The main r8a7795-h3ulcb.dts file now
corresponds to H3ULCB with R-Car H3 ES2.0 or later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:30:01 +02:00
Geert Uytterhoeven
291e0c4994 arm64: dts: r8a7795: Add support for R-Car H3 ES2.0
Update r8a7795.dtsi so it corresponds to R-Car H3 ES2.0 or later:
  - The following devices no longer exist on ES2.0, and are thus removed:
    fcpf2, fcpvd3, fcpvi2, fdp1-2, usb3-if1, vspd3, vspi2.
  - The DU <-> VSPD topology is different on ES2.0, hence remove the
    "compatible" and "vsps" properties from the DU node until the driver
    can handle this.

Move support for the ES1.x revision of the R-Car H3 SoC into a
separate file.  To avoid duplication, r8a7795-es1.dtsi includes
r8a7795.dtsi, and adds device nodes and properties where needed.
Note that while currently r8a7795-es1.dtsi only adds device nodes,
removal of devices nodes and properties can be implemented using the
/delete-node/ and /delete-property/ keywords, as shown below:

	&soc {
		/delete-node/ <name>@<addr>;
	};

	&<label> {
		/delete-property/ <prop>;
	};

Switch r8a7795-salvator-x.dts and r8a7795-h3ulcb.dts from r8a7795.dtsi
to r8a7795-es1.dtsi to preserve compatibility.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22 14:54:56 +02:00
Geert Uytterhoeven
253ed045a3 arm64: dts: renesas: Extract common ULCB board support
The Renesas ULCB development board can be equipped with either an R-Car
H3 or M3-W SiP, which are pin-compatible.  Both boards use different
DTBs.

Reduce duplication by extracting common ULCB board support into its own
.dtsi file.  References to SoC-specific clocks are handled through cpp
definitions.  Sort device nodes while at it.

For H3ULCB, there are no functional changes.

For M3ULCB, the following new devices are now described in DT:
  - External audio, CAN, and PCIe clocks,
  - CS2000 clock generator,
  - AK4613 Audio Codec.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22 14:54:39 +02:00
Vladimir Barinov
d2ae6fedc4 arm64: dts: h3ulcb: enable HS200 for eMMC
This supports HS200 mode for eMMC on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22 14:54:30 +02:00
Geert Uytterhoeven
c9060f50d8 arm64: dts: h3ulcb: Drop superfluous status update for frequency override
The scif_clk device node is already enabled in r8a7795.dtsi, so there is
no need to update its status again.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-13 10:20:00 +01:00
Vladimir Barinov
5b9fd1962f arm64: dts: h3ulcb: Fix EthernetAVB PHY timing
Set PHY rxc-skew-ps to 1500 and all other values to their default values.

This is intended to to address failures in the case of 1Gbps communication
using the by h3ulcb board with the KSZ9031RNX phy.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-06 09:54:26 +01:00
Vladimir Barinov
a262d66224 arm64: dts: h3ulcb: Update memory node to 4 GiB map
This patch adds memory region:

  - After changes, the H3ULCB board has the following map:
    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
    Bank1: 1GiB RAM : 0x000500000000 -> 0x0053fffffff
    Bank2: 1GiB RAM : 0x000600000000 -> 0x0063fffffff
    Bank3: 1GiB RAM : 0x000700000000 -> 0x0073fffffff

  - Before changes, the old map looked like this:
    Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff

Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-06 09:54:26 +01:00
Olof Johansson
9cbcb077bf Second Round of Renesas ARM64 Based SoC DT Updates for v4.11
r8a779[56] SoCs:
 * Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
   - They are enabled as appropriate in board DT files
 * Link ARM GIC to clock and clock domain on r8a779[56] SoCs
 * Add thermal support
 
 r8a7795 SoC:
 * Tidyup audma definition order on r8a7795 SoC
 * Add missing power-domains property for SATA
 
 r8a7795/h3ulcb board:
 * Add MIX/CTU support as per support present in DT for r8a7796
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Merge tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Second Round of Renesas ARM64 Based SoC DT Updates for v4.11

r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
  - They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support

r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA

r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796

* tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7796: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: tidyup audma definition order
  arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7796: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add missing power-domains property for sata
  arm64: dts: h3ulcb: follow sound CTU/MIX supports

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 20:57:26 -08:00
Kuninori Morimoto
b1980ff0c3 arm64: dts: h3ulcb: follow sound CTU/MIX supports
commit 5bcd74e8a30d9259 ("arm64: dts: r8a7795: add sound MIX support")
commit 5be5ee41d011f26b ("arm64: dts: r8a7795: add sound CTU support")
added MIX/CTU support, and it updated clocks on SoC level.
Thus, h3ulcb should be updated

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-10 08:59:15 +01:00
Simon Horman
8ebcb400af arm64: dts: h3ulcb: Provide sd0_uhs node
Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.

Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fixes: 93373c309a ("arm64: dts: h3ulcb: rename SDHI0 pins")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-12-08 14:29:17 +01:00
Vladimir Barinov
93373c309a arm64: dts: h3ulcb: rename SDHI0 pins
This changes SDHI0 pin names for H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21 10:18:52 +01:00
Vladimir Barinov
274dc8916d arm64: dts: h3ulcb: enable SDHI2
This supports SDHI2 for H3ULCB onboard eMMC

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21 10:18:51 +01:00
Vladimir Barinov
c77c975576 arm64: dts: h3ulcb: update header
This updates H3ULCB device tree header with official board name

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21 10:18:45 +01:00
Vladimir Barinov
e8c841f5ac arm64: dts: h3ulcb: enable GPIO leds
This supports GPIO leds on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:25 +02:00
Vladimir Barinov
2627d5179f arm64: dts: h3ulcb: Sound SSI support
This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:24 +02:00
Vladimir Barinov
5709436319 arm64: dts: h3ulcb: enable SDHI0
This supports SDHI0 on H3ULCB board SD card slot

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:18 +02:00
Vladimir Barinov
0e3886a981 arm64: dts: h3ulcb: enable GPIO keys
This supports GPIO keys on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:17 +02:00
Vladimir Barinov
15907f1f87 arm64: dts: h3ulcb: enable USB2.0 Host channel 1
This supports USB2.0 Host channel 1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08 09:35:06 +02:00
Vladimir Barinov
0baa64d8d2 arm64: dts: h3ulcb: enable USB2 PHY of channel 1
This supports USB2 PHY channel #1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:28 +02:00
Vladimir Barinov
4bdb25d0f1 arm64: dts: h3ulcb: enable WDT
This supports watchdog timer for H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:27 +02:00
Vladimir Barinov
b00d23f71f arm64: dts: h3ulcb: enable EXTALR clk
This enables EXTALR clock that can be used for the watchdog.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:26 +02:00
Vladimir Barinov
eb3f0f199f arm64: dts: h3ulcb: enable I2C2
This supports I2C2 bus on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:26 +02:00
Vladimir Barinov
144bf6ccb1 arm64: dts: h3ulcb: enable EthernetAVB
This supports Ethernet AVB on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:25 +02:00
Vladimir Barinov
af111bce54 arm64: dts: h3ulcb: enable SCIF clk and pins
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:24 +02:00
Vladimir Barinov
b10690d11f arm64: dts: h3ulcb: initial device tree
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.

This commit supports the following peripherals:
- SCIF (console)

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06 12:57:24 +02:00