Commit Graph

150 Commits

Author SHA1 Message Date
Christian König
698825653f drm/amdgpu: add optional ring to *_hdp callbacks
This adds an optional ring to the invalidate_hdp and flush_hdp
callbacks. If the ring isn't specified or the emit_wreg function not
available the HDP operation will be done with the CPU otherwise by
writing on the ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:18:20 -05:00
Alex Deucher
dd8d07f2fb drm/amdgpu: add HDP asic callbacks for VI
Needed to flush and invalidate the HDP block using the CPU.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
2018-02-19 14:17:13 -05:00
Shirish S
fb4bbba277 drm/amdgpu: re-enable CGCG on CZ and disable on ST
The CGCG feature on Stoney is causing GFX related
issues such as freezes and blank outs.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Arindam Nath <arindam.nath@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-06 00:05:22 -05:00
Shirish S
7e24a3ea82 drm/amdgpu: disable coarse grain clockgating for ST
The CGCG feature  on Stoney is causing GFX related
issues such as freezes and blank outs.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Arindam Nath <arindam.nath@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-29 23:30:44 -05:00
Alex Deucher
04a0d2d9a6 drm/amdgpu: use defines for mmBIF_IOV_FUNC_IDENTIFIER fields
Rather than magic numbers.

Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-19 23:44:13 -05:00
Alex Deucher
57ad33a307 drm/amdgpu: only check mmBIF_IOV_FUNC_IDENTIFIER on tonga/fiji
We only support SR-IOV on tonga/fiji.  Don't check this register
on other VI parts.

Fixes: 048765ad5a (amdgpu: fix asic initialization for virtualized environments (v2))
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-12-19 23:40:51 -05:00
Alex Deucher
041d9d93b5 drm/amdgpu: rename amdgpu_get_pcie_info
add device to the name for consistency.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-18 11:00:08 -05:00
Alex Deucher
2990a1fc01 drm/amdgpu: rename ip block helper functions
add device to the name for consistency.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-18 10:59:40 -05:00
Alex Deucher
8111c38727 drm/amdgpu: rename amdgpu_pci_config_reset
add device for consistency with other functions in this file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-18 10:59:18 -05:00
Alex Deucher
9c3f2b5474 drm/amdgpu: rename amdgpu_program_register_sequence
add device for consistency with other functions in this file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-18 10:59:13 -05:00
Christian König
c47b41a79a drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result
Not sure what that should originally been good for, but it doesn't seem
to make any sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:21 -05:00
Dave Airlie
b9e56e41e0 Merge branch 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux into drm-next
Initial pull request for DC support.  We've completed a substantial amount of
the cleanup and restructuring in our TODO.  There are a few additional
cleanups that we are continuing to work on, but I don't think there are any
showstoppers remaining. We've tried to maintain most of the history for bisect
purposes.  Harry made sure all the commits build.  We've enabled DC for vega10
and Raven.  Pre-vega10 parts can be enabled via module parameter (amdgpu.dc=1),
but are not enabled by default at this point until we get further testing
upstream.

This code provides atomic modesetting support for DCE8 (CIK), DCE10 (Tonga,
Fiji), DCE11 (CZ, ST, Polaris), DCE12 (vega10), and DCN1 (RV) including
HDMI and DP audio, DP MST, and many other advanced display features.

+

Latest cleanups for DC from you and Harry.  Note that there is some
flickering on some older asics with this branch due to a regression in powerplay
that has already been fixed and will be included in my next non-DC pull request
next week.

* 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux: (897 commits)
  amdgpu/dc: use kref for dc_state.
  amdgpu/dc: convert dc_sink to kref.
  amdgpu/dc: convert dc_stream_state to kref.
  amdgpu/dc: use kref for dc_plane_state.
  amdgpu/dc: convert dc_gamma to kref reference counting.
  amdgpu/dc: convert dc_transfer to use a kref.
  amdgpu/dc: kill a bunch of dead code.
  amdgpu/dc: set a bunch of functions to static.
  amdgpu/dc: kill some deadcode in dc core.
  amdgpu/dc: fix indentation on a couple of returns.
  amdgpu/dm: don't use after free.
  amdgpu/dc: kfree already checks for NULL.
  amdgpu/dc: fix a bunch of misc whitespace.
  amdgpu/dc: drop hw_sequencer_types.h
  amdgpu/dc: drop dce110_types.h
  amdgpu/dc: use kernel ilog2 for log_2.
  amdgpu/dc: don't memset after kzalloc.
  amdgpu/dc: inline dal grph object id functions.
  amdgpu/dc: inline dml_round_to_multiple
  amdgpu/dc: rename bios get_image symbol to something more searchable.
  ...
2017-10-09 11:21:15 +10:00
Rex Zhu
3811f8f00c drm/amd/powerplay: move set_clockgating_by_smu to pp func table
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-06 16:47:46 -04:00
Harry Wentland
4562236b3b drm/amd/dc: Add dc display driver (v2)
Supported DCE versions: 8.0, 10.0, 11.0, 11.2

v2: rebase against 4.11

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:01:32 -04:00
Felix Kuehling
c2cade3dd1 drm/amdgpu: Disable GFX PG on CZ
It's causing problems with user mode queues and the HIQ, and can
lead to hard hangs during boot after programming RLC_CP_SCHEDULERS.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2017-08-15 23:00:16 -04:00
Dave Airlie
04d4fb5fa6 Merge branch 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux into drm-next
New radeon and amdgpu features for 4.13:
- Lots of Vega10 bug fixes
- Preliminary Raven support
- KIQ support for compute rings
- MEC queue management rework from Andres
- Audio support for DCE6
- SR-IOV improvements
- Improved module parameters for controlling radeon vs amdgpu support
  for SI and CIK
- Bug fixes
- General code cleanups

[airlied: dropped drmP.h header from one file was needed and build broke]

* 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux: (362 commits)
  drm/amdgpu: Fix compiler warnings
  drm/amdgpu: vm_update_ptes remove code duplication
  drm/amd/amdgpu: Port VCN over to new SOC15 macros
  drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros
  drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macros
  drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macros
  drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macros
  drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macros
  drm/amd/amdgpu: Port MMHUB over to new SOC15 macros
  drm/amd/amdgpu: Cleanup gfxhub read-modify-write patterns
  drm/amd/amdgpu: Port GFXHUB over to new SOC15 macros
  drm/amd/amdgpu: Add offset variant to SOC15 macros
  drm/amd/powerplay: add avfs control for Vega10
  drm/amdgpu: add virtual display support for raven
  drm/amdgpu/gfx9: fix compute ring doorbell index
  drm/amd/amdgpu: Rename KIQ ring to avoid spaces
  drm/amd/amdgpu: gfx9 tidy ups (v2)
  drm/amdgpu: add contiguous flag in ucode bo create
  drm/amdgpu: fix missed gpu info firmware when cache firmware during S3
  drm/amdgpu: export test ib debugfs interface
  ...
2017-06-16 09:56:53 +10:00
Xiangliang Yu
ab276632ec drm/amdgpu/virt: change the place of virt_init_setting
Change place of virt_init_setting function so that can cover the
cg and pg flags configuration.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:40:04 -04:00
Christian König
3032f350ba drm/amdgpu: drop support for per ASIC read registers
Only per family registers are still used.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:40:02 -04:00
Christian König
97fcc76b67 drm/amdgpu: drop support for untouched registers
I couldn't figure out what this was original good for, but we
don't use it any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:40:01 -04:00
Alex Deucher
4fdca894bb Revert "drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solved"
Re-enable GFX PG.  It's working properly with MEC now that KIQ is
enabled.

Reviewed-by: Samuel  Li <samuel.li@amd.com>

This reverts commit e9ef19aa1bdeac380662a112f1d03a7c3477527f.
2017-05-24 17:39:47 -04:00
Masahiro Yamada
248a1d6f1a drm/amd: fix include notation and remove -Iinclude/drm flag
Include <drm/*.h> instead of relative path from include/drm, then
remove the -Iinclude/drm compiler flag.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1493009447-31524-4-git-send-email-yamada.masahiro@socionext.com
2017-05-16 17:17:41 +02:00
Christian König
c7217b2af8 drm/amdgpu: just disallow reading untouched registers
Not sure what the original intention was here, but returning a random piece of
kernel memory to userspace because we didn't set the value at all is clearly
not a good idea.

This patch disallows reading the register and returns
a proper error code instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30 14:44:00 -04:00
Huang Rui
e635ee0745 drm/amdgpu: use new flag to handle different firmware loading method
This patch introduces a new flag named "amdgpu_firmware_load_type" to
handle different firmware loading method. Since Vega10, there are
three ways to load firmware. It would be better to use a flag and a
fw_load_type kernel parameter to configure it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:33 -04:00
Rex Zhu
739e9fffde drm/amdgpu: enable gfx/system/vce clockgating on Polars12.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:06 -04:00
Eric Huang
170d6e94e5 drm/amdgpu: enable GFX/UVD/VCE PG for Bristol
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:05 -04:00
Alex Deucher
d319c2bcc6 drm/amdgpu/vi: add missing error handling when setting uvd dclk
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:59 -04:00
Alex Deucher
8085c69968 drm/amdgpu/vi: remove duplicate CG flags
GFX_MGLS was added twice.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:58 -04:00
Andrew F. Davis
7e91366420 drm/amdgpu: remove unneeded conversions to bool
Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:57 -04:00
Alex Deucher
bbf282d884 drm/amdgpu: add asic callback to get memsize register
Newer asics use different registers so abstract it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:41 -04:00
Monk Liu
ce137c04ff drm/amdgpu:cg & pg shouldn't active on VF device
CG & PG function changes engine clock/gating, which is
not appropriate for VF device, because one vf doesn't know
the whole picture of engine's overall workload.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:52:40 -04:00
Tom St Denis
d8a8ed9758 drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solved
Currently compute jobs will stall if GFX_PG is enabled.  Until this
is resolved we'll disable GFX_PG.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-10 14:25:33 -05:00
Jim Qu
c836fec5ce drm/amd/amdgpu: post card if there is real hw resetting performed
Check whether we need to post rather than whether the asic is
posted.  There are some cases (e.g., GPU reset or resume from
hibernate) where we need to force post even if the asic has
been posted.

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-17 16:12:58 -05:00
Xiangliang Yu
63d24f8846 drm/amdgpu/vi: fix mailbox irq mistake
For virt, freed mailbox irq should be handled in hw fini, not hw
init. Correct it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:40 -05:00
Xiangliang Yu
99581cc573 drm/amdgpu/vi: add support virtualization
Call VI virtualization functions if device is Vf.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:25 -05:00
Xiangliang Yu
bc992ba5a3 drm/amdgpu/virt: use kiq to access registers (v2)
For virtualization, it is must for driver to use KIQ to access
registers when it is out of GPU full access mode.

v2: agd: rebase

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:23 -05:00
Rex Zhu
714b1f5371 drm/amdgpu: refine vce3.0 initialize.
1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz fo dgpu,
   so no need to set bypass clock to vce.

Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:15 -05:00
Huang Rui
abd2c2fe12 drm/amdgpu: add get clockgating_state method for vi common
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:09 -05:00
Xiangliang Yu
91caa08137 drm/amdgpu/vi: move virtualization detection forward
Move the detection forward into vi_set_ip_blocks function, then
add ip blocks virtualization need if device is VF.

V2: add ip blocks according to asic type.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:05 -05:00
Xiangliang Yu
5a5099cbf4 drm/amdgpu/virt: rename fieldes of virtualization structure
Use acronym to rename fields to make easy to spell out.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:04 -05:00
Rex Zhu
f6f534e2af drm/amdgpu: add drm light sleep support for Vi
v2: fix copy error.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:46 -05:00
Rex Zhu
0ef5b226c4 drm/amd/powerplay: move vi smu firmware declares to powerplay.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:37 -05:00
Junwei Zhang
c4642a479f drm/amd/amdgpu: add Polaris12 support (v3)
v2: agd: squash in various fixes
v3: agd: squash in:
drm/amdgpu: remove unnecessary smc sk firmware for polaris12

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-06 17:07:54 -05:00
Rex Zhu
8a19e7fa08 drm/amdgpu: refine set clock gating for tonga/polaris
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-15 15:16:26 -05:00
Rex Zhu
ca18b84986 drm/amdgpu: initialize cg flags for tonga/polaris10/polaris11.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-15 15:16:26 -05:00
Rex Zhu
98fccc78bc drm/amdgpu: enable AMD_PG_SUPPORT_CP in Carrizo/Stoney.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-15 15:16:23 -05:00
Rex Zhu
54971406b7 drm/amdgpu: disable uvd pg on Tonga.
it does not work with GPU pass through if the VM
is not cleanly shutdown leading to a hang when the
modules is reloaded.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-15 15:16:21 -05:00
Maruthi Srinivas Bayyavarapu
ecc2cf7cc8 drm/amdgpu: enable VCE clockgating in Polaris-10/11
VCE clocks are set to be disabled, when not in use.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:26 -05:00
Dave Airlie
17f1dfd01c Merge branch 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux into drm-next
- lots of code cleanup
- lots of bug fixes
- expose rpm based fan info via hwmon
- lots of clock and powergating fixes
- SI register header cleanup and conversion to common format used by newer asics

* 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux: (54 commits)
  drm/amdgpu: drop is_display_hung from display funcs
  drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)
  drm/amdgpu/uvd: consolidate code for fetching addr from ctx
  drm/amdgpu: Disable DPM in virtualization
  drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2)
  drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)
  drm/amdgpu: fix error handling in amdgpu_bo_create_restricted
  drm/amdgpu: fix amdgpu_fill_buffer (v2)
  drm/amdgpu: remove amdgpu_irq_get_delayed
  amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit()
  amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault()
  drm/amd/amdgpu: port of DCE v6 to new headers (v3)
  drm/amdgpu: cleanup unused iterator members for sdma v2.4
  drm/amdgpu: cleanup unused iterator members for sdma v3
  drm/amdgpu:impl vgt_flush for VI(V5)
  drm/amdgpu: enable uvd mgcg for Fiji.
  drm/amdgpu: refine cz uvd clock gate logic.
  drm/amdgpu: change log level to KERN_INFO in ci_dpm.c
  drm/amdgpu: always un-gate UVD REGS path.
  drm/amdgpu/sdma: fix typo in packet setup
  ...
2016-12-06 11:01:33 +10:00
Dave Airlie
6320745596 drm/virtio: fix busid in a different way, allocate more vbufs.
drm/qxl: various bugfixes and cleanups,
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Merge tag 'drm-qemu-20161121' of git://git.kraxel.org/linux into drm-next

drm/virtio: fix busid in a different way, allocate more vbufs.
drm/qxl: various bugfixes and cleanups,

* tag 'drm-qemu-20161121' of git://git.kraxel.org/linux: (224 commits)
  drm/virtio: allocate some extra bufs
  qxl: Allow resolution which are not multiple of 8
  qxl: Don't notify userspace when monitors config is unchanged
  qxl: Remove qxl_bo_init() return value
  qxl: Call qxl_gem_{init, fini}
  qxl: Add missing '\n' to qxl_io_log() call
  qxl: Remove unused prototype
  qxl: Mark some internal functions as static
  Revert "drm: virtio: reinstate drm_virtio_set_busid()"
  drm/virtio: fix busid regression
  drm: re-export drm_dev_set_unique
  Linux 4.9-rc5
  gp8psk: Fix DVB frontend attach
  gp8psk: fix gp8psk_usb_in_op() logic
  dvb-usb: move data_mutex to struct dvb_usb_device
  iio: maxim_thermocouple: detect invalid storage size in read()
  aoe: fix crash in page count manipulation
  lightnvm: invalid offset calculation for lba_shift
  Kbuild: enable -Wmaybe-uninitialized warnings by default
  pcmcia: fix return value of soc_pcmcia_regulator_set
  ...
2016-11-30 14:18:51 +10:00
Rex Zhu
79abf1add6 drm/amdgpu: enable uvd mgcg for Fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:08:39 -05:00