Currently CONFIG_MTD_NAND_CADENCE implicitly depends on
CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get
the following build error:
ld: drivers/mtd/nand/raw/cadence-nand-controller.o: in function `cadence_nand_dt_probe.cold.31':
drivers/mtd/nand/raw/cadence-nand-controller.c:2969: undefined reference to `devm_platform_ioremap_resource'
ld: drivers/mtd/nand/raw/cadence-nand-controller.c:2977: undefined reference to `devm_ioremap_resource'
Fix the build error by adding the unspecified dependency.
Reported-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add new Cadence NAND driver to MTD subsystem
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The ARM w90x900 platform is getting removed, so this driver is obsolete.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add a driver for Macronix raw NAND controller.
Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
When enabling CONFIG_MTD_NAND_ECC_SW_BCH as a module, the
MTD_NAND_ECC_SW_BCH depends on MTD_NAND, but the module controlled by
MTD_NAND links against the module controlled by MTD_NAND_ECC_SW_BCH.
This leads to the following link failure.
aarch64-linux-gnu-ld: drivers/mtd/nand/raw/nand_base.o: in function `nand_cleanup':
../drivers/mtd/nand/raw/nand_base.c:5886: undefined reference to `nand_bch_free'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5886:(.text+0x9928): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `nand_bch_free'
aarch64-linux-gnu-ld: drivers/mtd/nand/raw/nand_base.o: in function `nand_set_ecc_soft_ops':
../drivers/mtd/nand/raw/nand_base.c:5093: undefined reference to `nand_bch_calculate_ecc'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5093:(.text+0xe914): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against undefined symbol `nand_bch_calculate_ecc'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5093: undefined reference to `nand_bch_calculate_ecc'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5094: undefined reference to `nand_bch_correct_data'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5094:(.text+0xe934): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against undefined symbol `nand_bch_correct_data'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5094: undefined reference to `nand_bch_correct_data'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5148: undefined reference to `nand_bch_init'
aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5148:(.text+0xebbc): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `nand_bch_init'
Rework CONFIG_MTD_NAND_ECC_SW_BCH from tristate to bool,
and then link the nand_bch.o file into nand.ko if its enabled.
Fixes: 51ef1d0b2095 ("mtd: nand: Clarify Kconfig entry for software BCH ECC algorithm")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
MTD_NAND is large and encloses much more than what the symbol is
actually used for: raw NAND. Clarify the symbol by naming it
MTD_RAW_NAND instead.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This list is a mess, while some items should probably not be in the
raw/ sub-directory, others are definitely at the right place but not
with the right description. Write uniform titles and group IPs by
vendor.
NAND controllers will appear under the list named "Raw/parallel NAND
flash controllers" while the other drivers will appear under
"Misc". Software ECC engines will later be moved out of the raw/
directory.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The software Hamming ECC correction implementation is referred as
MTD_NAND_ECC which is too generic. Rename it
MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an
SMC quirk in the Hamming implementation as
MTD_NAND_ECC_SW_HAMMING_SMC.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
There is no point in having two distinct entries, merge them and
rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
In order to use some of the nanddev_xxx() helpers, we need to
initialize the nand_device object embedded in nand_chip using
nanddev_init(). This requires implementing nand_ops.
We also drop useless mtd->xxx initialization when they're already taken
case of by nanddev_init().
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Before adding support for more SoCs and seeing the number of files for
these drivers grow, we move them to their own subfolder to keep it tidy.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add initial support for the Amlogic NAND flash controller which is
available on Meson SoCs.
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.
This patch is based on FMC2 command sequencer.
The purpose of the command sequencer is to facilitate the programming
and the reading of NAND flash pages with the ECC and to free the CPU
of sequencing tasks.
It requires one DMA channel for write and two DMA channels for read
operations.
Only NAND_ECC_HW mode is actually supported.
The driver supports a maximum 8k page size.
The following ECC strength and step size are currently supported:
- nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8)
- nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
- nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC
based on Hamming)
This patch has been tested on Micron MT29F8G08ABACAH4 and
MT29F8G16ABACAH4
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Drop the asm and mach headers inclusion and allow this driver to be
compiled when COMPILE_TEST=y in order to increase compile-test
coverage.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The diskonchip G4 driver does not fit very well in the raw/parallel
NAND framework simply because such chips have an internal controller
translating DoC-specific commands into NAND ones.
Keeping such a driver in the raw NAND framework is a real burden for
NAND maintainers.
Not to mention that some parts of this driver are a bit worrisome:
- writes are done by subpages, even though we're interfacing with an MLC
chip which are known to not support subpage writes very well (it might
be that the FTL handles the complexity for us though)
- some part of the code are simply ignoring return codes of function that
can fail in a few occasions
- there's a hack to support OOB writes when no data is provided. This
operation is not supported by the chip and should have been rejected,
and nandwrite and other userspace tools should have been patched to
deal with such devices
- the driver is apparently broken when ignore_badblocks module param
is not set to 1 and nobody noticed that (don't know since when this
is the case, but it's not a recent change)
http://lists.infradead.org/pipermail/linux-mtd/2018-July/082472.html
Add to that the fact that we already have a docg3 driver in
drivers/mtd/devices/docg3.c and, looking at the code (and regs), it
seems docg3 and docg4 have a lot in common (even the author of this
driver seemed to have realized that interfacing with the raw NAND
framework might have been a bad idea
http://lists.infradead.org/pipermail/linux-mtd/2012-January/039517.html).
For all these reasons, I'm proposing to remove this driver. If anyone
ever wants to add support for this chip back, I'd suggest extending
the docg3 driver instead of adding a completely new driver.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Mike Dunn <mikedunn@newsguy.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Sergey Larin <cerg2010cerg2010@mail.ru>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The driver uses genalloc functions. Select GENERIC_ALLOCATOR to prevent
build errors when selected through COMPILE_TEST.
Fixes: 88a40e7dca ("mtd: rawnand: atmel: Allow selection of this driver when COMPILE_TEST=y")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
We already have a dependency on BCMA_NFLASH, which in turn depends on
BCMA, but since BCMA is a tristate option and BCMA_NFLASH is bool,
we can run into an invalid configuration with MTD_NAND_BCM47XXNFLASH=y
and BCMA=m:
drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.o: In function `bcm47xxnflash_ops_bcm4706_init':
ops_bcm4706.c:(.text+0x790): undefined reference to `bcma_chipco_pll_read'
Adding the dependency here forces MTD_NAND_BCM47XXNFLASH to only be
configured =m here so it can link against the BCMA driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This MACH_JZ4780 dependency is taken care of by JZ4780_NEMC, no need
to repeat it here.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having MACH_JZ4740 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having SOC_TX4938 or SOC_TX4939
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes maintainers' life easier by allowing them to compile-test
this driver without having FSL_SOC, ARCH_LAYERSCAPE or SOC_LS1021A
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having PLAT_SPEAR, ARCH_NOMADIK,
ARCH_U8500 or MACH_U300 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_SUNXI enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_DAVINCI or ARCH_KEYSTONE
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Rules about Kconfig are simple but in the raw NAND directory indentation
is somehow archaic. Fix the indentation in the whole file.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_AT91 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_W90X900 enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_QCOM enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_MXC enabled.
We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARM, ARM64 or MIPS enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test these drivers without having ARCH_LPC32XX enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_PXA enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
It just makes NAND maintainers' life easier by allowing them to
compile-test this driver without having ARCH_OMAP2PLUS or ARCH_KEYSTONE
enabled.
We also need to add a dependency on HAS_IOMEM to make sure the driver
compiles correctly.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
When COMPILE_TEST is allowed and the platform needs uses the iomem API
we need to add an explicit dependency on HAS_IOMEM to avoid selection
of these drivers when building for an arch that has no iomem support
(this is the case of arch/um).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The MTD_NAND_GPMI_NAND entry is already defined in an 'if MTD_NAND'
block, no need to add an extra "depends on MTD_NAND".
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add support for the NAND flash controller found on NVIDIA
Tegra 2 SoCs. This implementation does not make use of the
command queue feature. Regular operations using ->exec_op()
use PIO mode for data transfers. Raw, ECC and OOB read/writes
make use of the DMA mode for data transfer.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Remove dependencies on HAS_DMA where a Kconfig symbol depends on another
symbol that implies HAS_DMA, and, optionally, on "|| COMPILE_TEST".
In most cases this other symbol is an architecture or platform specific
symbol, or PCI.
Generic symbols and drivers without platform dependencies keep their
dependencies on HAS_DMA, to prevent compiling subsystems or drivers that
cannot work anyway.
This simplifies the dependencies, and allows to improve compile-testing.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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Merge tag 'v4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into mtd/next
Backmerge v4.16-rc2 into mtd/next to resolve a conflict between Linus'
master branch and nand/for-4.17.
Files have been moved in the NAND subsystem to reflect the different
flavors of NAND devices.
Raw/Parallel NAND devices have been moved to a "raw" subdirectory to
make the difference with OneNAND and SPI NAND for instance. So adjust
the Kconfig entry to clarify things.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
The blackfin architecture is getting removed, so this driver has
become obsolete.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
As part of the process of sharing more code between different NAND
based devices, we need to move all raw NAND related code to the raw/
subdirectory.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
