Move irq_domain_add_legacy call from imx5*-dt.c into tzic init function
and have the tzic driver adopt irqdomain support for both DT and non-DT
boot.
Now tzic init function calls irq_alloc_descs to get irq_base and adds
a lenacy irqdomain with the irq_base, so that the mapping between tzic
irq and Linux irq number can be handled by irqdomain.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Two problems exist in the current i.MX5 pm suspend/resume and idle
functions. The first is the current i.MX5 suspend routine will call
tzic_enable_wake(1) to set wake source, this will set all enabled
irq as wake source rather than those wake capable. The second
is i.MX5 idle will call mx5_cpu_lp_set() to prepare enter low power
mode, but it forgets to call wfi instruction to enter this mode.
To fix these two problems, using generic irq chip pm interface and
modify function imx5_idle().
[Tested by Shawn Guo on imx51 babbage board.
Tested by Hui Wang on imx51 pdk board.]
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/plat-mxc/tzic.c:105: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'tzic_handle_irq'
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Convert i.MX avic irq handler to use generic irq chip. This not only
provides a cleanup implementation of irq chip handler, but also
implements suspend/resume interface with the help of generic irq chip
interface.
Change mxc_irq_chip to a new structure mxc_extra_irq to handle fiq
and priority functions.
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for FIQ on mx51 TZIC
TZIC changes tested with FIQ audio on an mx51 board
AVIC changes build with mx3_defconfig, not tested
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we call tzic_enable_wake function, the kernel will crash because
of access to an unmapped address. This is because two register
access operations forgot to add base address.
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function is defined once for each imx family and so is in the way
when compiling a kernel for more than one SoC.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Freescale i.MX51 processor uses a new interrupt controller. Add
driver for TrustZone Interrupt Controller
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
