Commit Graph

26 Commits

Author SHA1 Message Date
Yangbo Lu
bdba5017d1 ARM: dts: ls1021a: fix the value of TMR_FIPER1
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse. To use the TMR_FIPER1
register to generate a 1 PPS event, the value
(10^9 nanoseconds) - TCLK_PERIOD should be programmed.
It should be 999999995 not 999999990 since TCLK_PERIOD
is 5.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:15:44 +08:00
Rasmus Villemoes
d5c7b4d5ac ARM: dts: ls1021a: add "fsl,ls1021a-esdhc" compatible string to esdhc node
Commit a22950c888 (mmc: sdhci-of-esdhc: add quirk
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL for ls1021a) added logic to the driver to
enable the broken timeout val quirk for ls1021a, but did not add the
corresponding compatible string to the device tree, so it didn't really
have any effect. Fix that.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:15:44 +08:00
SZ Lin
85f8ee78ab ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC
Add QSPI node support, and this function is disabled by default
This setting could be overwritten in board-level definitions

Signed-off-by: SZ Lin <sz.lin@moxa.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:15:44 +08:00
Minghuan Lian
df3015888d arm: dts: ls1021a: Share all MSIs
In order to maximize the use of MSI, a PCIe controller will share
all MSI controllers. The patch changes msi-parent to refer to all
MSI controller dts nodes.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-08-31 16:19:13 +01:00
Minghuan Lian
c9041ea324 arm: dts: ls1021a: Fix typo of MSI compatible string
"1" should be replaced by "l". This is a typo.
The patch is to fix it.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-08-31 16:18:59 +01:00
Yuantian Tang
b6f5e70193 ARM: dts: ls1021a: update the clockgen node
qoriq clock driver has been updated to parse the clock configuration
information defined in driver itself not in dts.
Since the new implementation and the bindings have been merged,
it is time to update the clock related node and remove redundent clock
configuration information from the dts.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-15 11:28:20 +08:00
Marc Zyngier
387720c938 ARM: DTS: Fix register map for virt-capable GIC
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.

Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).

In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.

Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-02-07 15:06:46 +01:00
Hongtao Jia
4d9e9cbb61 ARM: dts: ls1021a: Add TMU device tree support for LS1021A
Also add nodes and properties for thermal management support.

Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-10-24 16:47:50 +08:00
Rajesh Bhagat
6f0808c482 ARM: dts: ls1021a: Add dis_rxdet_inp3_quirk property to USB3 node
Add "dis_rxdet_inp3_quirk" boolean property to USB3 node. This property
is used to disable rx detection in P3 PHY mode.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-11 22:10:08 +08:00
Stefan Agner
5d01e99ebf ARM: dts: ls1021a: add pix clock to DCU dts node
The DCU IP has distinct clock inputs for register access and the
pixel clocks, at least in some implementations. LS1021a seems to
use the same clock, therefore specify the same clock for "dcu"
and "pix".

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-13 17:48:04 +08:00
Alexander Stein
5b9f967c07 ARM: dts: ls1021a: DSPI has 6 chip-selects
Both DSPI have signals SPIn_PCS[0:5] so in summary 6 chip-selects, not 5.
Fix that.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-13 17:48:03 +08:00
Liu Gang
c54dd442b4 ARM: dts: ls1021a: Add gpio support for ls1021a platform
Add gpio nodes for ls1021a platform dts file. The gpio
IP block of the ls1021a can be supported by the code
drivers/gpio/gpio-mpc8xxx.c.

The compatible "fsl,qoriq-gpio" is used by gpio driver:
drivers/gpio/gpio-mpc8xxx.c to implement general gpio
functionalities.

The chip-specific compatible "fsl,ls1021a-gpio" may be
used to fix potential gpio IP block errata or other
chip-specific gpio issues.

Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-13 17:48:03 +08:00
Minghuan Lian
f4a458fd83 ARM: dts: ls1021a: add SCFG MSI dts node
Add SCFG MSI dts node and add msi-parent property to PCIe dts node
that points to the corresponding MSI node.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Tested-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-13 17:48:02 +08:00
Linus Torvalds
8a20a04bda ARM: DT changes, part 2
Here are some final updates for ARM SoC specific dts files:
 
 * The i.MX changes were sent relatively late, and had a dependency
   on the clk tree, so I delayed that a bit. Support for the new
   i.MX6qp SoC and a couple of new boards is added in this branch.
 
 * Uniphier renames a few files to match the final product names
   that were decided by the company, kudos to the kernel developer(s)
   for getting support upstream before the product release.
   Also two boards are added. The patches were posted early enough
   and nice overall, but we forgot to apply them and decided to
   give it some more time in linux-next
 
 * at91 has two small bug fixes.
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Merge tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull more ARM DT changes from Arnd Bergmann:
 "Here are some final updates for ARM SoC specific dts files:

   - The i.MX changes were sent relatively late, and had a dependency on
     the clk tree, so I delayed that a bit.  Support for the new i.MX6qp
     SoC and a couple of new boards is added in this branch.

   - Uniphier renames a few files to match the final product names that
     were decided by the company, kudos to the kernel developer(s) for
     getting support upstream before the product release.  Also two
     boards are added.  The patches were posted early enough and nice
     overall, but we forgot to apply them and decided to give it some
     more time in linux-next

   - at91 has two small bug fixes"

* tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: dts: at91: sama5d4 Xplained: don't disable hsmci regulator
  ARM: dts: at91: sama5d3 Xplained: don't disable hsmci regulator
  ARM: dts: uniphier: add pinmux node for I2C ch4
  ARM: dts: uniphier: add @{address} to EEPROM node
  ARM: dts: uniphier: add PH1-Pro4 Sanji board support
  ARM: dts: uniphier: add PH1-Pro4 Ace board support
  ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
  ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
  ARM: dts: uniphier: add reference clock nodes
  ARM: dts: uniphier: rework UniPhier System Bus nodes
  ARM: dts: uniphier: factor out ranges property of support card
  arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
  ARM: dts: imx53-qsb: Fix gpio button polarity
  ARM: dts: vfxxx: Add DAC node for Vybrid SoC
  ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
  ARM: dts: imx: Add support for Advantech/GE B850v3
  ARM: dts: imx: Add support for Advantech/GE B650v3
  ARM: dts: imx: Add support for Advantech/GE B450v3
  ARM: dts: imx: Add support for Advantech/GE Bx50v3
  ARM: dts: imx: Add Advantech BA-16 Qseven module
  ...
2016-03-24 19:01:38 -07:00
Minghuan Lian
bc7abb471d ARM: dts: ls1021a: add PCIe dts node
LS1021a contains two PCIe controllers. The patch adds their node to
dts file.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-29 16:17:27 +08:00
Yangbo Lu
3db66fdc5f ARM: dts: ls1021a: add 1588 timer node
Add the 1588 timer node for ls1021a platform to
support gianfar ptp driver.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-25 16:22:02 -05:00
Tang Yuantian
318f05e5d7 ARM: dts: ls1021a: add sata node to dts
Added sata node to ls1021aqds and ls1021atwr board to support
sata function.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-12-22 20:43:40 +08:00
Meng Yi
ab0087dfc2 ARM: dts: ls1021a: Add DCU dts node.
Signed-off-by: Alison Wang <b18965@freescale.com>
Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com>
Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
Signed-off-by: Meng Yi <b56799@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-12-22 20:43:36 +08:00
Rajesh Bhagat
607e266c47 ARM: dts: ls1021a: Add quirk for Erratum A009116
Add "snps,quirk-frame-length-adjustment" property to
USB3 node for erratum A009116. This property provides
value of GFLADJ_30MHZ for post silicon frame length
adjustment.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:43 +08:00
Alison Wang
70b5ea9728 ARM: ls1021a: Add dma-coherent property for eTSEC nodes
This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:16 +08:00
Horia Geantă
816aa61c33 ARM: dts: ls1021a: add crypto node
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:14 +08:00
Claudiu Manoil
d69cb5d7ea ARM: dts: ls1021a: Add the eTSEC controller nodes
Add basic support for all the eTSEC controllers on the
ls1021a SoC.  Second interrupt group register blocks
and their corresponding Rx/Tx/Err interrupt sources are
included as well for each eTSEC node.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:21 +08:00
Alison Wang
50897cb6fa ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
This patch adds dts nodes for audio on LS1021A.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:19 +08:00
Haikun Wang
c47d6e380b ARM: dts: ls1021a: Update 'dspi' device node compatible string
Freescale DSPI driver has been updated and supports TCF interrupt type now.
In the new driver we choose the interrupt type according the compatible
string of the device node.
This patch update the compatible string of DSPI device node of LS1021A in
order to use the correct interrupt type.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:13 +08:00
Xiubo Li
4fe6be0fe0 ARM: ls1021a: dtsi: add 'big-endian' property for scfg node
On LS1021A SoC, the scfg device is in BE mode.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-12-29 19:22:12 +08:00
Jingchang Lu
7239280cc2 ARM: dts: Add SoC level device tree support for LS1021A
This add Freescale QorIQ LS1021A SoC device tree support.
The QorIQ LS1021A processor incorporates dual ARM Cortex-A7 cores,
providing virtualization support, advanced security features and the
broadest array of high-speed interconnects and optimized peripheral
features.

The LS1021A SoC shares IPs with i.MX, Vybrid and PowerPC platform.

For the detail information about Freescale QorIQ LS1021A SoC,
please refer to the QorIQ LS1021A Reference Manual.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-23 15:08:08 +08:00