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Author SHA1 Message Date
Linus Torvalds
d9862cfbe2 Here's the main MIPS pull request for v5.1: 
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance when
   running on a CPU such as the I6500 that supports these.
 
 - Enable huge page support for MIPS64r6.
 
 - Optimize post-DMA cache sync by removing that code entirely for kernel
   configurations in which we know it won't be needed.
 
 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.
 
 - The ath79 platform migrates to devicetree.
 
 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
 
 - The ingenic/jz4740 platform gains support for appended devicetrees.
 
 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.
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Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:

 - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance
   when running on a CPU such as the I6500 that supports these.

 - Enable huge page support for MIPS64r6.

 - Optimize post-DMA cache sync by removing that code entirely for
   kernel configurations in which we know it won't be needed.

 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.

 - The ath79 platform migrates to devicetree.

 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.

 - The ingenic/jz4740 platform gains support for appended devicetrees.

 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.

* tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
  MIPS: lantiq: Remove separate GPHY Firmware loader
  MIPS: ingenic: Add support for appended devicetree
  MIPS: SGI-IP27: rework HUB interrupts
  MIPS: SGI-IP27: do boot CPU init later
  MIPS: SGI-IP27: do xtalk scanning later
  MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
  MIPS: SGI-IP27: clean up bridge access and header files
  MIPS: SGI-IP27: get rid of volatile and hubreg_t
  MIPS: irq: Allocate accurate order pages for irq stack
  MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
  MIPS: eBPF: Remove REG_32BIT_ZERO_EX
  MIPS: eBPF: Always return sign extended 32b values
  MIPS: CM: Fix indentation
  MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
  MIPS: OCTEON: program rx/tx-delay always from DT
  MIPS: OCTEON: delete board-specific link status
  MIPS: OCTEON: don't lie about interface type of CN3005 board
  MIPS: OCTEON: warn if deprecated link status is being used
  MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
  MIPS: Delete unused flush_cache_sigtramp()
  ...
 2019-03-05 11:28:25 -08:00
Linus Torvalds
46c291e277 ARM: SoC fixes for linux-5.0 
This is a bit larger than normal, as we had not managed to send out
 a pull request before traveling for a week without my signing key.
 
 There are multiple code fixes for older bugs, all of which should
 get backported into stable kernels:
 
 - tango: one fix for multiplatform configurations broken on other
   platforms when tango is enabled
 - arm_scmi: device unregistration fix
 - iop32x: fix kernel oops from extraneous __init annotation
 - pxa: remove a double kfree
 - fsl qbman: close an interrupt clearing race
 
 The rest is the usual collection of smaller fixes for device tree
 files, on the renesas, allwinner, meson, omap, davinci, qualcomm
 and imx platforms. Some of these are for compile-time warnings,
 most are for board specific functionality that fails to work
 because of incorrect settings.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is a bit larger than normal, as we had not managed to send out a
  pull request before traveling for a week without my signing key.

  There are multiple code fixes for older bugs, all of which should get
  backported into stable kernels:

   - tango: one fix for multiplatform configurations broken on other
     platforms when tango is enabled

   - arm_scmi: device unregistration fix

   - iop32x: fix kernel oops from extraneous __init annotation

   - pxa: remove a double kfree

   - fsl qbman: close an interrupt clearing race

  The rest is the usual collection of smaller fixes for device tree
  files, on the renesas, allwinner, meson, omap, davinci, qualcomm and
  imx platforms.

  Some of these are for compile-time warnings, most are for board
  specific functionality that fails to work because of incorrect
  settings"

* tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
  ARM: tango: Improve ARCH_MULTIPLATFORM compatibility
  firmware: arm_scmi: provide the mandatory device release callback
  ARM: iop32x/n2100: fix PCI IRQ mapping
  arm64: dts: add msm8996 compatible to gicv3
  ARM: dts: am335x-shc.dts: fix wrong cd pin level
  ARM: dts: n900: fix mmc1 card detect gpio polarity
  ARM: dts: omap3-gta04: Fix graph_port warning
  ARM: pxa: ssp: unneeded to free devm_ allocated data
  ARM: dts: r8a7743: Convert to new LVDS DT bindings
  soc: fsl: qbman: avoid race in clearing QMan interrupt
  arm64: dts: renesas: r8a77965: Enable DMA for SCIF2
  arm64: dts: renesas: r8a7796: Enable DMA for SCIF2
  arm64: dts: renesas: r8a774a1: Enable DMA for SCIF2
  ARM: dts: da850: fix interrupt numbers for clocksource
  dt-bindings: imx8mq: Number clocks consecutively
  arm64: dts: meson: Fix mmc cd-gpios polarity
  ARM: dts: imx6sx: correct backward compatible of gpt
  ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3
  ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low
  ...
 2019-02-08 16:23:41 -08:00
Linus Torvalds
5b4746a031 Mostly driver fixes, but there's a core framework fix in here too. 
- Revert the commits that introduce clk management for the SP
    clk on MMP2 SoCs (used for OLPC). Turns out it wasn't a good
    idea and there isn't any need to manage this clk, it just causes
    more headaches.
 
  - A performance regression that went unnoticed for many years where
    we would traverse the entire clk tree looking for a clk by name
    when we already have the pointer to said clk that we're looking
    for
 
  - A parent linkage fix for the qcom SDM845 clk driver
 
  - An i.MX clk driver rate miscalculation fix where order of operations
    were messed up
 
  - One error handling fix from the static checkers
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "Mostly driver fixes, but there's a core framework fix in here too:

   - Revert the commits that introduce clk management for the SP clk on
     MMP2 SoCs (used for OLPC). Turns out it wasn't a good idea and
     there isn't any need to manage this clk, it just causes more
     headaches.

   - A performance regression that went unnoticed for many years where
     we would traverse the entire clk tree looking for a clk by name
     when we already have the pointer to said clk that we're looking for

   - A parent linkage fix for the qcom SDM845 clk driver

   - An i.MX clk driver rate miscalculation fix where order of
     operations were messed up

   - One error handling fix from the static checkers"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: qcom: gcc: Use active only source for CPUSS clocks
  clk: ti: Fix error handling in ti_clk_parse_divider_data()
  clk: imx: Fix fractional clock set rate computation
  clk: Remove global clk traversal on fetch parent index
  Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
  Revert "clk: mmp2: add SP clock"
  Revert "Input: olpc_apsp - enable the SP clock"
 2019-01-31 23:22:57 -08:00
Arnd Bergmann
3673a91c07 Merge tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes 
i.MX fixes for 5.0, 2nd round:

It contains a single fix for i.MX8MQ clock numbers, removing the
duplicate use of 232 and numbering the clocks consecutively.

* tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: imx8mq: Number clocks consecutively

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2019-01-30 11:34:38 +01:00
Lubomir Rintel
401fbb34f5 Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock" 
It seems that the kernel has no business managing this clock: once the SP
clock is disabled, it's not sufficient to just enable it in order to bring
the SP core back up.

Pretty sure nothing ever used this and it's safe to remove.

This reverts commit e8a2c77914.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-01-24 10:55:33 -08:00
Felix Fietkau
6810ed320e
MIPS: ath79: export switch MDIO reference clock 
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz
clock. If that feature is not used, it defaults to the main reference
clock, like on all other SoC.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
 2019-01-22 11:17:22 -08:00
Felix Fietkau
9b56e0d0cc
MIPS: ath79: add helpers for setting clocks and expose the ref clock 
Preparation for transitioning the legacy clock setup code over
to OF.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
 2019-01-22 11:17:21 -08:00
Jerome Brunet
3705add0b7 dt-bindings: reset: meson-axg: fix SPDX license id 
As reported, the SPDX license id is not placed correctly and the variant
of the BSD License used should be specified.

Fixes: c16292578f ("dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller")
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
 2019-01-16 12:50:27 -06:00
Guido Günther
c5b11ee9f1 dt-bindings: imx8mq: Number clocks consecutively 
This fixes a duplicate use of 232 and numbers the clocks without holes.

Fixes: 1cf3817bf1 ("dt-bindings: Add binding for i.MX8MQ CCM")
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2019-01-16 21:27:02 +08:00
Linus Torvalds
645ff1e8e7 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input 
Pull input updates from Dmitry Torokhov:
 "A tiny pull request this merge window unfortunately, should get more
  material in for the next release:

   - new driver for Raspberry Pi's touchscreen (firmware interface)

   - miscellaneous input driver fixes"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: elan_i2c - add ACPI ID for touchpad in ASUS Aspire F5-573G
  Input: atmel_mxt_ts - don't try to free unallocated kernel memory
  Input: drv2667 - fix indentation issues
  Input: touchscreen - fix coding style issue
  Input: add official Raspberry Pi's touchscreen driver
  Input: nomadik-ske-keypad - fix a loop timeout test
  Input: rotary-encoder - don't log EPROBE_DEFER to kernel log
  Input: olpc_apsp - remove set but not used variable 'np'
  Input: olpc_apsp - enable the SP clock
  Input: olpc_apsp - check FIFO status on open(), not probe()
  Input: olpc_apsp - drop CONFIG_OLPC dependency
  clk: mmp2: add SP clock
  dt-bindings: marvell,mmp2: Add clock id for the SP clock
  Input: ad7879 - drop platform data support
 2019-01-02 18:56:59 -08:00
Linus Torvalds
0f2107daec One more patch to generalize a set of DT binding defines now before -rc1 
comes out. This way the SoC DTS files can use the proper defines from a
 stable tag.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk updates from Stephen Boyd:
 "One more patch to generalize a set of DT binding defines now before
  -rc1 comes out.

  This way the SoC DTS files can use the proper defines from a stable
  tag"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: imx8qxp: make the name of clock ID generic
 2019-01-02 18:45:50 -08:00
Linus Torvalds
35ddb06a46 - Introduce device-managed registration devm_mbox_controller_un/register and convert drivers to use it 
- Introduce flush api to support clients that must busy-wait in atomic context
 - Support multiple controllers per device
 - Hi3660: a bugfix and constify ops structure
 - TI-MsgMgr: off by one bugfix.
 - BCM: switch to spdx license
 - Tegra-HSP: support for shared mailboxes and suspend/resume.
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Merge tag 'mailbox-v4.21' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - Introduce device-managed registration
   devm_mbox_controller_un/register and convert drivers to use it

 - Introduce flush api to support clients that must busy-wait in atomic
   context

 - Support multiple controllers per device

 - Hi3660: a bugfix and constify ops structure

 - TI-MsgMgr: off by one bugfix.

 - BCM: switch to spdx license

 - Tegra-HSP: support for shared mailboxes and suspend/resume.

* tag 'mailbox-v4.21' of git://git.linaro.org/landing-teams/working/fujitsu/integration: (30 commits)
  mailbox: tegra-hsp: Use device-managed registration API
  mailbox: tegra-hsp: use devm_kstrdup_const()
  mailbox: tegra-hsp: Add suspend/resume support
  mailbox: tegra-hsp: Add support for shared mailboxes
  dt-bindings: tegra186-hsp: Add shared mailboxes
  mailbox: Allow multiple controllers per device
  mailbox: Support blocking transfers in atomic context
  mailbox: ti-msgmgr: Use device-managed registration API
  mailbox: stm32-ipcc: Use device-managed registration API
  mailbox: rockchip: Use device-managed registration API
  mailbox: qcom-apcs: Use device-managed registration API
  mailbox: platform-mhu: Use device-managed registration API
  mailbox: omap: Use device-managed registration API
  mailbox: mtk-cmdq: Remove needless devm_kfree() calls
  mailbox: mtk-cmdq: Use device-managed registration API
  mailbox: xgene-slimpro: Use device-managed registration API
  mailbox: sti: Use device-managed registration API
  mailbox: altera: Use device-managed registration API
  mailbox: imx: Use device-managed registration API
  mailbox: hi6220: Use device-managed registration API
  ...
 2019-01-02 18:41:38 -08:00
Linus Torvalds
78e8696c23 dmaengine-4.21-rc1 
dmaengine updates for v4.21-rc1
 
  - New driver for UniPhier MIO DMA controller
  - Remove R-Mobile APE6 support
  - Sprd driver updates and support for cyclic link-list
  - Remove dma_slave_config direction usage from rest of drivers
  - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers
 -----BEGIN PGP SIGNATURE-----
 
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Merge tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This includes a new driver, removes R-Mobile APE6 as it is no longer
  used, sprd cyclic dma support, last batch of dma_slave_config
  direction removal and random updates to bunch of drivers.

  Summary:
   - New driver for UniPhier MIO DMA controller
   - Remove R-Mobile APE6 support
   - Sprd driver updates and support for cyclic link-list
   - Remove dma_slave_config direction usage from rest of drivers
   - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers"

* tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (48 commits)
  dmaengine: qcom_hidma: convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: pxa: remove DBGFS_FUNC_DECL()
  dmaengine: mic_x100_dma: convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: amba-pl08x: convert to DEFINE_SHOW_ATTRIBUTE
  dmaengine: Documentation: Add documentation for multi chan testing
  dmaengine: dmatest: Add transfer_size parameter
  dmaengine: dmatest: Add alignment parameter
  dmaengine: dmatest: Use fixed point div to calculate iops
  dmaengine: dmatest: Add support for multi channel testing
  dmaengine: rcar-dmac: Document R8A774C0 bindings
  dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0
  dmaengine: zynqmp_dma: replace spin_lock_bh with spin_lock_irqsave
  dmaengine: sprd: Add me as one of the module authors
  dmaengine: sprd: Support DMA 2-stage transfer mode
  dmaengine: sprd: Support DMA link-list cyclic callback
  dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channel
  dmaengine: sprd: Fix the last link-list configuration
  dmaengine: sprd: Get transfer residue depending on the transfer direction
  dmaengine: sprd: Remove direction usage from struct dma_slave_config
  dmaengine: dmatest: fix a small memory leak in dmatest_func()
  ...
 2019-01-01 15:45:48 -08:00
Linus Torvalds
c9bef4a651 Pin control bulk changes for the v4.21 kernel cycle: 
No core changes this time.
 
 New drivers:
 
 - NXP (ex Freescale) i.MX 8 QXP SoC driver.
 
 - Mediatek MT6797 SoC driver.
 
 - Mediatek MT7629 SoC driver.
 
 - Actions Semiconductor S700 SoC driver.
 
 - Renesas RZ/A2 SoC driver.
 
 - Allwinner sunxi suniv F1C100 SoC driver.
 
 - Qualcomm PMS405 PMIC driver.
 
 - Microsemi Ocelot Jaguar2 SoC driver.
 
 Improvements:
 
 - Some RT improvements (using raw spinlocks where appropriate).
 
 - A lot of new pin sets on the Renesas PFC pin controllers.
 
 - GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
   chips, and Xway.
 
 - Major modernization of the Intel pin control drivers.
 
 - STM32 pin control driver will now synchronize usage of pins
   with another CPU using a hardware spinlock.
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Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "We have no core changes but lots of incremental development in drivers
  all over the place: Renesas, NXP, Mediatek and Actions Semiconductor
  keep churning out new SoCs.

  I have some subtree maintainers for Renesas and Intel helping out to
  keep down the load, it's been working smoothly (Samsung also have a
  subtree but it was not used this cycle.)

  New drivers:

   - NXP (ex Freescale) i.MX 8 QXP SoC driver.

   - Mediatek MT6797 SoC driver.

   - Mediatek MT7629 SoC driver.

   - Actions Semiconductor S700 SoC driver.

   - Renesas RZ/A2 SoC driver.

   - Allwinner sunxi suniv F1C100 SoC driver.

   - Qualcomm PMS405 PMIC driver.

   - Microsemi Ocelot Jaguar2 SoC driver.

  Improvements:

   - Some RT improvements (using raw spinlocks where appropriate).

   - A lot of new pin sets on the Renesas PFC pin controllers.

   - GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
     chips, and Xway.

   - Major modernization of the Intel pin control drivers.

   - STM32 pin control driver will now synchronize usage of pins with
     another CPU using a hardware spinlock"

* tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits)
  dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
  pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ
  pinctrl: imx-scu: Depend on IMX_SCU
  pinctrl: ocelot: Add dependency on HAS_IOMEM
  pinctrl: ocelot: add MSCC Jaguar2 support
  pinctrl: bcm: ns: support updated DT binding as syscon subnode
  dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
  MAINTAINERS: merge at91 pinctrl entries
  pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP
  pinctrl: uniphier: constify uniphier_pinctrl_socdata
  pinctrl: mediatek: improve Kconfig dependencies
  pinctrl: msm: mark PM functions as __maybe_unused
  dt-bindings: pinctrl: sunxi: Add supply properties
  pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD
  pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD
  pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
  pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
  pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
  pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
  pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
  ...
 2019-01-01 13:19:16 -08:00
Linus Torvalds
b7badd1d7a ARM: Device-tree updates 
As usual, this is where the bulk of our changes end up landing each
 merge window.
 
 The individual updates are too many to enumerate, many many platforms
 have seen additions of device descriptions such that they are
 functionally more complete (in fact, this is often the bulk of updates
 we see).
 
 Instead I've mostly focused on highlighting the new platforms below as
 they are introduced. Sometimes the introduction is of mostly a fragment,
 that later gets filled in on later releases, and in some cases it's
 near-complete platform support. The latter is more common for derivative
 platforms that already has similar support in-tree.
 
 Two SoCs are slight outliers from the usual range of additions. Allwinner
 support for F1C100s, a quite old SoC (ARMv5-based) shipping in the
 Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A,
 a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at
 infrastructure/networking.
 
 TI updates stick out in the diff stats too, in particular because they
 have moved the description of their L4 on-chip interconnect to devicetree,
 which opens up for removal of even more of their platform-specific
 'hwmod' description tables over the next few releases.
 
 SoCs:
  - Qualcomm QCS404 (4x Cortex-A53)
  - Allwinner T3 (rebranded R40) and f1c100s (armv5)
  - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
  - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
 
 New platforms:
  - Rockchip: Gru Scarlet (RK3188 Tablet)
  - Amlogic: Phicomm N1 (S905D), Libretech S805-AC
  - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
  - Qualcomm: QCS404 base platform and EVB
  - Qualcomm: Remove of Arrow SD600
  - PXA: First PXA3xx DT board: Raumfeld
  - Aspeed: Facebook Backpack-CMM BMC
  - Renesas iWave G20D-Q7 (RZ/G1N)
  - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
  - Allwinner Emlid Neutis N5, Mapleboard MP130
  - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
  - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
  - VF610: Liebherr's BK4 device, ZII SCU4 AIB board
  - i.MX7D PICO Hobbit baseboard
  - i.MX7ULP EVK board
  - NXP LX2160AQDS and LX2160ARDB boards
 
 Other:
  - Coresight binding updates across the board
  - CPU cooling maps updates across the board
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Device-tree updates from Olof Johansson:
 "As usual, this is where the bulk of our changes end up landing each
  merge window.

  The individual updates are too many to enumerate, many many platforms
  have seen additions of device descriptions such that they are
  functionally more complete (in fact, this is often the bulk of updates
  we see).

  Instead I've mostly focused on highlighting the new platforms below as
  they are introduced. Sometimes the introduction is of mostly a
  fragment, that later gets filled in on later releases, and in some
  cases it's near-complete platform support. The latter is more common
  for derivative platforms that already has similar support in-tree.

  Two SoCs are slight outliers from the usual range of additions.
  Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping
  in the Lychee Pi Nano platform. At the other end is NXP Layerscape
  LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O
  aimed at infrastructure/networking.

  TI updates stick out in the diff stats too, in particular because they
  have moved the description of their L4 on-chip interconnect to
  devicetree, which opens up for removal of even more of their
  platform-specific 'hwmod' description tables over the next few
  releases.

  SoCs:
   - Qualcomm QCS404 (4x Cortex-A53)
   - Allwinner T3 (rebranded R40) and f1c100s (armv5)
   - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
   - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)

  New platforms:
   - Rockchip: Gru Scarlet (RK3188 Tablet)
   - Amlogic: Phicomm N1 (S905D), Libretech S805-AC
   - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
   - Qualcomm: QCS404 base platform and EVB
   - Qualcomm: Remove of Arrow SD600
   - PXA: First PXA3xx DT board: Raumfeld
   - Aspeed: Facebook Backpack-CMM BMC
   - Renesas iWave G20D-Q7 (RZ/G1N)
   - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
   - Allwinner Emlid Neutis N5, Mapleboard MP130
   - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
   - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
   - VF610: Liebherr's BK4 device, ZII SCU4 AIB board
   - i.MX7D PICO Hobbit baseboard
   - i.MX7ULP EVK board
   - NXP LX2160AQDS and LX2160ARDB boards

  Other:
   - Coresight binding updates across the board
   - CPU cooling maps updates across the board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits)
  ARM: dts: suniv: Fix improper bindings include patch
  ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
  arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node
  ARM: dts: suniv: Fix improper bindings include patch
  arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
  arm64: dts: Remove unused properties from FSL QSPI driver nodes
  ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
  ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
  ARM: dts: Remove unused properties from FSL QSPI driver nodes
  arm64: dts: ti: k3-am654: Enable main domain McSPI0
  arm64: dts: ti: k3-am654: Add McSPI DT nodes
  arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
  arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
  arm64: dts: ti: k3-am65-main: Add ECAP PWM node
  arm64: dts: ti: k3-am654-base-board: Add I2C nodes
  arm64: dts: ti: am654-base-board: Add pinmux for main uart0
  arm64: dts: ti: k3-am65: Add pinctrl regions
  dt-bindings: pinctrl: k3: Introduce pinmux definitions
  ARM: dts: exynos: Specify I2S assigned clocks in proper node
  ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
  ...
 2018-12-31 17:36:02 -08:00
Linus Torvalds
d36377c6eb ARM: SoC driver updates 
Misc driver updates for platforms, many of them power related.
 
  - Rockchip adds power domain support for rk3066 and rk3188
  - Amlogic adds a power measurement driver
  - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1)
  - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
  - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
    stability of a handful of firmware/platform interfaces
  - PXA completes their conversion to dmaengine framework
  - Renesas does a bunch of PM cleanups across many platforms
  - Tegra adds support for suspend/resume on T186/T194, which includes
    some driver cleanups and addition of wake events
  - Tegra also adds a driver for memory controller (EMC) on Tegra2
  - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC
  - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
 
  + misc cleanups across several platforms
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Misc driver updates for platforms, many of them power related.

   - Rockchip adds power domain support for rk3066 and rk3188

   - Amlogic adds a power measurement driver

   - Allwinner adds SRAM support for three platforms (F1C100, H5, A64
     C1)

   - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7

   - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
     stability of a handful of firmware/platform interfaces

   - PXA completes their conversion to dmaengine framework

   - Renesas does a bunch of PM cleanups across many platforms

   - Tegra adds support for suspend/resume on T186/T194, which includes
     some driver cleanups and addition of wake events

   - Tegra also adds a driver for memory controller (EMC) on Tegra2

   - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
     GPC

   - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60

  and misc cleanups across several platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: at91: add support in soc driver for new SAM9X60
  ARM: at91: add support in soc driver for LPDDR2 SiP
  memory: omap-gpmc: Use of_node_name_eq for node name comparisons
  bus: ti-sysc: Check for no-reset and no-idle flags at the child level
  ARM: OMAP2+: Check also the first dts child for hwmod flags
  soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
  soc: imx: gpc: Increase GPC_CLK_MAX to 7
  soc: renesas: rcar-sysc: Fix power domain control after system resume
  soc: renesas: rcar-sysc: Merge PM Domain registration and linking
  soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
  soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
  dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
  dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
  dt-bindings: sram: Add Allwinner suniv F1C100s
  soc: sunxi: sram: Add support for the H5 SoC system control
  soc: sunxi: sram: Enable EMAC clock access for H3 variant
  soc: imx: gpcv2: add support for i.MX8MQ SoC
  soc: imx: gpcv2: move register access table to domain data
  soc: imx: gpcv2: prefix i.MX7 specific defines
  dmaengine: pxa: make the filter function internal
  ...
 2018-12-31 17:32:35 -08:00
Linus Torvalds
24dc83635f This is the bulk of GPIO changes for the v4.21 kernel series: 
Core changes:
 
 - Some core changes are already in outside of this pull
   request as they came through the regulator tree, most
   notably devm_gpiod_unhinge() that removes devres refcount
   management from a GPIO descriptor. This is needed in
   subsystems such as regulators where the regulator core
   need to take over the reference counting and lifecycle
   management for a GPIO descriptor.
 
 - We dropped devm_gpiochip_remove() and devm_gpio_chip_match()
   as nothing needs it. We can bring it back if need be.
 
 - Add a global TODO so people see where we are going. This
   helps setting the direction now that we are two GPIO
   maintainers.
 
 - Handle the MMC CD/WP properties in the device tree core.
   (The bulk of patches activating this code is already
   merged through the MMC/SD tree.)
 
 - Augment gpiochip_request_own_desc() to pass a flag so
   we as gpiochips can request lines as active low or open
   drain etc even from ourselves.
 
 New drivers:
 
 - New driver for Cadence GPIO blocks.
 
 - New driver for Atmel SAMA5D2 PIOBU GPIO lines.
 
 Driver improvements:
 
 - A major refactoring of the PCA953x driver - this driver has
   been around for ages, and is now modernized to reduce code
   duplication that has stacked up and is using regmap to read
   write and cache registers.
 
 - Intel drivers are now maintained in a separate tree and
   start with a round of cleanups and unifications.
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Merge tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.21 kernel series.

  Core changes:

   - Some core changes are already in outside of this pull request as
     they came through the regulator tree, most notably
     devm_gpiod_unhinge() that removes devres refcount management from a
     GPIO descriptor. This is needed in subsystems such as regulators
     where the regulator core need to take over the reference counting
     and lifecycle management for a GPIO descriptor.

   - We dropped devm_gpiochip_remove() and devm_gpio_chip_match() as
     nothing needs it. We can bring it back if need be.

   - Add a global TODO so people see where we are going. This helps
     setting the direction now that we are two GPIO maintainers.

   - Handle the MMC CD/WP properties in the device tree core. (The bulk
     of patches activating this code is already merged through the
     MMC/SD tree.)

   - Augment gpiochip_request_own_desc() to pass a flag so we as
     gpiochips can request lines as active low or open drain etc even
     from ourselves.

  New drivers:

   - New driver for Cadence GPIO blocks.

   - New driver for Atmel SAMA5D2 PIOBU GPIO lines.

  Driver improvements:

   - A major refactoring of the PCA953x driver - this driver has been
     around for ages, and is now modernized to reduce code duplication
     that has stacked up and is using regmap to read write and cache
     registers.

   - Intel drivers are now maintained in a separate tree and start with
     a round of cleanups and unifications"

* tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (99 commits)
  gpio: sama5d2-piobu: Depend on OF_GPIO
  gpio: Add Cadence GPIO driver
  dt-bindings: gpio: Add bindings for Cadence GPIO
  gpiolib-acpi: remove unused variable 'err', cleans up build warning
  gpio: mxs: read pin level directly instead of using .get
  gpio: aspeed: remove duplicated statement
  gpio: add driver for SAMA5D2 PIOBU pins
  dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller
  gpio/mmc/of: Respect polarity in the device tree
  dt-bindings: gpio: rcar: Add r8a774c0 (RZ/G2E) support
  memory: omap-gpmc: Get the header of the enum
  ARM: omap1: Fix new user of gpiochip_request_own_desc()
  gpio: pca953x: Add regmap dependency for PCA953x driver
  gpio: raspberrypi-exp: decrease refcount on firmware dt node
  gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB
  gpio: pca953x: Restore registers after suspend/resume cycle
  gpio: pca953x: Zap single use of pca953x_read_single()
  gpio: pca953x: Zap ad-hoc reg_output cache
  gpio: pca953x: Zap ad-hoc reg_direction cache
  gpio: pca953x: Perform basic regmap conversion
  ...
 2018-12-28 20:00:21 -08:00
Aisheng Dong
08972760d3 clk: imx8qxp: make the name of clock ID generic 
SCU clock can be used in a similar way by IMX8QXP and IMX8QM SoCs.
Let's make the name of clock ID generic to allow other SoCs to reuse
the common part.

This patch only changes the clock id name and file name, so no
functional change.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-28 10:43:57 -08:00
Aisheng Dong
88cc9fc41c dt-bindings: arm: fsl-scu: add imx8qm pinctrl support 
Update binding doc to support imx8qm pinctrl.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2018-12-27 10:42:11 +01:00
Linus Torvalds
1fbb2dc6f0 This round is dominated by NXP's i.MX clk drivers. We gained support for two or 
three i.MX SoCs in here and that mostly means a lot of driver code and data.
 Beyond that platform, there are some new Mediatek, Amlogic, and Qualcomm clk
 drivers added in here, and then we get to the long tail of driver updates and
 non-critical fixes all around, including code for vendors such as Renesas,
 Rockchip, Nvidia, and Allwinner. Overall, the driver updates look normal.
 
 Beyond the usual driver updates we have an update to make registering OF based
 clk providers a little simpler when they're devices created as a child of a
 device backed by a node in DT. Drivers don't have to jump through hoops to
 unregister the provider upon driver removal anymore because the API does the
 right thing and uses the parent device DT node.
 
 Core:
  - Make devm_of_clk_add_hw_provider() use parent dt node if necessary
  - Various SPDX taggings
  - Mark clk_ops const when possible
 
 New Drivers:
  - NXP i.MX7ULP SoC clock support
  - NXP i.MX8QXP SoC clock support
  - NXP i.MX8MQ SoC clock support
  - NXP QorIQ T1023 SoC support
  - Qualcomm SDM845 audio subsystem clks
  - Qualcomm SDM845 GPU clck controllers
  - Qualcomm QCS404 RPM clk support
  - Mediatek MT7629 SoC clk controllers
  - Allwinner F1c100s SoC clocks
  - Allwinner H6 display engine clocks
  - Amlogic GX video clocks
  - Support for Amlogic meson8b CPU frequency scaling
  - Amlogic Meson8b CPU post-divider clocks
 
 Updates:
  - Proper suspend/resume on VersaClock5
  - Shrink code some with DEFINE_SHOW_ATTRIBUTE()
  - Register fixes for Rockchip rk3188 and rk3328
  - One new critical clock for Rockchip rk3188 and a fixed clock id (double used number)
  - New clock id for Rockchip rk3328
  - Amlogic Meson8/Meson8b video clock support
  - Amlogic got a clk-input helper and used it for the axg-audio clock driver
  - Sigma Delta modulation for the Allwinner A33 audio clocks
  - Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and RZ/G2 SoCs
  - Support for SDHI HS400 clocks on early revisions of Renesas R-Car H3 and M3-W
  - Support for SDHI and USB clocks on Renesas RZ/A2
  - Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas R-Car V3M
  - Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks, etc.)
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round is dominated by NXP's i.MX clk drivers. We gained support
  for two or three i.MX SoCs in here and that mostly means a lot of
  driver code and data.

  Beyond that platform, there are some new Mediatek, Amlogic, and
  Qualcomm clk drivers added in here, and then we get to the long tail
  of driver updates and non-critical fixes all around, including code
  for vendors such as Renesas, Rockchip, Nvidia, and Allwinner. Overall,
  the driver updates look normal.

  Apart from the usual driver updates we have an update to make
  registering OF based clk providers a little simpler when they're
  devices created as a child of a device backed by a node in DT. Drivers
  don't have to jump through hoops to unregister the provider upon
  driver removal anymore because the API does the right thing and uses
  the parent device DT node.

  Summary:

  Core:
   - Make devm_of_clk_add_hw_provider() use parent dt node if necessary
   - Various SPDX taggings
   - Mark clk_ops const when possible

  New Drivers:
   - NXP i.MX7ULP SoC clock support
   - NXP i.MX8QXP SoC clock support
   - NXP i.MX8MQ SoC clock support
   - NXP QorIQ T1023 SoC support
   - Qualcomm SDM845 audio subsystem clks
   - Qualcomm SDM845 GPU clck controllers
   - Qualcomm QCS404 RPM clk support
   - Mediatek MT7629 SoC clk controllers
   - Allwinner F1c100s SoC clocks
   - Allwinner H6 display engine clocks
   - Amlogic GX video clocks
   - Support for Amlogic meson8b CPU frequency scaling
   - Amlogic Meson8b CPU post-divider clocks

  Updates:
   - Proper suspend/resume on VersaClock5
   - Shrink code some with DEFINE_SHOW_ATTRIBUTE()
   - Register fixes for Rockchip rk3188 and rk3328
   - One new critical clock for Rockchip rk3188 and a fixed clock id
     (double used number)
   - New clock id for Rockchip rk3328
   - Amlogic Meson8/Meson8b video clock support
   - Amlogic got a clk-input helper and used it for the axg-audio clock
     driver
   - Sigma Delta modulation for the Allwinner A33 audio clocks
   - Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Support for SDHI HS400 clocks on early revisions of Renesas R-Car
     H3 and M3-W
   - Support for SDHI and USB clocks on Renesas RZ/A2
   - Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas
     R-Car V3M
   - Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks,
     etc)"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (172 commits)
  clk: imx: imx7ulp: add arm hsrun mode clocks support
  dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
  clk: Use of_node_name_eq for node name comparisons
  clk: vc5: Add suspend/resume support
  clk: qcom: Drop unused 8998 clock
  clk: qcom: Leave mmss noc on for 8998
  clk: tegra: Return the exact clock rate from clk_round_rate
  clk: tegra30: Use Tegra CPU powergate helper function
  soc/tegra: pmc: Drop SMP dependency from CPU APIs
  clk: tegra: Fix maximum audio sync clock for Tegra124/210
  clk: tegra: get rid of duplicate defines
  clk: imx: add imx8qxp lpcg driver
  clk: imx: add lpcg clock support
  clk: imx: add imx8qxp clk driver
  clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant
  clk: imx: add scu clock common part
  clk: imx: add configuration option for mmio clks
  dt-bindings: clock: add imx8qxp lpcg clock binding
  dt-bindings: clock: imx8qxp: add SCU clock IDs
  clk: qcom: Add missing msm8998 resets
  ...
 2018-12-25 14:57:37 -08:00
Linus Torvalds
79f20778fb regulator: Updates for v4.20 
This has been a very busy release for the core, some fixes, one large new
 feature and a big bit of refactoring to update the GPIO API:
 
  - Support for coupled regulators from Dmitry Osipenko based on a prior
    attempt by Maciej Purski, allowing us to handle situations where the
    voltages on two regulators can't be too far apart from each other.
  - Conversion of the GPIO support in both drivers and the core to use
    GPIO descriptors rather than numbers, part of the overall project to
    remove GPIO numbers.
  - Support for standby mode suspend states from Andrei Stefanescu.
  - New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and
    Microchip MPC16502.
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Merge tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown:
 "This has been a very busy release for the core, some fixes, one large
  new feature and a big bit of refactoring to update the GPIO API:

   - Support for coupled regulators from Dmitry Osipenko based on a
     prior attempt by Maciej Purski, allowing us to handle situations
     where the voltages on two regulators can't be too far apart from
     each other.

   - Conversion of the GPIO support in both drivers and the core to use
     GPIO descriptors rather than numbers, part of the overall project
     to remove GPIO numbers.

   - Support for standby mode suspend states from Andrei Stefanescu.

   - New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and
     Microchip MPC16502"

* tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (90 commits)
  regulator: tps65910: fix a missing check of return value
  regulator: mcp16502: Select REGMAP_I2C to fix build error
  regulator: convert to DEFINE_SHOW_ATTRIBUTE
  regulator: mcp16502: Fix missing n_voltages setting
  regulator: mcp16502: Use #ifdef CONFIG_PM_SLEEP around mcp16502_suspend/resume_noirq
  regulator: mcp16502: code cleanup
  regulator: act8945a-regulator: make symbol act8945a_pm static
  drivers/regulator: fix a missing check of return value
  regulator: act8945a-regulator: fix 'defined but not used' compiler warning
  regulator: axp20x: fix set_ramp_delay for AXP209/dcdc2
  regulator: mcp16502: add support for suspend
  mfd: axp20x: use explicit bit defines
  mfd: axp20x: Clean up included headers
  regulator: dts: enable soft-start and ramp delay for the OLinuXino Lime2
  dt-bindings: mfd: axp20x: Add software based soft_start for AXP209 LDO3
  regulator: axp20x: add software based soft_start for AXP209 LDO3
  dt-bindings: mfd: axp20x: add support for regulator-ramp-delay for AXP209
  regulator: axp20x: add support for set_ramp_delay for AXP209
  mfd: axp20x: name voltage ramping define properly
  regulator: mcp16502: add regulator driver for MCP16502
  ...
 2018-12-25 14:38:31 -08:00
Linus Torvalds
8e61e7b5c4 sound updates for 4.21 
There are no intensive changes in both ALSA and ASoC core parts while
 rather most of changes are a bunch of driver fixes and updates.
 A large diff pattern appears in ASoC TI part which now merges both
 OMAP and DaVinci stuff, but the rest spreads allover the places.
 
 Note that this pull request includes also some updates for LED trigger
 and platform drivers for mute LEDs, appearing in the diffstat as well.
 
 Some highlights:
 
 ASoC:
 - Preparatory work for merging the audio-graph and audio-graph-scu
   cards
 - A merge of TI OMAP and DaVinci directories, as both product lines
   get merged together.  Also including a few architecture changes as
   well.
 - Major cleanups of the Maxim MAX9867 driver
 - Small fixes for tablets & co with Intel BYT/CHT chips
 - Lots of rsnd updates as usual
 - Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with
   RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx I2S
   controllers
 
 HD-audio:
 - Introduce audio-mute LED trigger for replacing the former hackish
   dynamic binding
 - Huawei WMI hotkey and mute LED support
 - Refactoring of PM code and display power controls
 - Headset button support in the generic jack code
 - A few updates for Tegra
 - Fixups for HP EliteBook and ASUS UX391UA
 - Lots of updates for Intel ASoC HD-audio, including the improved DSP
   detection and the fallback binding from ASoC SST to legacy HD-audio
   controller drivers
 
 Others:
 - Updates for FireWire TASCAM and Fireface devices, some other fixes
 - A few potential Spectre v1 fixes that are all trivial
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Merge tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "There are no intensive changes in both ALSA and ASoC core parts while
  rather most of changes are a bunch of driver fixes and updates. A
  large diff pattern appears in ASoC TI part which now merges both OMAP
  and DaVinci stuff, but the rest spreads allover the places.

  Note that this pull request includes also some updates for LED trigger
  and platform drivers for mute LEDs, appearing in the diffstat as well.

  Some highlights:

  ASoC:
   - Preparatory work for merging the audio-graph and audio-graph-scu
     cards
   - A merge of TI OMAP and DaVinci directories, as both product lines
     get merged together. Also including a few architecture changes as
     well.
   - Major cleanups of the Maxim MAX9867 driver
   - Small fixes for tablets & co with Intel BYT/CHT chips
   - Lots of rsnd updates as usual
   - Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with
     RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx
     I2S controllers

  HD-audio:
   - Introduce audio-mute LED trigger for replacing the former hackish
     dynamic binding
   - Huawei WMI hotkey and mute LED support
   - Refactoring of PM code and display power controls
   - Headset button support in the generic jack code
   - A few updates for Tegra
   - Fixups for HP EliteBook and ASUS UX391UA
   - Lots of updates for Intel ASoC HD-audio, including the improved DSP
     detection and the fallback binding from ASoC SST to legacy HD-audio
     controller drivers

  Others:
   - Updates for FireWire TASCAM and Fireface devices, some other fixes
   - A few potential Spectre v1 fixes that are all trivial"

* tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (280 commits)
  ALSA: HD-Audio: SKL+: force HDaudio legacy or SKL+ driver selection
  ALSA: HD-Audio: SKL+: abort probe if DSP is present and Skylake driver selected
  ALSA: HDA: export process_unsol_events()
  ALSA: hda/realtek: Enable audio jacks of ASUS UX391UA with ALC294
  ALSA: bebob: fix model-id of unit for Apogee Ensemble
  ALSA: emu10k1: Fix potential Spectre v1 vulnerabilities
  ALSA: rme9652: Fix potential Spectre v1 vulnerability
  ASoC: ti: Kconfig: Remove the deprecated options
  ARM: davinci_all_defconfig: Update the audio options
  ARM: omap1_defconfig: Do not select ASoC by default
  ARM: omap2plus_defconfig: Update the audio options
  ARM: davinci: dm365-evm: Update for the new ASoC Kcofnig options
  ARM: OMAP2: Update for new MCBSP Kconfig option
  ARM: OMAP1: Makefile: Update for new MCBSP Kconfig option
  MAINTAINERS: Add entry for sound/soc/ti and update the OMAP audio support
  ASoC: ti: Merge davinci and omap directories
  ALSA: hda: add mute LED support for HP EliteBook 840 G4
  ALSA: fireface: code refactoring to handle model-specific registers
  ALSA: fireface: add support for packet streaming on Fireface 800
  ALSA: fireface: allocate isochronous resources in mode-specific implementation
  ...
 2018-12-25 13:19:10 -08:00
Mikko Perttunen
fed8b7e366 dt-bindings: tegra186-hsp: Add shared mailboxes 
Shared mailboxes are a mechanism to transport data from one processor in
the system to another. They are bidirectional links with both a producer
and a consumer. Interrupts are used to let the consumer know when data
was written to the mailbox by the producer, and to let the producer know
when the consumer has read the data from the mailbox. These interrupts
are mapped to one or more "shared interrupts". Typically each processor
in the system owns one of these shared interrupts.

Add documentation to the device tree bindings about how clients can use
mailbox specifiers to request a specific shared mailbox and select which
direction they drive. Also document how to specify the shared interrupts
in addition to the existing doorbell interrupt.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Arnd Bergmann
10f9d7fd56 AM65x DT changes for 4.21. Includes: 
- Pinctrl support
 - I2C support
 - ECAP PWM support
 - Power domain handling for UARTs
 - McSPI support
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Merge tag 'am654-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into next/dt

AM65x DT changes for 4.21. Includes:

- Pinctrl support
- I2C support
- ECAP PWM support
- Power domain handling for UARTs
- McSPI support

* tag 'am654-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-am654: Enable main domain McSPI0
  arm64: dts: ti: k3-am654: Add McSPI DT nodes
  arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
  arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
  arm64: dts: ti: k3-am65-main: Add ECAP PWM node
  arm64: dts: ti: k3-am654-base-board: Add I2C nodes
  arm64: dts: ti: am654-base-board: Add pinmux for main uart0
  arm64: dts: ti: k3-am65: Add pinctrl regions
  dt-bindings: pinctrl: k3: Introduce pinmux definitions
  arm64: dts: ti: k3-am654: Fix wakeup_uart reg address

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2018-12-20 16:37:44 +01:00
Stephen Boyd
b677574bdf Merge branch 'clk-imx7ulp' into clk-next 
* clk-imx7ulp:
  clk: imx: imx7ulp: add arm hsrun mode clocks support
  dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
 2018-12-14 14:03:38 -08:00
Anson Huang
401371fb59 dt-bindings: clock: imx7ulp: add HSRUN mode related clocks 
There are HSRUN mode clock mux and divider in SCG1 module,
and SMC1 can control i.MX7ULP CPU to run in RUN mode or
HSRUN mode, the mode switch bits are actually a clock mux,
add these clocks for clock driver and dtb to use.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-14 14:03:11 -08:00
Stephen Boyd
44a6951777 Merge branch 'clk-qcom-8998-resets' into clk-next 
- Add resets and make Qualcomm MSM8998 GCC driver more functional

* clk-qcom-8998-resets:
  clk: qcom: Drop unused 8998 clock
  clk: qcom: Leave mmss noc on for 8998
  clk: qcom: Add missing msm8998 resets
  clk: qcom: gcc-msm8998: Add clkref clocks
  clk: qcom: gcc-msm8998: Disable halt check of UFS clocks
  clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_at
  clk: qcom: Enumerate remaining msm8998 resets
  clk: qcom: Add xo dummy clk on msm8998
  clk: qcom: Fix MSM8998 resets
 2018-12-14 13:42:00 -08:00
Stephen Boyd
58c05c823b Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp' and 'clk-imx8mq' into clk-next 
- NXP i.MX7ULP SoC clock support
 - Support for i.MX8QXP SoC clocks
 - Support for NXP i.MX8MQ clock controllers

* clk-imx7ulp:
  clk: imx: add imx7ulp clk driver
  clk: imx: implement new clk_hw based APIs
  clk: imx: make mux parent strings const
  dt-bindings: clock: add imx7ulp clock binding doc
  clk: imx: add imx7ulp composite clk support
  clk: imx: add pfdv2 support
  clk: imx: add pllv4 support
  clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
  clk: imx: add gatable clock divider support

* clk-imx6-fixes:
  clk: imx6q: handle ENET PLL bypass
  clk: imx6q: optionally get CCM inputs via standard clock handles
  clk: imx6q: reset exclusive gates on init

* clk-imx-fixes:
  clk: imx6q: add DCICx clocks gate
  clk: imx6sl: ensure MMDC CH0 handshake is bypassed
  clk: imx7d: remove UART1 clock setting

* clk-imx8qxp:
  clk: imx: add imx8qxp lpcg driver
  clk: imx: add lpcg clock support
  clk: imx: add imx8qxp clk driver
  clk: imx: add scu clock common part
  clk: imx: add configuration option for mmio clks
  dt-bindings: clock: add imx8qxp lpcg clock binding
  dt-bindings: clock: imx8qxp: add SCU clock IDs
  firmware: imx: add pm svc headfile
  dt-bindings: fsl: scu: update power domain binding
  firmware: imx: remove resource id enums
  dt-bindings: imx: add scu resource id headfile

* clk-imx8mq:
  clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant
  clk: imx: remove redundant initialization of ret to zero
  clk: imx: Add SCCG PLL type
  clk: imx: Add fractional PLL output clock
  clk: imx: Add clock driver for i.MX8MQ CCM
  clk: imx: Add imx composite clock
  dt-bindings: Add binding for i.MX8MQ CCM
 2018-12-14 13:34:47 -08:00
Stephen Boyd
ffe05540d1 Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and 'clk-rockchip' into clk-next 
* clk-renesas:
  clk: renesas: rcar-gen3: Add HS400 quirk for SD clock
  clk: renesas: rcar-gen3: Add documentation for SD clocks
  clk: renesas: rcar-gen3: Set state when registering SD clocks
  clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
  clk: renesas: r8a77995: Add missing CPEX clock
  clk: renesas: r8a77995: Remove non-existent SSP clocks
  clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks
  clk: renesas: r8a77995: Correct parent clock of DU
  clk: renesas: r8a77990: Correct parent clock of DU
  clk: renesas: r8a77970: Add CPEX clock
  clk: renesas: r8a77965: Add CPEX clock
  clk: renesas: r8a7796: Add CPEX clock
  clk: renesas: r8a7795: Add CPEX clock
  clk: renesas: r8a774a1: Add CPEX clock
  dt-bindings: clock: r8a7796: Remove CSIREF clock
  dt-bindings: clock: r8a7795: Remove CSIREF clock
  clk: renesas: Mark rza2_cpg_clk_register static
  clk: renesas: r7s9210: Add USB clocks
  clk: renesas: r8a77970: Add RPC clocks
  clk: renesas: r7s9210: Add SDHI clocks

* clk-allwinner:
  clk: sunxi-ng: a64: Allow parent change for VE clock
  clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks
  clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: h3: Allow parent change for ve clock
  clk: sunxi-ng: add support for suniv F1C100s SoC
  dt-bindings: clock: Add Allwinner suniv F1C100s CCU
  clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
  clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
  clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: a64: Fix gate bit of DSI DPHY
  clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
  clk: sunxi-ng: Add support for H6 DE3 clocks
  dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
  clk: sunxi-ng: h6: Set video PLLs limits
  clk: sunxi-ng: Use u64 for calculation of NM rate
  clk: sunxi-ng: Adjust MP clock parent rate when allowed
  clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width
  clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock

* clk-tegra:
  clk: tegra: Return the exact clock rate from clk_round_rate
  clk: tegra30: Use Tegra CPU powergate helper function
  soc/tegra: pmc: Drop SMP dependency from CPU APIs
  clk: tegra: Fix maximum audio sync clock for Tegra124/210
  clk: tegra: get rid of duplicate defines
  clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC
  clk: tegra20: Turn EMC clock gate into divider

* clk-meson: (25 commits)
  clk: meson: axg-audio: use the clk input helper function
  clk: meson: add clk-input helper function
  clk: meson: Mark some things static
  clk: meson: meson8b: add the read-only video clock trees
  clk: meson: meson8b: add the fractional divider for vid_pll_dco
  clk: meson: meson8b: fix the offset of vid_pll_dco's N value
  clk: meson: Fix GXL HDMI PLL fractional bits width
  clk: meson: meson8b: add the CPU clock post divider clocks
  clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3
  clk: meson: clk-regmap: add read-only gate ops
  clk: meson: meson8b: allow changing the CPU clock tree
  clk: meson: meson8b: run from the XTAL when changing the CPU frequency
  clk: meson: meson8b: add support for more M/N values in sys_pll
  clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL
  clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel
  clk: meson: clk-pll: check if the clock is already enabled
  clk: meson: meson8b: fix the width of the cpu_scale_div clock
  clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table
  clk: meson: meson8b: use the HHI syscon if available
  dt-bindings: clock: meson8b: use the registers from the HHI syscon
  ...

* clk-rockchip:
  clk: rockchip: add clock-id to gate of ACODEC for rk3328
  clk: rockchip: add clock ID of ACODEC for rk3328
  clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
  clk: rockchip: fix I2S1 clock gate register for rk3328
  clk: rockchip: make rk3188 hclk_vio_bus critical
  clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering
  clk: rockchip: fix rk3188 sclk_smc gate data
  clk: rockchip: fix typo in rk3188 spdif_frac parent
 2018-12-14 13:34:00 -08:00
Stephen Boyd
1a501c8def Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and 'clk-ops-const' into clk-next 
- Make devm_of_clk_add_hw_provider() use parent dt node if necessary
 - Various SPDX taggings
 - Mark clk_ops const when possible

* clk-managed-registration:
  clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock
  clk: apcs-msm8916: simplify probe cleanup by using devm
  clk: clk-twl6040: Free of_provider at remove
  clk: rk808: use managed version of of_provider registration
  clk: clk-hi655x: Free of_provider at remove
  clk: of-provider: look at parent if registered device has no provider info
  clk: Add kerneldoc to managed of-provider interfaces

* clk-spdx:
  clk: Tag basic clk types with SPDX
  clk: Tag clk core files with SPDX
  clk: bcm2835: Switch to SPDX identifier

* clk-remove-basic:
  clk: Loongson1: Remove usage of CLK_IS_BASIC
  clk: samsung: s3c2410: Remove usage of CLK_IS_BASIC
  clk: versatile: sp810: Remove usage of CLK_IS_BASIC
  clk: hisilicon: Remove usage of CLK_IS_BASIC
  clk: h8300: Remove usage of CLK_IS_BASIC
  clk: axm5516: Remove usage of CLK_IS_BASIC
  clk: st: Remove usage of CLK_IS_BASIC
  clk: renesas: Remove usage of CLK_IS_BASIC

* clk-ops-const:
  clk: s2mps11: constify clk_ops structure
  clk: pxa: constify clk_ops structures
  clk: pistachio: constify clk_ops structures
  clk: palmas: constify clk_ops structure
  clk: max77686: constify clk_ops structure
 2018-12-14 13:33:44 -08:00
Stephen Boyd
3315fe5faf Merge branch 'clk-qcom-sdm845-lpass' into clk-next 
- Qualcomm SDM845 audio subsystem clks

* clk-qcom-sdm845-lpass:
  clk: qcom: Add lpass clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM LPASS clock bindings
  dt-bindings: clock: Update GCC bindings for protected-clocks
 2018-12-14 13:27:53 -08:00
Stephen Boyd
f4ad7fba06 Merge branches 'clk-qcom-kconfig', 'clk-qcom-gpucc', 'clk-qcom-qcs404-rpm', 'clk-qcom-spi' and 'clk-qcom-videocc-binding' into clk-next 
- Qualcomm SDM845 GPU clock controllers
 - Qualcomm QCS404 RPM clk support

* clk-qcom-kconfig:
  clk: qcom: Move to menuconfig and reduce lines

* clk-qcom-gpucc:
  dt-bindings: clock: qcom: Fix the xo parent in gpucc example
  clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6
  clk: qcom: Add a dummy enable function for GX gdsc
  clk: qcom: gdsc: Don't override existing gdsc pd functions
  clk: qcom: Add graphics clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Graphics clock bindings

* clk-qcom-qcs404-rpm:
  clk: qcom: smd: Add support for QCS404 rpm clocks

* clk-qcom-spi:
  clk: qcom: msm8916: Additional clock rates for spi

* clk-qcom-videocc-binding:
  dt-bindings: clock: Require #reset-cells in sdm845-videocc
 2018-12-14 13:27:11 -08:00
Rohit kumar
76119509d2
ASoC: qdsp6: dt-bindings: Add q6afe display_port dt binding 
This patch adds bindings required for DISPLAY_PORT_RX
port on AFE.

Signed-off-by: Rohit kumar <rohitkr@codeaurora.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
 2018-12-14 12:48:48 +00:00
Vignesh R
fc66393ab5 dt-bindings: pinctrl: k3: Introduce pinmux definitions 
The dt-bindings header for TI K3 AM6 SoCs define a set of macros for
defining pinmux configs in human readable form, instead of raw-coded
hex values.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2018-12-14 09:56:43 +02:00
Aisheng Dong
0f5ab411f5 dt-bindings: clock: add imx8qxp lpcg clock binding 
The Low-Power Clock Gate (LPCG) modules contain a local programming
model to control the clock gates for the peripherals. An LPCG module
is used to locally gate the clocks for the associated peripheral.

Note:
This level of clock gating is provided after the clocks are generated
by the SCU resources and clock controls. Thus even if the clock is
enabled by these control bits, it might still not be running based
on the base resource.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-13 22:12:46 -08:00
Aisheng Dong
8cecda9164 dt-bindings: clock: imx8qxp: add SCU clock IDs 
Add IMX8QXP SCU clock IDs.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-13 22:12:46 -08:00
Olof Johansson
e3154317a0 i.MX drivers change for 4.21: 
- A series from Aisheng that improves SCU power domain bindings by
    defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
    driver support on top of it.
  - A series from Lucas that updates gpcv2 driver for scalability and
    adds i.MX8MQ support into the driver.
  - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
    domain on imx6sx has 7 clocks.
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Merge tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

i.MX drivers change for 4.21:
 - A series from Aisheng that improves SCU power domain bindings by
   defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
   driver support on top of it.
 - A series from Lucas that updates gpcv2 driver for scalability and
   adds i.MX8MQ support into the driver.
 - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
   domain on imx6sx has 7 clocks.

* tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: Increase GPC_CLK_MAX to 7
  soc: imx: gpcv2: add support for i.MX8MQ SoC
  soc: imx: gpcv2: move register access table to domain data
  soc: imx: gpcv2: prefix i.MX7 specific defines
  firmware: imx: add SCU power domain driver
  firmware: imx: add pm svc headfile
  dt-bindings: fsl: scu: update power domain binding
  firmware: imx: remove resource id enums
  dt-bindings: imx: add scu resource id headfile

Signed-off-by: Olof Johansson <olof@lixom.net>
 2018-12-12 13:33:06 -08:00
Olof Johansson
48ff08dd9a Renesas ARM Based SoC Drivers Updates for v4.21 
SYSC Driver:
 * Common
   - Fix power domain control after system resume
   - Merge PM Domain registration and linking
   - Remove rcar_sysc_power_{down,up}() helpers
 * R-Car E3 (r8a77990) SoC
   - Fix initialization order of 3DG-{A,B}
 * R-Car V3H (r8a77980) SoC
   - Correct A3VIP[012] power domain hierarchy
   - Correct names of A2DP[01] power domains
 * R-Car V3M (r8a77970) SoC
   - Correct names of A2DP/A2CN power domains
   - emove non-existent CR7 power domain
 * R-Car M3-N (r8a77965) SoC
   - Remove non-existent A3IR power domain
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Merge tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Drivers Updates for v4.21

SYSC Driver:
* Common
  - Fix power domain control after system resume
  - Merge PM Domain registration and linking
  - Remove rcar_sysc_power_{down,up}() helpers
* R-Car E3 (r8a77990) SoC
  - Fix initialization order of 3DG-{A,B}
* R-Car V3H (r8a77980) SoC
  - Correct A3VIP[012] power domain hierarchy
  - Correct names of A2DP[01] power domains
* R-Car V3M (r8a77970) SoC
  - Correct names of A2DP/A2CN power domains
  - emove non-existent CR7 power domain
* R-Car M3-N (r8a77965) SoC
  - Remove non-existent A3IR power domain

* tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: Fix power domain control after system resume
  soc: renesas: rcar-sysc: Merge PM Domain registration and linking
  soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
  soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
  soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy
  soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
  soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
  soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
  soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain

Signed-off-by: Olof Johansson <olof@lixom.net>
 2018-12-12 13:27:40 -08:00
Olof Johansson
ac3e0be697 ARM: dts: Amlogic updates for v4.21, round 2 
Highlights
 - add CPU OPP tables
 - timers: add global timer and TWD
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Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

ARM: dts: Amlogic updates for v4.21, round 2

Highlights
- add CPU OPP tables
- timers: add global timer and TWD

* tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson: meson8b: add the CPU OPP tables
  ARM: dts: meson: meson8: add the CPU OPP table
  ARM: dts: meson8b: add the Cortex-A5 global timer
  ARM: dts: meson8b: add the ARM TWD timer
  ARM: dts: meson8: add the Cortex-A9 global timer
  ARM: dts: meson8: add the ARM TWD timer
  ARM: dts: meson: group the Cortex-A5 / Cortex-A9 peripherals
  dt-bindings: clock: meson8b: export the CPU post dividers

Signed-off-by: Olof Johansson <olof@lixom.net>
 2018-12-12 13:02:51 -08:00
Olof Johansson
fafda335f8 i.MX7ULP device tree for 4.21: 
- It includes the initial device tree for i.MX7ULP SoC and EVK board
    support.
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Merge tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

i.MX7ULP device tree for 4.21:
 - It includes the initial device tree for i.MX7ULP SoC and EVK board
   support.

* tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx: add imx7ulp evk support
  ARM: dts: imx: add common imx7ulp dtsi support
  dt-bindings: fsl: add imx7ulp pm related components bindings
  dt-bindings: fsl: add compatible for imx7ulp evk
  clk: imx: add imx7ulp clk driver
  clk: imx: implement new clk_hw based APIs
  clk: imx: make mux parent strings const
  dt-bindings: clock: add imx7ulp clock binding doc
  clk: imx: add imx7ulp composite clk support
  clk: imx: add pfdv2 support
  clk: imx: add pllv4 support
  clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
  clk: imx: add gatable clock divider support

Signed-off-by: Olof Johansson <olof@lixom.net>
 2018-12-12 12:56:36 -08:00
Boris Brezillon
7482d6ecc6
regulator: act8945a-regulator: Implement PM functionalities 
The regulator supports a dedicated suspend mode.
Implement the appropriate ->set_suspend_xx() hooks, add support for
->set_mode(), and provide basic PM ops functionalities to setup the
regulator in a suspend state when the system is entering suspend.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
[claudiu.beznea@microchip.com: remove shutdown function, use dev_pm_ops,
 fix checkpatch warning, adapt commit message, add LDO modes support,
 move modes constants to active-semi,8945a-regulator.h, remove rdevs from
 struct act8945a_pmic, add op_mode to act8945a_pmic]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
 2018-12-12 16:59:04 +00:00
Jeffrey Hugo
a1697aba27 clk: qcom: Add missing msm8998 resets 
commit c0cb7c7e71 ("clk: qcom: Enumerate remaining msm8998 resets")
missed two USB2 resets.  Add them.

Fixes: c0cb7c7e71 ("clk: qcom: Enumerate remaining msm8998 resets")
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-11 13:25:24 -08:00
Olof Johansson
44a26c894b dt-bindings: Changes for v4.21-rc1 
This contains a few cleanups of and additions to existing device tree
 bindings, such as XUSB, EMC, PMC and thermal.
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Merge tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

dt-bindings: Changes for v4.21-rc1

This contains a few cleanups of and additions to existing device tree
bindings, such as XUSB, EMC, PMC and thermal.

* tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: tegra186-pmc: Add interrupt controller properties
  dt-bindings: thermal: tegra-bpmp: Add Tegra194 support
  dt: bindings: Move tegra20-emc binding to memory-controllers directory
  dt: bindings: tegra20-emc: Document clock property
  dt: bindings: tegra20-emc: Document interrupt property
  dt-bindings: usb: xhci-tegra: Add power-domain details

Signed-off-by: Olof Johansson <olof@lixom.net>
 2018-12-11 08:05:17 -08:00
Anson Huang
929914946f clk: imx6q: add DCICx clocks gate 
On i.MX6QP/i.MX6Q/i.MX6DL, there are DCIC1/DCIC2 clocks
gate in CCM_CCGR0 register, add them into clock tree for
clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-10 11:34:50 -08:00
Thierry Reding
25fbc9e8d3 dt-bindings: tegra186-gpio: Add Tegra186 specific prefix 
Subsequent generations of Tegra, such as Tegra194, contain a completely
different set of GPIOs. In order to clarify that the Tegra186 defines
are indeed specific to Tegra186, change the prefix from TEGRA_ to
TEGRA186_.

Note that for now we need to keep the old definitions in place to avoid
breaking compilation in file that use this header. Once all users have
been converted to use the new defines, the old ones can be removed.

Also note that this is only a naming change and doesn't affect device
tree ABI.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2018-12-07 11:07:12 +01:00
Bjorn Andersson
30bc0b9881 clk: qcom: gcc-msm8998: Add clkref clocks 
Add clkref clocks for usb3, hdmi, ufs, pcie, and usb2. They are all
sourced off CXO_IN, so parent them off "xo" until a proper link to the
rpmcc can be described in DT.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-05 15:57:49 -08:00
Jeffrey Hugo
c0cb7c7e71 clk: qcom: Enumerate remaining msm8998 resets 
The current list of defined resets is incomplete compared to what the
hardware implements.  Enumerate the remaining resets according to the
hardware documentation.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-05 15:57:01 -08:00
Lucas Stach
685efffe37 soc: imx: gpcv2: add support for i.MX8MQ SoC 
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the
GPCv2 on the i.MX7, but only controls more power domains with a
different mapping.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2018-12-05 08:50:36 +08:00
Geert Uytterhoeven
6155bfa32c clk: renesas: r8a77995: Add missing CPEX clock 
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added
the CPEX clock on R-Car D3.  This clock can be selected as a clock
source for CMT1 (Compare Match Timer Type 1).

Add the missing clock to the DT bindings header, and implement support
for it in the clock driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-04 10:30:05 +01:00
Geert Uytterhoeven
846dbb405b clk: renesas: r8a77995: Remove non-existent SSP clocks 
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.

As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.

Fixes: 714c53aa2e ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
 2018-12-04 10:30:02 +01:00