Everything is using sparseirq these days, so we have no need to
arbitrarily size nr_irqs ahead of time. The legacy IRQ pre-allocation
likewise has no meaning for us, so that's killed off too. We now depend
on nr_irqs expansion by the generic hardirq layer instead.
It's also worth noting that the majority of boards had completely bogus
values for their nr_irqs relative to their CPU and configurations, so
this ends up correcting behaviour for quite a few platforms.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Newer parts need NR_IRQS > 256, so simply bump this up to 512 across the
board. At this point sparseirq is used unconditionally across all CPUs,
so this introduces minimal overhead.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements support for hardware-managed IRQ balancing as implemented
by SH-X3 cores (presently only hooked up for SH7786, but can probably be
carried over to other SH-X3 cores, too).
CPUs need to specify their distribution register along with the mask
definitions, as these follow the same format. Peripheral IRQs that don't
opt out of balancing will be automatically distributed at the whim of the
hardware block, while each CPU needs to verify whether it is handling the
IRQ or not, especially before clearing the mask.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The asm-generic versions have some helper definitions that we can use
instead, drop our definitions and use those instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the sparc changes a439fe51a1.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
