Commit Graph

375 Commits

Author SHA1 Message Date
Linus Torvalds
1bc03573e1 Merge branch 'for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo:
 "Nothing too interesting or alarming. Other than a new power saving
  mode addition to ahci and crash fix on a tracepoint, all changes are
  trivial or device-specific"

* 'for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits)
  ahci: imx: Handle increased read failures for IMX53 temperature sensor in low frequency mode.
  ata: sata_dwc_460ex: Propagate platform device ID to DMA driver
  ata: fixes kernel crash while tracing ata_eh_link_autopsy event
  ata: pata_pdc2027x: Fix space before '[' error.
  libata: fix spelling mistake: 'ambigious' -> 'ambiguous'
  ata: ceva: Add SMMU support for SATA IP
  ata: ceva: Correct the suspend and resume logic for SATA
  ata: ceva: Correct the AXI bus configuration for SATA ports
  ata: ceva: Add CCI support for SATA if CCI is enabled
  ata: ceva: Make RxWaterMark value as module parameter
  ata: ceva: Disable Device Sleep capability
  ata: ceva: Add gen 3 mode support in driver
  ata: ceva: Move sata port phy oob settings to device-tree
  devicetree: bindings: Add sata port phy config parameters in ahci-ceva
  ata: mark expected switch fall-throughs
  ata: sata_mv: remove a redundant assignment to pointer ehi
  ahci: Add support for Cavium's fifth generation SATA controller
  ata: sata_rcar: Use of_device_get_match_data() helper
  libata: make ata_port_type const
  libata: make static arrays const, reduces object code size
  ...
2017-11-15 14:11:41 -08:00
Radha Mohan Chintakuntla
b1314e3f85 ahci: Add support for Cavium's fifth generation SATA controller
This patch adds support for Cavium's fifth generation SATA controller.
It is an on-chip controller and complies with AHCI 1.3.1. As the
controller uses 64-bit addresses it cannot use the standard AHCI BAR5
and so uses BAR4.

Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2017-10-11 07:08:13 -07:00
Ard Biesheuvel
d312fefea8 ahci: don't ignore result code of ahci_reset_controller()
ahci_pci_reset_controller() calls ahci_reset_controller(), which may
fail, but ignores the result code and always returns success. This
may result in failures like below

  ahci 0000:02:00.0: version 3.0
  ahci 0000:02:00.0: enabling device (0000 -> 0003)
  ahci 0000:02:00.0: SSS flag set, parallel bus scan disabled
  ahci 0000:02:00.0: controller reset failed (0xffffffff)
  ahci 0000:02:00.0: failed to stop engine (-5)
    ... repeated many times ...
  ahci 0000:02:00.0: failed to stop engine (-5)
  Unable to handle kernel paging request at virtual address ffff0000093f9018
    ...
  PC is at ahci_stop_engine+0x5c/0xd8 [libahci]
  LR is at ahci_deinit_port.constprop.12+0x1c/0xc0 [libahci]
    ...
  [<ffff000000a17014>] ahci_stop_engine+0x5c/0xd8 [libahci]
  [<ffff000000a196b4>] ahci_deinit_port.constprop.12+0x1c/0xc0 [libahci]
  [<ffff000000a197d8>] ahci_init_controller+0x80/0x168 [libahci]
  [<ffff000000a260f8>] ahci_pci_init_controller+0x60/0x68 [ahci]
  [<ffff000000a26f94>] ahci_init_one+0x75c/0xd88 [ahci]
  [<ffff000008430324>] local_pci_probe+0x3c/0xb8
  [<ffff000008431728>] pci_device_probe+0x138/0x170
  [<ffff000008585e54>] driver_probe_device+0x2dc/0x458
  [<ffff0000085860e4>] __driver_attach+0x114/0x118
  [<ffff000008583ca8>] bus_for_each_dev+0x60/0xa0
  [<ffff000008585638>] driver_attach+0x20/0x28
  [<ffff0000085850b0>] bus_add_driver+0x1f0/0x2a8
  [<ffff000008586ae0>] driver_register+0x60/0xf8
  [<ffff00000842f9b4>] __pci_register_driver+0x3c/0x48
  [<ffff000000a3001c>] ahci_pci_driver_init+0x1c/0x1000 [ahci]
  [<ffff000008083918>] do_one_initcall+0x38/0x120

where an obvious hardware level failure results in an unnecessary 15 second
delay and a subsequent crash.

So record the result code of ahci_reset_controller() and relay it, rather
than ignoring it.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
2017-10-02 12:21:30 -07:00
Christoph Hellwig
f723fa4e69 ahci: don't use MSI for devices with the silly Intel NVMe remapping scheme
Intel AHCI controllers that also hide NVMe devices in their bar
can't use MSI interrupts, so disable them.

Reported-by: John Loy <john.robert.loy@gmail.com>
Tested-by: John Loy <john.robert.loy@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Fixes: d684a90d38 ("ahci: per-port msix support")
Cc: stable@vger.kernel.org # v4.5+
Signed-off-by: Tejun Heo <tj@kernel.org>
2017-09-06 07:36:23 -07:00
Linus Torvalds
109a5db504 Merge branch 'for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo:

 - Christoph added support for TCG OPAL self encrypting disks

 - Minwoo added support for ATA PASS-THROUGH(32)

 - Linus Walleij removed spurious drvdata assignments in some drivers

 - Support for a few new device and other fixes

* 'for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (33 commits)
  sd: add support for TCG OPAL self encrypting disks
  libata: fix build warning from unused goto label
  libata: Support for an ATA PASS-THROUGH(32) command.
  ahci: Add Device ID for ASMedia 1061R and 1062R
  sata_via: Enable optional hotplug on VT6420
  ata: ahci_brcm: Avoid writing to read-only registers
  libata: Add the AHCI_HFLAG_NO_WRITE_TO_RO flag
  libata: Add the AHCI_HFLAG_YES_ALPM flag
  ata: ftide010: fix resource printing
  libata: make the function name in comment match the actual function
  ata: sata_rcar: make of_device_ids const.
  ata: pata_octeon_cf: make of_device_ids const.
  libata: Convert bare printks to pr_cont
  libahci: wrong comments in ahci_do_softreset()
  ata: declare ata_port_info structures as const
  ata: Add driver for Faraday Technology FTIDE010
  ata: Add DT bindings for the Gemini SATA bridge
  ata: Add DT bindings for Faraday Technology FTIDE010
  libata: implement SECURITY PROTOCOL IN/OUT
  libata: factor out a ata_identify_page_supported helper
  ...
2017-07-06 09:41:58 -07:00
Linus Torvalds
650fc870a2 There has been a fair amount of activity in the docs tree this time
around.  Highlights include:
 
  - Conversion of a bunch of security documentation into RST
 
  - The conversion of the remaining DocBook templates by The Amazing
    Mauro Machine.  We can now drop the entire DocBook build chain.
 
  - The usual collection of fixes and minor updates.
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Merge tag 'docs-4.13' of git://git.lwn.net/linux

Pull documentation updates from Jonathan Corbet:
 "There has been a fair amount of activity in the docs tree this time
  around. Highlights include:

   - Conversion of a bunch of security documentation into RST

   - The conversion of the remaining DocBook templates by The Amazing
     Mauro Machine. We can now drop the entire DocBook build chain.

   - The usual collection of fixes and minor updates"

* tag 'docs-4.13' of git://git.lwn.net/linux: (90 commits)
  scripts/kernel-doc: handle DECLARE_HASHTABLE
  Documentation: atomic_ops.txt is core-api/atomic_ops.rst
  Docs: clean up some DocBook loose ends
  Make the main documentation title less Geocities
  Docs: Use kernel-figure in vidioc-g-selection.rst
  Docs: fix table problems in ras.rst
  Docs: Fix breakage with Sphinx 1.5 and upper
  Docs: Include the Latex "ifthen" package
  doc/kokr/howto: Only send regression fixes after -rc1
  docs-rst: fix broken links to dynamic-debug-howto in kernel-parameters
  doc: Document suitability of IBM Verse for kernel development
  Doc: fix a markup error in coding-style.rst
  docs: driver-api: i2c: remove some outdated information
  Documentation: DMA API: fix a typo in a function name
  Docs: Insert missing space to separate link from text
  doc/ko_KR/memory-barriers: Update control-dependencies example
  Documentation, kbuild: fix typo "minimun" -> "minimum"
  docs: Fix some formatting issues in request-key.rst
  doc: ReSTify keys-trusted-encrypted.txt
  doc: ReSTify keys-request-key.txt
  ...
2017-07-03 21:13:25 -07:00
Shawn Lin
0ce968f382 ahci: Add Device ID for ASMedia 1061R and 1062R
Adding ASMedia 1061R and 1062R platform device IDs for SATA.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2017-06-27 11:22:31 -04:00
Mauro Carvalho Chehab
9bb9a39ce5 ata: update references for libata documentation
The libata documentation is now using ReST. Update references
to it to point to the new place.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2017-05-16 11:25:59 -04:00
Sui Chen
8bfd174312 ahci: Acer SA5-271 SSD Not Detected Fix
(Correction in this resend: fixed function name acer_sa5_271_workaround; fixed
 the always-true condition in the function; fixed description.)

On the Acer Switch Alpha 12 (model number: SA5-271), the internal SSD may not
get detected because the port_map and CAP.nr_ports combination causes the driver
to skip the port that is actually connected to the SSD. More specifically,
either all SATA ports are identified as DUMMY, or all ports get ``link down''
and never get up again.

This problem occurs occasionally. When this problem occurs, CAP may hold a
value of 0xC734FF00 or 0xC734FF01 and port_map may hold a value of 0x00 or 0x01.
When this problem does not occur, CAP holds a value of 0xC734FF02 and port_map
may hold a value of 0x07. Overriding the CAP value to 0xC734FF02 and port_map to
0x7 significantly reduces the occurrence of this problem.

Link: https://bugzilla.kernel.org/attachment.cgi?id=253091
Signed-off-by: Sui Chen <suichen6@gmail.com>
Tested-by: Damian Ivanov <damianatorrpm@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Tejun Heo <tj@kernel.org>
2017-05-16 11:23:28 -04:00
Mauro Carvalho Chehab
19285f3c46 ata: update references for libata documentation
The libata documentation is now using ReST. Update references
to it to point to the new place.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-05-16 08:44:20 -03:00
Linus Torvalds
b92e09bb5b Merge branch 'for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo:

 - Adam added opt-in ATA command priority support.

 - There are machines which hide multiple nvme devices behind an ahci
   BAR. Dan Williams proposed a solution to force-switch the mode but
   deemed too hackishd. People are gonna discuss the proper way to
   handle the situation in nvme standard meetings. For now, detect and
   warn about the situation.

 - Low level driver specific changes.

Christoph Hellwig pipes in about the hidden nvme warning:
 "I wish that was the case. We've pretty much agreed that we'll want to
  implement it as a virtual PCIe root bridge, similar to Intels other
  'innovation' VMD that we work around that way.

  But Intel management has apparently decided that they don't want to
  spend more cycles on this now that Lenovo has an optional BIOS that
  doesn't force this broken mode anymore, and no one outside of Intel
  has enough information to implement something like this.

  So for now I guess this warning is it, until Intel reconsideres and
  spends resources on fixing up the damage their Chipset people caused"

* 'for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
  ahci: warn about remapped NVMe devices
  ahci-remap.h: add ahci remapping definitions
  nvme: move NVMe class code to pci_ids.h
  pata: imx: support controller modes up to PIO4
  pata: imx: add support of setting timings for PIO modes
  pata: imx: set controller PIO mode with .set_piomode callback
  pata: imx: sort headers out
  ata: set ncq_prio_enabled iff device has support
  ata: ATA Command Priority Disabled By Default
  ata: Enabling ATA Command Priorities
  block: Add iocontext priority to request
  ahci: qoriq: added ls1046a platform support
2016-12-13 13:26:24 -08:00
Christoph Hellwig
aecec8b604 ahci: warn about remapped NVMe devices
Some Intel ahci implementations have a completely broken remapping mode
where they hide one or more NVMe devices behind the bar of an AHCI device.

Intel refuses to let the OS reprogram the BIOS to switch out of this
mode at runtime, and so far we're not come up with another good way
to undo the mess that the Chipset people created.  So for now the only
thing we can do is to alert users about this situation and switch to the
faster and much saner so called "AHCI" mode insted of the RAID mode in
the BIOS so that the BIOS does not hide the NVMe devices from us.

The sitation is even worse as at least one vendor (thanks a lot Lenovo..)
has started hardcoding their BIOS into the "RAID" mode even for laptops
that don't use AHCI _at all_ and just have a single NVMe device.  For now
there is an unspported Linux-only BIOS that undoes this braindamage,
but we'll have to see if things are getting better or worse from here.

Based on an earlier patch from Dan Williams <dan.j.williams@intel.com>.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-12-05 14:31:24 -05:00
Christoph Hellwig
6929ef385e ahci: always fall back to single-MSI mode
Don't try to guess what the errors from pci_irq_alloc_vectors mean, as
that's too fragile.  Instead always try allocating a single vector
when multi-MSI mode fails.  This makes various intel Desktop and
Laptop CPUs use MSI again.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reported-by: Michael Marley <michael@michaelmarley.com>
Tested-by: Michael Marley <michael@michaelmarley.com>
Fixes: 0b9e2988ab ("ahci: use pci_alloc_irq_vectors")
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-11-21 11:06:57 -05:00
Christoph Hellwig
0ce57f8af1 ahci: fix the single MSI-X case in ahci_init_one
We need to make sure hpriv->irq is set properly if we don't use per-port
vectors, so switch from blindly assigning pdev->irq to using
pci_irq_vector, which handles all interrupt types correctly.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reported-by: Robert Richter <robert.richter@cavium.com>
Tested-by: Robert Richter <robert.richter@cavium.com>
Tested-by: David Daney <ddaney.cavm@gmail.com>
Fixes: 0b9e2988ab ("ahci: use pci_alloc_irq_vectors")
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-10-25 11:43:07 -04:00
Christoph Hellwig
a478b09747 ahci: fix nvec check
commit 17a51f12 ("ahci: only try to use multi-MSI mode if there is more
than 1 port") lead to a case where nvec isn't initialized before it's
used.  Fix this by moving the check into the n_ports conditional.

Reported-and-reviewed-by Colin Ian King <colin.king@canonical.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-10-20 13:40:14 -04:00
Christoph Hellwig
17a51f12cf ahci: only try to use multi-MSI mode if there is more than 1 port
We should only try to allocate multiple MSI or MSI-X vectors if the device
actually has multiple ports.  Otherwise pci_alloc_irq_vectors will return
a single vector due to n_ports = 1, in which case we shouldn't set the
AHCI_HFLAG_MULTI_MSI flag.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Fixes: 0b9e2988 ("ahci: use pci_alloc_irq_vectors")
Reported-by: Emmanuel Benisty <benisty.e@gmail.com>
Tested-by: Emmanuel Benisty <benisty.e@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-10-19 13:18:16 -04:00
Christoph Hellwig
0b9e2988ab ahci: use pci_alloc_irq_vectors
Use the new pci_alloc_irq_vectors API to allocate MSI-X and MSI vectors.
The big advantage over the old code is that we can use the same API for
MSI and MSI-X, and that we don't need to store the MSI-X vector mapping
in driver-private data structures.

This first conversion keeps the probe order as-is: MSI-X multi vector,
MSI multi vector, MSI single vector, MSI-X single vector and last a
single least legacy interrupt line.  There is one small change of
behavior: we now check the "MSI Revert to Single Message" flag for
MSI-X in addition to MSI.

Because the API to find the Linux IRQ number for a MSI/MSI-X vector
is PCI specific, but libahaci is bus-agnostic I had to a
get_irq_vector function pointer to struct ahci_host_priv.  The
alternative would be to move the multi-vector case of ahci_host_activate
to ahci.c and just call ata_host_activate directly from the others
users of ahci_host_activate.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-09-06 12:38:17 -04:00
Javier Martinez Canillas
5219d6530e ata: Use IS_ENABLED() instead of checking for built-in or module
The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either
built-in or as a module, use that macro instead of open coding the same.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-05-27 11:27:23 -04:00
Scott Lawson
8ba559fd09 AHCI: Remove obsolete Intel Lewisburg SATA RAID device IDs
These PCI device IDs have been removed from the Intel Lewisburg design
specification. They are no longer needed.

Signed-off-by: Scott Lawson <scott.lawson@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-03-11 12:31:49 -05:00
Tejun Heo
fe6c58146d Merge branch 'for-4.5-fixes' into for-4.6 2016-03-11 12:30:17 -05:00
Tirumalesh Chalamarla
d243bed32f ahci: Workaround for ThunderX Errata#22536
Due to Errata in ThunderX, HOST_IRQ_STAT should be
cleared before leaving the interrupt handler.
The patch attempts to satisfy the need.

Changes from V2:
	- removed newfile
	- code is now under CONFIG_ARM64

Changes from V1:
	- Rebased on top of libata/for-4.6
        - Moved ThunderX intr handler to new file

tj: Minor adjustments to comments.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-29 16:16:26 -05:00
Mika Westerberg
02e53293ea ahci: Add runtime PM support for the host controller
This patch adds runtime PM support for the AHCI host controller driver so
that the host controller is powered down when all SATA ports are runtime
suspended. Powering down the AHCI host controller can reduce power
consumption and possibly allow the CPU to enter lower power idle states
(S0ix) during runtime.

Runtime PM is blocked by default and needs to be unblocked from userspace
as needed (via power/* sysfs nodes).

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-19 10:52:46 -05:00
Mika Westerberg
f1d848f9fb ahci: Convert driver to use modern PM hooks
In order to add support for runtime PM to the ahci driver we first need to
convert the driver to use modern non-legacy system suspend hooks. There
should be no functional changes.

tj: Updated .driver.pm init for older compilers as suggested by Andy
    and Chrsitoph.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Christoph Hellwig <hch@infradead.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-19 10:52:46 -05:00
Alexandra Yates
f5bdd66c70 Adding Intel Lewisburg device IDs for SATA
This patch complements the list of device IDs previously
added for lewisburg sata.

Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
2016-02-18 11:28:31 -05:00
Alexandra Yates
342decff2b ahci: Intel DNV device IDs SATA
Adding Intel codename DNV platform device IDs for SATA.

Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
2016-02-10 11:35:55 -05:00
Dan Williams
d684a90d38 ahci: per-port msix support
Some AHCI controllers support per-port MSI-X vectors.  At the same time
the Linux AHCI driver needs to support one-off architectures that
implement a single MSI-X vector for all ports.  The heuristic for
enabling AHCI ports becomes, in order of preference:

1/ per-port multi-MSI-X

2/ per-port multi-MSI

3/ single MSI

4/ single MSI-X

5/ legacy INTX

This all depends on AHCI implementations with potentially broken MSI-X
requesting less vectors than the number of ports.  If this assumption is
violated we will need to start explicitly white-listing AHCI-MSIX
implementations.

Reported-by: Ricardo Neri <ricardo.neri@intel.com>
[ricardo: fix struct msix_entry handling]
Reported-by: kernel test robot <ying.huang@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:29:10 -05:00
Alexandra Yates
4d92f0099a ahci: Order SATA device IDs for codename Lewisburg
This change was to preserve the ascending order of device IDs.
There was an exception with the first two Lewisburg device IDs to
keep all device IDs of the same kind grouped by code name.

Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:22:16 -05:00
Charles_Rose@Dell.com
c5967b79ec ahci: Add Device ID for Intel Sunrise Point PCH
This patch adds missing AHCI RAID SATA Device IDs for the Intel Sunrise
Point PCH.

Signed-off-by: Nanda Kishore Chinna <nanda_kishore_chinna@dell.com>
Signed-off-by: Charles Rose <charles_rose@dell.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:19:59 -05:00
Alexandra Yates
56e74338a5 ahci: add new Intel device IDs
Adding Intel codename Lewisburg platform device IDs for SATA.

Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-03 17:28:02 -05:00
Johannes Thumshirn
a40cf3f388 ahci: Add Marvell 88se91a2 device id
Add device id for Marvell 88se91a2

Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-10-31 10:15:48 +09:00
Zhang Rui
91f15fb30c PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI
On multi-function JMicron SATA/PATA/AHCI devices, the PATA controller at
function 1 doesn't work if it is powered on before the SATA controller at
function 0.  The result is that PATA doesn't work after resume, and we
print messages like this:

  pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3
  irq 17: nobody cared (try booting with the "irqpoll" option)

Async resume was introduced in v3.15 by 76569faa62 ("PM / sleep:
Asynchronous threads for resume_noirq").  Prior to that, we powered on
the functions in order, so this problem shouldn't happen.

e6b7e41cdd ("ata: Disabling the async PM for JMicron chip 363/361")
solved the problem for JMicron 361 and 363 devices.  With async suspend
disabled, we always power on function 0 before function 1.

Barto then reported the same problem with a JMicron 368 (see comment  in
the bugzilla).

Rather than extending the blacklist piecemeal, disable async suspend for
all JMicron multi-function SATA/PATA/AHCI devices.

This quirk could stay in the ahci and pata_jmicron drivers, but it's likely
the problem will occur even if pata_jmicron isn't loaded until after the
suspend/resume.  Making it a PCI quirk ensures that we'll preserve the
power-on order even if the drivers aren't loaded.

[bhelgaas: changelog, limit to multi-function, limit to IDE/ATA]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=81551
Reported-and-tested-by: Barto <mister.freeman@laposte.net>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org	# v3.15+
2015-08-24 15:27:11 -05:00
Linus Torvalds
64e22b8685 Merge branch 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo:

 - a number of libata core changes to better support NCQ TRIM.

 - ahci now supports MSI-X in single IRQ mode to support a new
   controller which doesn't implement MSI or INTX.

 - ahci now supports edge-triggered IRQ mode to support a new controller
   which for some odd reason did edge-triggered IRQ.

 - the usual controller support additions and changes.

* 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (27 commits)
  libata: Do not blacklist Micron M500DC
  ata: ahci_mvebu: add suspend/resume support
  ahci, msix: Fix build error for !PCI_MSI
  ahci: Add support for Cavium's ThunderX host controller
  ahci: Add generic MSI-X support for single interrupts to SATA PCI driver
  libata: finally use __initconst in ata_parse_force_one()
  drivers: ata: add support for Ceva sata host controller
  devicetree:bindings: add devicetree bindings for ceva ahci
  ahci: added support for Freescale AHCI sata
  ahci: Store irq number in struct ahci_host_priv
  ahci: Move interrupt enablement code to a separate function
  Doc: libata: Fix spelling typo found in libata.xml
  ata:sata_nv - Change 1 to true for bool type variable.
  ata: add Broadcom AHCI SATA3 driver for STB chips
  Documentation: devicetree: add Broadcom SATA binding
  libata: Fix regression when the NCQ Send and Receive log page is absent
  ata: hpt366: fix constant cast warning
  ata: ahci_xgene: potential NULL dereference in probe
  ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.
  libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.
  ...
2015-06-25 16:49:21 -07:00
Robert Richter
34c56932ce ahci, msix: Fix build error for !PCI_MSI
It turned out the irq vector of the msix can be obtained from struct
msix_entry. This makes the lookup function for msi_desc obsolete.

This fixes a build error if PCI_MSI is unset:

 drivers/ata/ahci.c: In function ‘msix_get_desc’:
 drivers/ata/ahci.c:1210:2: error: ‘struct pci_dev’ has no member named ‘msi_list’

Catched by Fengguang's build bot.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-17 14:16:42 -04:00
Robert Richter
b7ae128d72 ahci: Add support for Cavium's ThunderX host controller
This patch adds support for Cavium's ThunderX host controller. The
controller resides on the SoC and is a AHCI compatible SATA controller
with one port, compliant with Serial ATA 3.1 and AHCI Revision 1.31.
There can exists multiple SATA controllers on the SoC.

The controller depends on MSI-X support since the PCI ECAM controller
on the SoC does not implement MSI nor lagacy intx interrupt support.
Thus, during device initialization, if MSI fails MSI-X will be used to
enable the device's interrupts.

The controller uses non-standard BAR0 for its register range. The
already existing device lookup (vendor and device id) that is already
implemented for other host controllers is used to change the PCI BAR.

Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-16 16:12:14 -04:00
Robert Richter
ee2aad42e4 ahci: Add generic MSI-X support for single interrupts to SATA PCI driver
This patch adds generic MSI-X support for single interrupts to the
SATA PCI driver. MSI-X support is needed for host controller that only
have MSI-X support implemented, but no MSI or intx. This patch only
adds support for single interrupts, multiple per-port MSI-X interrupts
are not yet implemented.

The new implementation still initializes MSIs first. Only if that
fails, the code tries to enable MSI-X. If that fails too, setup is
continued with intx interrupts.

To not break other chips by this generic code change, there are the
following precautions:

 * Interrupt ranges are not enabled at all.

 * Only single interrupt mode is enabled for msix cap devices. Thus,
   only one interrupt will be setup.

 * During the discussion with Tejun we agreed to change the init
   sequence from msix-msi-intx to msi-msix-intx. Thus, if a device
   offers msi and init does not fail, the msix init code will not be
   executed. This is equivalent to current code.

With this, the code only setups single mode msix as a last resort if
msi fails. No interrupt range is enabled at all. Only one interrupt
will be enabled.

tj: comment edits.

Changes of the patch series:

v5:
 * updated patch subject that the patch only implements single IRQ
 * moved Cavium specific code to a separate patch
 * detect Cavium ThunderX device with PCI_CLASS_STORAGE_SATA_AHCI
   instead of vendor/dev id
 * added more comments to the code
 * enable single msix support for all kind of devices (removing strict
   check)
 * rebased onto update libata/for-4.2 with patch 1, 2 applied

v4:
 * removed implementation of ahci_init_intx()
 * improved patch descriptions
 * rebased onto libata/for-4.2

v3:
 * store irq number in struct ahci_host_priv
 * change initialization order from msix-msi-intx to msi-msix-intx
 * improve comments in ahci_init_msix()
 * improve error message in ahci_init_msix()
 * do not enable MSI-X if MSI is actively disabled for the device

v2:
 * determine irq vector from pci_dev->msi_list

Based on a patch from Sunil Goutham <sgoutham@cavium.com>.

Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-16 16:12:13 -04:00
Robert Richter
21bfd1aa95 ahci: Store irq number in struct ahci_host_priv
Currently, ahci supports only msi and intx. To also support msix the
handling of the irq number need to be changed. The irq number for msix
devices is taken from msi_list instead of pci_dev. Thus, the irq
number of a device needs to be stored in struct ahci_host_priv now.
This allows the host controller to be activated in a generic way.

This change is only intended for ahci drivers. For that reason the irq
number is stored in struct ahci_host_priv used only by ahci drivers.
Thus, the ABI changes only for ahci_host_activate(), but existing ata
drivers (about 50) are unaffected and keep unchanged. All users of
ahci_host_activate() have been updated.

While touching drivers/ata/libahci.c, doing a small code cleanup in
ahci_port_start().

Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-03 01:37:49 -04:00
Robert Richter
a1c8231178 ahci: Move interrupt enablement code to a separate function
This patch refactors ahci_init_interrupts() and moves msi code to a
separate function. Need the split since we add msix initialization in
a later patch. The initialization for msix will be done after msi but
before intx.

Signed-off-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-03 01:37:49 -04:00
Dan Williams
dbfe8ef559 ahci: avoton port-disable reset-quirk
Avoton AHCI occasionally sees drive probe timeouts at driver load time.
When this happens SCR_STATUS indicates device detected, but no D2H FIS
reception.  Reset the internal link state machines by bouncing
port-enable in the PCS register when this occurs.

Cc: <stable@vger.kernel.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-05-10 11:39:16 -04:00
Quentin Lambert
c54c719b55 ata: remove deprecated use of pci api
Replace occurences of the pci api by appropriate call to the dma api.

A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr)

@deprecated@
idexpression id;
position p;
@@

(
  pci_dma_supported@p ( id, ...)
|
  pci_alloc_consistent@p ( id, ...)
)

@bad1@
idexpression id;
position deprecated.p;
@@
...when != &id->dev
   when != pci_get_drvdata ( id )
   when != pci_enable_device ( id )
(
  pci_dma_supported@p ( id, ...)
|
  pci_alloc_consistent@p ( id, ...)
)

@depends on !bad1@
idexpression id;
expression direction;
position deprecated.p;
@@

(
- pci_dma_supported@p ( id,
+ dma_supported ( &id->dev,
...
+ , GFP_ATOMIC
  )
|
- pci_alloc_consistent@p ( id,
+ dma_alloc_coherent ( &id->dev,
...
+ , GFP_ATOMIC
  )
)

Signed-off-by: Quentin Lambert <lambert.quentin@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-04-08 10:55:05 -04:00
James Ralston
46319e1358 ahci: Remove Device ID for Intel Sunrise Point PCH
This patch removes a duplicate AHCI-mode SATA Device ID for the Intel Sunrise Point PCH.

Signed-off-by: James Ralston <james.d.ralston@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-01-13 10:32:29 -05:00
Tejun Heo
2b21ef0aae ahci: disable MSI on SAMSUNG 0xa800 SSD
Just like 0x1600 which got blacklisted by 66a7cbc303 ("ahci: disable
MSI instead of NCQ on Samsung pci-e SSDs on macbooks"), 0xa800 chokes
on NCQ commands if MSI is enabled.  Disable MSI.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Dominik Mierzejewski <dominik@greysector.net>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=89171
Cc: stable@vger.kernel.org
2014-12-04 13:18:55 -05:00
Devin Ryles
249cd0a187 AHCI: Add DeviceIDs for Sunrise Point-LP SATA controller
This patch adds DeviceIDs for Sunrise Point-LP.

Signed-off-by: Devin Ryles <devin.ryles@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
2014-12-02 12:38:50 -05:00
Antoine Tenart
9a23c1d6f0 ahci: fix AHCI parameters not taken into account
Changes into the AHCI subsystem have introduced a bug by not taking into
account the force_port_map and mask_port_map parameters when using the
ahci_pci_save_initial_config function. This commit fixes it by setting
the internal parameters of the ahci_port_priv structure.

Fixes: 725c7b570f

Reported-and-tested-by: Zlatko Calusic <zcalusic@bitsync.net>
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
2014-11-04 12:56:25 -05:00
James Ralston
690000b930 ahci: Add Device IDs for Intel Sunrise Point PCH
This patch adds the AHCI-mode SATA Device IDs for the Intel Sunrise Point PCH.

Signed-off-by: James Ralston <james.d.ralston@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
2014-10-27 12:02:17 -04:00
Tejun Heo
66a7cbc303 ahci: disable MSI instead of NCQ on Samsung pci-e SSDs on macbooks
Samsung pci-e SSDs on macbooks failed miserably on NCQ commands, so
67809f85d3 ("ahci: disable NCQ on Samsung pci-e SSDs on macbooks")
disabled NCQ on them.  It turns out that NCQ is fine as long as MSI is
not used, so let's turn off MSI and leave NCQ on.

Signed-off-by: Tejun Heo <tj@kernel.org>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=60731
Tested-by: <dorin@i51.org>
Tested-by: Imre Kaloz <kaloz@openwrt.org>
Cc: stable@vger.kernel.org
Fixes: 67809f85d3 ("ahci: disable NCQ on Samsung pci-e SSDs on macbooks")
2014-10-27 12:02:11 -04:00
Linus Torvalds
d9428f0976 Merge branch 'for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata update from Tejun Heo:
 "AHCI is getting per-port irq handling and locks for better
  scalability.  The gain is not huge but measureable with multiple high
  iops devices connected to the same host; however, the value of
  threaded IRQ handling seems negligible for AHCI and it likely will
  revert to non-threaded handling soon.

  Another noteworthy change is George Spelvin's "libata: Un-break ATA
  blacklist".  During 3.17 devel cycle, the libata blacklist glob
  matching got generalized and rewritten; unfortunately, the patch
  forgot to swap arguments to match the new match function and ended up
  breaking blacklist matching completely.  It got noticed only a couple
  days ago so it couldn't make for-3.17-fixes either.  :(

  Other than the above two, nothing too interesting - the usual cleanup
  churns and device-specific changes"

* 'for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits)
  pata_serverworks: disable 64-KB DMA transfers on Broadcom OSB4 IDE Controller
  libata: Un-break ATA blacklist
  AHCI: Do not acquire ata_host::lock from single IRQ handler
  AHCI: Optimize single IRQ interrupt processing
  AHCI: Do not read HOST_IRQ_STAT reg in multi-MSI mode
  AHCI: Make few function names more descriptive
  AHCI: Move host activation code into ahci_host_activate()
  AHCI: Move ahci_host_activate() function to libahci.c
  AHCI: Pass SCSI host template as arg to ahci_host_activate()
  ata: pata_imx: Use the SIMPLE_DEV_PM_OPS() macro
  AHCI: Cleanup checking of multiple MSIs/SLM modes
  libata-sff: Fix controllers with no ctl port
  ahci_xgene: Fix the error print invalid resource for APM X-Gene SoC AHCI SATA Host Controller driver.
  libata: change ata_<foo>_printk routines to return void
  ata: qcom: Add device tree bindings information
  ahci-platform: Bump max number of clocks to 5
  ahci: ahci_p5wdh_workaround - constify DMI table
  libahci_platform: Staticize ahci_platform_<en/dis>able_phys()
  pata_platform: Remove useless irq_flags field
  pata_of_platform: Remove "electra-ide" quirk
  ...
2014-10-10 07:23:11 -04:00
Alexander Gordeev
d1028e2f95 AHCI: Move host activation code into ahci_host_activate()
Currently host activation done by calling either function
ahci_host_activate() or ata_host_activate(). Consolidate
the code by only calling ahci_host_activate() for all AHCI
devices.

Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: linux-ide@vger.kernel.org
2014-10-06 11:43:35 -04:00
Alexander Gordeev
1c62854f5f AHCI: Move ahci_host_activate() function to libahci.c
This update is a prerequisite for consolidation of
AHCI host activation code within ahci_host_activate()
function.

Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: linux-ide@vger.kernel.org
2014-10-06 11:43:34 -04:00
Alexander Gordeev
a6849b9fdb AHCI: Pass SCSI host template as arg to ahci_host_activate()
This update is a prerequisite for consolidation of
AHCI host activation code within ahci_host_activate()
function.

Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: linux-ide@vger.kernel.org
2014-10-06 11:43:34 -04:00
Alexander Gordeev
c3ebd6a9b6 AHCI: Cleanup checking of multiple MSIs/SLM modes
Sharing Last Message (SLM) mode is currently checked in two
functions: ahci_host_activate() and ahci_init_interrupts().
This update consolidates SLM mode check with activation of
multiple MSIs mode.

Signed-off-by: Alexander Gordeev <agordeev@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: linux-ide@vger.kernel.org
2014-09-28 11:43:56 -04:00