Commit Graph

37 Commits

Author SHA1 Message Date
Alexandre Belloni
13283626c8 ARM: dts: imx/vf: Correct license text
The license text has been mangled at some point then copy pasted across
multiple files. Restore it to what it should be.
Note that this is not intended as a license change.

Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-10 10:18:35 +08:00
Vladimir Zapolskiy
00eb3630a9 ARM: dts: imx: remove obsoleted property fsl,spi-num-chipselects
Since commit b36581df7e ("spi: imx: Using existing properties for
chipselects") the device tree property 'fsl,spi-num-chipselects' is
unused and it is already marked as obsolete in device tree binding
documentation. Remove the property from the existing DTS files to
avoid its reoccurence on copying.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-02 17:35:18 +08:00
Gary Bisson
b0b09f6264 ARM: dts: boundary: remove hardcoded LVDS bus format
The bus format is therefore retrieved from the connected panel
information.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-02 13:59:43 +08:00
Gary Bisson
4abe28eaae ARM: dts: imx6qdl-sabrelite: use hyphens for nodes name
Also aligning the panel nodes name across all platforms.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-02 15:39:58 +08:00
Uwe Kleine-König
c007b3a697 ARM: dts: imx6qdl: don't configure reserved pad settings
Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.

Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-08-09 11:40:40 +08:00
Lucas Stach
a28eeb43ee ARM: dts: imx6: tag boards that have the HW workaround for ERR006687
Add the DT property to all boards that have the hardware workaround
for erratum ERR006687 present. This allows the CPUidle driver to use
the deep idle states, even if the FEC is active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-11 17:03:44 +08:00
Fabio Estevam
b26a68c1fb ARM: dts: imx6: Do not hardcode the CLKO clock
Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of
the hardcoded clock number.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-27 10:55:50 +08:00
Sudeep Holla
26cefdd15d ARM: dts: imx: replace legacy wakeup property with 'wakeup-source'
Though the keyboard and other driver will continue to support the legacy
"gpio-key,wakeup", "linux,wakeup" and "enable-sdio-wakeup" boolean
property to enable the wakeup source, "wakeup-source" is the new
standard binding.

This patch replaces all the legacy wakeup properties with the unified
"wakeup-source" property in order to avoid any futher copy-paste
duplication.

Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-29 16:14:31 +08:00
Gary Bisson
95a9e6cb9f ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:22 +08:00
Gary Bisson
d0ddcc5310 ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
This patch adds support for the 7" LCD display available for Sabrelite:
http://boundarydevices.com/product/7-800x480-display/

Also add label to backlight_lcd and connect it to the panel.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:20 +08:00
Rafał Miłecki
79826ac6bb ARM: dts: imx: add "jedec,spi-nor" flash compatible binding
Starting with commit 8947e396a8 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.

Use it for all flashes that are supposed to support READ ID op according
to the datasheets.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:12 +08:00
Linus Torvalds
b3a5af435a ARM: DT updates for v4.3
This is the usual large batch of DT updates. Lots and lots of smaller
 changes, some of the larger ones to point out are:
 
 - Rockchip veyron (Chromebook) support, as well as several other new boards
 - DRM support on Atmel AT91SAM9N12EK
 - USB additions on some Allwinner platforms
 - Mediatek MT6580 support
 - Freescale i.MX6UL support
 - Cleanups for Renesas shmobile platforms
 - Lots of added devices on LPC18xx
 - Lots of added devices and boards on UniPhier
 
 There's also some dependent code added here, in particular some branches
 that are primarily merged through the clock tree.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV5OMWAAoJEIwa5zzehBx3r2QP/1skn0zzgfvbK0kkPOh9q3Jk
 jX1elN4Wde1SnScz8UbdVb9nmdbhxsuYE/3+Lz7yCndWScBiak4qcsNHrSRhh3FA
 ST7Ub8DLc2TxY9K7eDkyVCcNkP35+UQTHCN76R5Lgrlfw3UO9Zr3xPFX3+Kd6aWz
 9X8UnvJacQQIN/vO6J02kB96sKPEIANfuMgO6vDSbmcZ1RrdlHzjoRwAV0smECtJ
 NyOh+NQdPBR0gSl/peyKzAXoDHNXpDotltTmIz3tPA+dYBO/qG//B73H/oqox0ql
 AKAktyaDzdxXEuixPtAroo4dDy3xuIQ6xU+DNhPWQq0BgaxHWqkwq60d74ot8vCz
 8gvC8pwA6gavbqVFNePOnwPNSyWZX01scX4fp903NjVM8/rGPvCR4y6p8lFIyVkG
 P0L8rmY/UYq3fieaAb1W0odASDrQpgg3zsHD7to43hz6jaRnMRCpA8nTVqJcyHqI
 E6YfGQH87Kpbvkjo0FYqo5P6xCCRTq+QUys6JruNYg05R/gd8AG7cXaVNO3yvg3T
 lRwNXDBt/zcp2exKnGR0IdGMUMICzsuoB8ZePkQdIWwePrd4AzT5qYJe/txmg1rd
 q+9VJqQkeF+txLd9XUV2W/Hcuzu3ZPCbs97I9tTKQHMGwKUZaPfuk2r4+4K+Ps5a
 dYwdms39p6AIT43rK+m3
 =D2Pm
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "Ladies and gentlemen, we proudly announce to you the latest branch of
  ARM device tree contents for the mainline kernel.  Come and see, come
  and see!

  No less than twentythree thousand lines of additions! Just imagine the
  joy you will have of using your mainline kernel on newly supported
  hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or
  UniPhier hardware!

  For those of you feeling less adventurous, added hardware support on
  platforms such as TI DM814x and Gumstix Overo platforms might be more
  of your liking.

  We've got something for everyone here!

  Ahem.  Cough.  So, anyway...

  This is the usual large batch of DT updates.  Lots and lots of smaller
  changes, some of the larger ones to point out are:

   - Rockchip veyron (Chromebook) support, as well as several other new boards
   - DRM support on Atmel AT91SAM9N12EK
   - USB additions on some Allwinner platforms
   - Mediatek MT6580 support
   - Freescale i.MX6UL support
   - cleanups for Renesas shmobile platforms
   - lots of added devices on LPC18xx
   - lots of added devices and boards on UniPhier

  There's also some dependent code added here, in particular some
  branches that are primarily merged through the clock tree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits)
  ARM: tegra: Add gpio-ranges property
  ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
  ARM: tegra: Add Tegra124 PMU support
  ARM: tegra: jetson-tk1: Add GK20A GPU DT node
  ARM: tegra: venice2: Add GK20A GPU DT node
  ARM: tegra: Add IOMMU node to GK20A
  ARM: tegra: Add CPU regulator to the Jetson TK1 device tree
  ARM: tegra: Add entries for cpufreq on Tegra124
  ARM: tegra: Enable the DFLL on the Jetson TK1
  ARM: tegra: Add the DFLL to Tegra124 device tree
  ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
  ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
  ARM: dts: rockchip: correct regulator power states for suspend
  ARM: dts: rockchip: correct regulator PM properties
  ARM: dts: vexpress: Use assigned-clock-parents for sp810
  pinctrl: tegra: Only set the gpio range if needed
  arm: boot: dts: am4372: add ARM timers and SCU nodes
  ARM: dts: AM4372: Add the am4372-rtc compatible string
  ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
  ...
2015-09-01 13:09:20 -07:00
Fabio Estevam
b6db3097db ARM: dts: imx6qdl-sabrelite: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:11 +08:00
Dong Aisheng
89c1a8cf63 dts: imx6: fix sd card gpio polarity specified in device tree
cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios
should be changed to GPIO_ACTIVE_HIGH.
Otherwise, the SD may not work properly due to wrong polarity inversion
specified in DT after switch to common parsing function mmc_of_parse().

Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-24 10:18:35 +02:00
Peter Seiderer
366c595f13 ARM: dts: sabrelite: add CAN support
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-07-15 10:20:33 +08:00
Eric Nelson
4dc633e9b0 ARM: dts: sabrelite: use simple-panel instead of display-timings for LVDS0
Also add label for backlight_lvds and connect it to the LVDS display.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03 15:04:33 +08:00
Eric Nelson
0a3e41ff90 ARM: dts: sabrelite: add i2c3
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-05 20:43:49 +08:00
Eric Nelson
8eedffe54e ARM: dts: sabrelite: add hdmi
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-05 20:43:49 +08:00
Eric Nelson
d951534606 ARM: dts: sabrelite: add i2c2
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-05 20:43:48 +08:00
Markus Pargmann
9eb0e5f9b2 ARM: dts: imx: remove ssi fsl,mode for audio cards
The DAI mode is and should be configured by the sound card driver as
codec and ssi have to be in the right modes to communicate with each
other. It is possible to operate the ssi unit or the codec in master mode,
sometimes even on the same board in different configurations.

With the latest changes in the fsl-ssi driver, the 'fsl,mode' property
is only handled as a fallback property. If the sound card sets the DAI
mode correctly, this fallback configuration is dropped.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18 16:49:37 +08:00
Sascha Hauer
48f5196364 ARM: dts: Add stdout-path property to i.MX boards
This adds the stdout-path property to various i.MX boards. Values
of the property have been taken from barebox, so they should be
correct. Also, the older linux,stdout-path property is converted
to stdout-path.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:02:07 +08:00
Troy Kisky
6261c4c8f1 ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.
This works around a hardware bug.
From "Chip Errata for the i.MX 6Dual/6Quad"

ERR006687 ENET: Only the ENET wake-up interrupt request can wake the
system from Wait mode.

The ENET block generates many interrupts. Only one of these interrupt lines
is connected to the General Power Controller (GPC) block, but a logical OR
of all of the ENET interrupts is connected to the General Interrupt Controller
(GIC). When the system enters Wait mode, a normal RX Done or TX Done does not
wake up the system because the GPC cannot see this interrupt. This impacts
performance of the ENET block because its interrupts are serviced only when
the chip exits Wait mode due to an interrupt from some other wake-up source.

Before this patch, ping times of a Sabre Lite board are quite
random:
ping 192.168.0.13 -i.5 -c5
PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data.
64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=15.7 ms
64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=14.4 ms
64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=13.4 ms
64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=12.4 ms
64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=11.4 ms

=== 192.168.0.13 ping statistics ===
5 packets transmitted, 5 received, 0% packet loss, time 2004ms
rtt min/avg/max/mdev = 11.431/13.501/15.746/1.508 ms
____________________________________________________
After this patch:

ping 192.168.0.13 -i.5 -c5
PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data.
64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=0.120 ms
64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=0.175 ms
64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=0.169 ms
64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=0.168 ms
64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=0.172 ms

=== 192.168.0.13 ping statistics ===
5 packets transmitted, 5 received, 0% packet loss, time 1999ms
rtt min/avg/max/mdev = 0.120/0.160/0.175/0.026 ms
____________________________________________________

Also, apply same change to imx6qdl-nitrogen6x.

This change may not be appropriate for all boards.
Sabre Lite uses GPIO6 as a power down output for a ov5642
camera. As this expansion board does not yet work with mainline,
this is not yet a conflict. It would be nice to have an alternative
fix for boards where this is a problem.

For example Sabre SD uses GPIO6 for I2C3_SDA. It also
has long ping times currently. But cannot use this fix
without giving up a touchscreen.

Its ping times are also random.

ping 192.168.0.19 -i.5 -c5
PING 192.168.0.19 (192.168.0.19) 56(84) bytes of data.
64 bytes from 192.168.0.19: icmp_req=1 ttl=64 time=16.0 ms
64 bytes from 192.168.0.19: icmp_req=2 ttl=64 time=15.4 ms
64 bytes from 192.168.0.19: icmp_req=3 ttl=64 time=14.4 ms
64 bytes from 192.168.0.19: icmp_req=4 ttl=64 time=13.4 ms
64 bytes from 192.168.0.19: icmp_req=5 ttl=64 time=12.4 ms

=== 192.168.0.19 ping statistics ---
5 packets transmitted, 5 received, 0% packet loss, time 2003ms
rtt min/avg/max/mdev = 12.451/14.369/16.057/1.316 ms

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-10 16:25:00 +08:00
Philipp Zabel
a58a12ae00 ARM: dts: imx6q-sabrelite: PHY reset is active-low
Note that the fec driver code currently hard-codes an active-low
reset, regardless of the flags in the device tree.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:43 +08:00
Troy Kisky
da474d4c07 ARM: dts: imx6qdl-sabrelite: add gpio-keys
Add power, menu, home, back, volume up, and volume down
buttons.

Also, apply same changes to imx6qdl-nitrogen6x.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:34 +08:00
Troy Kisky
da5b112d81 ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg
KEY_COL4 is over-current for usbotg on Sabre Lite.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:31 +08:00
Troy Kisky
fde909387b ARM: dts: imx6qdl-sabrelite: fix ENET group
GPIO16 is used for I2C3, not ENET_REF_CLK.
Also, remove pull-ups from tx pins, and ENET_MDIO
which has an external pull-up.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:30 +08:00
Troy Kisky
a48a1e527e ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy
Set the data delays to min, and clock delays to max
because the traces are equal length on pcb.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:29 +08:00
Troy Kisky
f5ecc32ffd ARM: dts: imx6qdl-sabrelite: add pwms for backlights
add pwm1 for lcd backlight
add pwm4 for lvds backlight
add pwm3 for ov5640 mipi clock

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:28 +08:00
Troy Kisky
8c766cb4d4 ARM: dts: imx6qdl-sabrelite: explicitly set pad for SGTL5000 sys_mclk
Explicitly sets the pad GPIO_0 (sys_mclk) to 0x030b0.

Before this patch, it has the value 0x130b0 if using mainline u-boot.
So this patch also removes hysteresis. The 100k pulldown remains so
that a disabled clock will be low.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:27 +08:00
Troy Kisky
f3b0ea6118 ARM: dts: imx6qdl-sabrelite: move phy reset to pinctrl_enet
This patch moves pin EIM_D23 (phy reset) from pinctrl_hog to pinctrl_enet.
It also explicitly sets the pad to 0x000b0.

Before this patch, it has the value 0x1b0b0 if using mainline u-boot.
So this patch also removes hysteresis and a 100K pullup since the pad
is always an output.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:26 +08:00
Troy Kisky
d06d8785f7 ARM: dts: imx6qdl-sabrelite: move usbotg power enable to pinctrl_usbotg
This patch moves pin EIM_D22(power enable) from pinctrl_hog to pinctrl_usbotg.
It also explicitly sets the pad to 0x000b0, which is also the value
that it has before this patch if using mainline u-boot.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:24 +08:00
Troy Kisky
c40f58aa7b ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1
This patch moves pin EIM_D19 (CS) from pinctrl_hog to pinctrl_ecspi1.
It also explicitly sets the pad to 0x000b1.

Before this patch, it has the value 0x100b1 if using mainline u-boot.
So this patch also removes hysteresis since the pad is always an output.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:23 +08:00
Troy Kisky
473f0fc060 ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3
This patch moves pin SD3_DAT5/4 (CD/WP) from pinctrl_hog to pinctrl_usdhc3.
It also explicitly sets the pad SD3_DAT5 to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:22 +08:00
Troy Kisky
0e06842fb7 ARM: dts: imx6qdl-sabrelite: move USDHC4 CD to pinctrl_usdhc4
This patch moves pin NANDF_D6 (CD) from pinctrl_hog to pinctrl_usdhc4.
It also explicitly sets the pad to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:21 +08:00
Troy Kisky
f17e2a31c2 ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
On Sabre Lite usdhc4 is a micro sd slot, which has no
write protect.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:19 +08:00
Troy Kisky
da08d27fcd ARM: dts: imx6qdl-sabrelite: Add uart1 support
Uart1 is available on Sabre Lite.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:18 +08:00
Troy Kisky
1efa12657c ARM: dts: imx: sabrelite: add Dual Lite/Solo support
This makes the structure of Sabre Lite board files the same
as Sabre SD board files so that they are easier to compare.

By this, I mean that the majority of the file imx6q-sabrelite.dts
is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
and imx6dl-sabrelite.dts can include it.

Now Sabre Lite has support for Dual Lite/Solo
processors.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:16 +08:00