Commit Graph

3757 Commits

Author SHA1 Message Date
Evan Quan
16abb5d206 drm/amd/powerplay: added new se_cac_idx r/w APIs v2
- v2: added missing spinlock init

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:24 -04:00
Evan Quan
560460f282 drm/amd/powerplay: added index gc cac read/write apis for vega10
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:23 -04:00
Christian König
09628c3f68 drm/amdgpu: use TTM values instead of MC values for the info queries
Use the TTM values instead of the hardware config here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:23 -04:00
Christian König
935eefb312 drm/amdgpu: remove maximum BO size limitation v2
We can finally remove this now.

v2: remove now unused max_size variable as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:22 -04:00
Christian König
5e7e83963f drm/amdgpu: stop mapping BOs to GTT
No need to map BOs to GTT on eviction and intermediate transfers any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:21 -04:00
Christian König
abca90f1c8 drm/amdgpu: use the GTT windows for BO moves v2
This way we don't need to map the full BO at a time any more.

v2: use fixed windows for src/dst

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:21 -04:00
Christian König
0c2c421e26 drm/amdgpu: add amdgpu_gart_map function v2
This allows us to write the mapped PTEs into
an IB instead of the table directly.

v2: fix build with debugfs enabled, remove unused assignment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:20 -04:00
Christian König
cc25188afd drm/amdgpu: reserve the first 2x512 pages of GART
We want to use them as remap address space.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:20 -04:00
Colin Ian King
606ce3c098 drm/amdgpu: make arrays pctl0_data and pctl1_data static
The arrays pctl0_data and pctl1_data do not need to be in global scope,
so them both static.

Cleans up sparse warnings:
symbol 'pctl0_data' was not declared. Should it be static?
symbol 'pctl1_data' was not declared. Should it be static?

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:19 -04:00
Alex Deucher
8d6a5230e1 drm/amdgpu/gmc9: get vram width from atom for Raven
Get it from the system info table.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:18 -04:00
Alex Deucher
21f6bcb6d4 drm/amdgpu/atomfirmware: implement vram_width for APUs
Implement support using the new atomfirmware system info table.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:18 -04:00
Alex Deucher
6c88555414 drm/amdgpu/atom: fix atom_fw check
Not all vbios images seem to set the version appropriately.
Switch the check based on asic type instead.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:17 -04:00
Alex Xie
a5d20c405a drm/amdgpu: Free resources of bo_list when idr_alloc fails
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:17 -04:00
Rex Zhu
74c31c6e61 drm/amd/powerplay: add avfs check for old asics on Vi.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:16 -04:00
Rex Zhu
ce09d8ecb1 drm/amd/powerplay: move VI common AVFS code to smu7_smumgr.c
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:16 -04:00
Rex Zhu
b37afd41a1 drm/amd/powerplay: refine avfs enable code on fiji.
1. simplify avfs state switch.
2. delete save/restore VFT table functions as not support
   by fiji.
3. implement thermal_avfs_enable funciton.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:15 -04:00
Rex Zhu
bcadae8423 drm/amd/powerplay: fix avfs state update error on polaris.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:14 -04:00
Evan Quan
8882635119 drm/amd/powerplay: fixed wrong data type declaration for ppfeaturemask
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:14 -04:00
Huang Rui
342169c422 drm/amdgpu: set firmware loading type as direct by default for raven
In previous case, driver can't enable psp via the kernel parameter for raven.
We should open this path and set it as direct by default till psp firmware
loading is workable.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:13 -04:00
Huang Rui
a1952da73f drm/amdgpu: make psp cmd buffer as a reserve memory
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:13 -04:00
Huang Rui
311146c91a drm/amdgpu: fix missed asd bo free when hw_fini
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:12 -04:00
Huang Rui
edc4d3db06 drm/amdgpu: remove superfluous check
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:11 -04:00
Shaoyun Liu
57ea8c7b4d drm/amdgpu: NO KIQ usage on nbio hdp flush routine
nbio hdp flush routine are called within atomic context.
Avoid use KIQ when write to the HDP_MEM_COHERENCY_FLUSH_CNTL register
since this register has its own VF copy

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:11 -04:00
Shaoyun Liu
c708535e9c drm/amdgpu: Add WREG32_SOC15_NO_KIQ macro define
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:10 -04:00
Monk Liu
8fdf074f18 drm/amdgpu:fix world switch hang
for SR-IOV, we must keep the pipeline-sync in the protection
of COND_EXEC, otherwise the command consumed by CPG is not
consistent when world switch triggerd, e.g.:

world switch hit and the IB frame is skipped so the fence
won't signal, thus CP will jump to the next DMAframe's pipeline-sync
command, and it will make CP hang foever.

after pipelin-sync moved into COND_EXEC the consistency can be
guaranteed

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:10 -04:00
Rex Zhu
bdb8cd10b9 drm/amd/powerplay: enable ACG feature on vega10.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:09 -04:00
Rex Zhu
fc3a4fc631 drm/amd/powerplay: add acg support in pptable for vega10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:08 -04:00
Rex Zhu
3272cfcf73 drm/amd/powerplay: export ACG related smu message for vega10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:08 -04:00
Rex Zhu
b743750952 drm/amd/powerplay: add avfs profiling_info_v4_2 support on Vega10.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:07 -04:00
Evan Quan
747f6c921d drm/amdgpu: add ACG SMU firmware for other vega10 variants
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:07 -04:00
Evan Quan
a80c929442 drm/amdgpu: drop SMU_DRIVER_IF_VERSION check for some vega10 variants
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:06 -04:00
Ken Wang
47ed4e1c93 drm/amdgpu: add workaround for S3 issues on some vega10 boards
Certain MC registers need a delay after writing them to properly
update in the init sequence.

Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:06 -04:00
Alex Deucher
4426826c02 drm/amdgpu/atombios: add function for whether we need asic_init
Check the atom scratch registers to see if asic_init is complete
or not.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:05 -04:00
Alex Deucher
d05da0e24b drm/amdgpu: unify some atombios/atomfirmware scratch reg functions
Now that we use a pointer to the scratch reg start offset,
most of the functions were duplicated.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:04 -04:00
Alex Deucher
3164cba317 drm/amdgpu/atombios: use bios_scratch_reg_offset for atombios
Align with the atomfirmware code.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:04 -04:00
Arvind Yadav
1aaa56029f drm: amd: amdgpu: constify ttm_place structures.
ttm_place are not supposed to change at runtime. All functions
working with ttm_place provided by <drm/ttm/ttm_placement.h> work
with const ttm_place. So mark the non-const structs as const.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:03 -04:00
Christian König
663ebbf631 drm/amdgpu: trace VM flags as 64bits
Otherwise the upper bits are lost.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:01 -04:00
Christian König
5327dd8acf drm/amdgpu: remove stale TODO comment
That is already fixed.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:06:01 -04:00
Nicolai Hähnle
eabd76cef9 drm/amd/sched: print sched job id in amd_sched_job trace
This makes it easier to correlate amd_sched_job with with other trace
points that don't log the job pointer.

v2: don't print the sched_job pointer (Andres)

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-07-14 11:06:00 -04:00
Hawking Zhang
a69c7e0138 drm/amdgpu: update pctl1 ram index/data for mmhub on raven
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2017-07-14 11:06:00 -04:00
Huang Rui
7504938f8e drm/amdgpu: add check when no firmware need to load
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:05:59 -04:00
Christian König
98a7f88ce9 drm/amdgpu: bind BOs with GTT space allocated directly v2
This avoids binding them later on.

v2: fix typo in function name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-14 11:05:59 -04:00
Christian König
92c60d9cf6 drm/amdgpu: bind BOs to TTM only once
No need to do this on every round.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-14 11:05:58 -04:00
Christian König
fc9c8f5459 drm/amdgpu: add vm_needs_flush parameter to amdgpu_copy_buffer
This allows us to flush the system VM here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-14 11:05:57 -04:00
Christian König
df264f9e08 drm/amdgpu: allow flushing VMID0 before IB execution as well
This allows us to queue IBs which needs an up to date system domain as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-14 11:05:57 -04:00
Christian König
369421cbfa drm/amdgpu: fix amdgpu_ring_write_multiple
Overwriting still used ring content has a low probability to cause
problems, not writing at all has 100% probability to cause problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-14 11:05:56 -04:00
Christian König
e8110b1c9b drm/amdgpu: move ring helpers to amdgpu_ring.h
Keep them where they belong.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-14 11:05:56 -04:00
Kent Russell
ccfee95c6e drm/amdgpu: Update default vram_page_split description
This was updated to 512 and the description update got missed

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:05:54 -04:00
ozeng
98b09f52db drm/amdgpu: Changed CU reservation golden settings
With previous golden settings, compute task can't use
reserved LDS (32K) on CU0 and CU1. On 64K LDS system,
if compute work group allocate more than 32K LDS, then
it can't be dispatched to CU0 and CU1 because of the
reservation. This enables compute task to use reserved
LDS on CU0 and CU1.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:05:54 -04:00
Christian König
b8e0e6e16e drm/amdgpu: fix amdgpu_debugfs_gem_bo_info
Otherwise we trigger a bunch of WARN_ONs when this is called.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-07-14 11:05:53 -04:00