Commit Graph

12 Commits

Author SHA1 Message Date
Masahiro Yamada
323de9efdf pinctrl: make pinctrl_register() return proper error code
Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Lee Jones <lee@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Ray Jui <rjui@broadcom.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:49:52 +02:00
Jon Hunter
8480c2e7b0 pinctrl: tegra-xusb: Fix allocation of pins
Commit e5b3b2d9ed ("pinctrl: allows not to define the get_group_pins
operation") allows pin controllers not to register the get_group_pins()
function. However, a side-effect of not registering this function is
that pins are not allocated and potentially multiple devices could
attempt to configure the same pins [1]. Although this problem exists in
the pinctrl core, because only a few devices are impacted by this, fix
this for tegra-xusb by adding the get_group_pins() function.

Please note that in addition to adding the get_group_pins() functions
the pins/lanes for the tegra-xusb also need to be registered when
calling pinctrl_register(). This also allows the current pinmux state
to be viewed by the debugfs node "pinmux-pins" for the tegra-xusb pad
controller.

[1] http://www.spinics.net/lists/linux-gpio/msg05810.html

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-01 13:57:05 +02:00
Jon Hunter
1133c6379c pinctrl: tegra-xusb: Remove unused structure
The structure tegra_xusb_padctl_group is defined but never used and so
remove this.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-01 13:55:45 +02:00
Linus Torvalds
e7cf773d43 USB patches for 3.19-rc1
Here's the big set of USB and PHY patches for 3.19-rc1.
 
 The normal churn in the USB gadget area is in here, as well as xhci and
 other individual USB driver updates.  The PHY tree is also in here, as
 there were dependancies on the USB tree.
 
 All of these have been in linux-next.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB updates from Greg KH:
 "Here's the big set of USB and PHY patches for 3.19-rc1.

  The normal churn in the USB gadget area is in here, as well as xhci
  and other individual USB driver updates.  The PHY tree is also in
  here, as there were dependancies on the USB tree.

  All of these have been in linux-next"

* tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (351 commits)
  arm: omap3: twl: remove usb phy init data
  usbip: fix error handling in stub_probe()
  usb: gadget: udc: missing curly braces
  USB: mos7720: delete some unneeded code
  wusb: replace memset by memzero_explicit
  usbip: remove unneeded structure
  usb: xhci: fix comment for PORT_DEV_REMOVE
  xhci: don't use the same variable for stopped and halted rings current TD
  xhci: clear extra bits from slot context when setting max exit latency
  xhci: cleanup finish_td function
  USB: adutux: NULL dereferences on disconnect
  usb: chipidea: fix platform_no_drv_owner.cocci warnings
  usb: chipidea: Fixed a few typos in comments
  Documentation: bindings: add doc for the USB2 ChipIdea USB driver
  usb: chipidea: add a usb2 driver for ci13xxx
  usb: chipidea: fix phy handling
  usb: chipidea: remove duplicate dev_set_drvdata for host_start
  usb: chipidea: parameter 'mode' isn't needed for hw_device_reset
  usb: chipidea: add controller reset API
  usb: chipidea: remove flag CI_HDRC_REQUIRE_TRANSCEIVER
  ...
2014-12-14 14:57:16 -08:00
Heikki Krogerus
dbc98635e0 phy: remove the old lookup method
The users of the old method are now converted to the new one.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
[ kishon@ti.com : made phy-berlin-usb.c and phy-miphy28lp.c to use the updated
		  devm_phy_create API.]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22 13:58:39 +05:30
Thierry Reding
c61c2d7071 pinctrl: tegra-xusb: Don't leak configurations
The pinctrl config helpers make a separate copy of the configuration, so
callers must make sure to free any dynamically allocated memory that was
used to store it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-28 16:59:31 +01:00
Linus Torvalds
2b425a3f11 This is the bulk of pin control changes for the v3.18
development series:
 
 - New drivers for the Freescale i.MX21, Qualcomm APQ8084
   pin controllers.
 
 - Incremental new features on the Rockchip, atlas 6,
   OMAP, AM437x, APQ8064, prima2, AT91, Tegra, i.MX, Berlin
   and Nomadik.
 
 - Push Freescale drivers down into their own subdirectory.
 
 - Assorted sprays of syntax and semantic fixes.
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Merge tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:
 "This is the bulk of pin control changes for the v3.18 development
  series:

   - New drivers for the Freescale i.MX21, Qualcomm APQ8084 pin
     controllers.

   - Incremental new features on the Rockchip, atlas 6, OMAP, AM437x,
     APQ8064, prima2, AT91, Tegra, i.MX, Berlin and Nomadik.

   - Push Freescale drivers down into their own subdirectory.

   - Assorted sprays of syntax and semantic fixes"

* tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
  pinctrl: specify bindings for pins and groups
  pinctrl: nomadik: improve GPIO debug prints
  pinctrl: abx500: refactor DT parser to take two paths
  pinctrl: abx500: use helpers for map allocation/free
  pinctrl: alter device tree bindings for functions
  pinctrl: nomadik: refactor DT parser to take two paths
  pinctrl: nomadik: use utils map free function
  pinctrl: nomadik: use util function to reserve maps
  pinctrl: qcom: use restart_notifier mechanism for ps_hold
  pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocation
  pinctrl: berlin: fix the dt_free_map function
  pinctrl: at91: disable PD or PU before enabling PU or PD
  pinctrl: st: remove gpiochip in failure cases
  pinctrl: at91: Fix error handling while doing gpiochio_irqchip_add
  pinctrl: at91: Fix failure path in at91_gpio_probe path
  pinctrl: lantiq: Release gpiochip resources in fail case
  pinctrl: imx: detect uninitialized pins
  pinctrl: tegra: Add MIPI pad control
  pinctrl: at91: Switch to using managed clk_get
  pinctrl: adi2: Remove duplicate gpiochip_remove_pin_ranges
  ...
2014-10-07 20:56:28 -04:00
Linus Walleij
03e9f0cac5 pinctrl: clean up after enable refactoring
commit 2243a87d90
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.

However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.

Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Fan Wu <fwu@marvell.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-09-04 10:05:07 +02:00
Dan Carpenter
8a3cfb7c17 pinctrl: tegra-xusb: testing wrong variable in probe()
There is a cut and paste bug so we test the wrong variable.  "err" is
never less than zero at this point.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-17 09:15:44 -05:00
Dan Carpenter
8e1594db7e pinctrl: tegra-xusb: fix an off by one test
This shoudld be ">= ARRAY_SIZE()" instead of "> ARRAY_SIZE()".

Fixes: dc0a393866 ('pinctrl: Add NVIDIA Tegra XUSB pad controller support')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-17 09:15:44 -05:00
Linus Torvalds
10c8e05620 ARM: SoC driver changes for 3.17
A handful of driver-related changes. We've had a bunch of them going in through
 other branches as well, so it's only a part of what we really have this release.
 
 Larger pieces are:
 
 * Removal of a now unused PWM driver for atmel
   - This includes AVR32 changes that have been appropriately acked.
 * Performance counter support for the arm CCN interconnect
 * OMAP mailbox driver cleanups and consolidation
 * PCI and SATA PHY drivers for SPEAr 13xx platforms
 * Redefinition (with backwards compatibility!) of PCI DT bindings for Tegra to
   better model regulators/power.
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Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver changes from Olof Johansson:
 "A handful of driver-related changes.  We've had a bunch of them going
  in through other branches as well, so it's only a part of what we
  really have this release.

  Larger pieces are:

   - Removal of a now unused PWM driver for atmel
     [ This includes AVR32 changes that have been appropriately acked ]
   - Performance counter support for the arm CCN interconnect
   - OMAP mailbox driver cleanups and consolidation
   - PCI and SATA PHY drivers for SPEAr 13xx platforms
   - Redefinition (with backwards compatibility!) of PCI DT bindings for
     Tegra to better model regulators/power"

Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed817638 ("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.

Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through
the next tree.

* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  bus: arm-ccn: Fix error handling at event allocation
  mailbox/omap: add a parent structure for every IP instance
  mailbox/omap: remove the private mailbox structure
  mailbox/omap: consolidate OMAP mailbox driver
  mailbox/omap: simplify the fifo assignment by using macros
  mailbox/omap: remove omap_mbox_type_t from mailbox ops
  mailbox/omap: remove OMAP1 mailbox driver
  mailbox/omap: use devm_* interfaces
  bus: ARM CCN: add PERF_EVENTS dependency
  bus: ARM CCN PMU driver
  PCI: spear: Remove spear13xx_pcie_remove()
  PCI: spear: Fix Section mismatch compilation warning for probe()
  ARM: tegra: Remove legacy PCIe power supply properties
  PCI: tegra: Remove deprecated power supply properties
  PCI: tegra: Implement accurate power supply scheme
  ARM: SPEAr13xx: Update defconfigs
  ARM: SPEAr13xx: Add pcie and miphy DT nodes
  ARM: SPEAr13xx: Add bindings and dt node for misc block
  ARM: SPEAr13xx: Fix static mapping table
  phy: Add drivers for PCIe and SATA phy on SPEAr13xx
  ...
2014-08-08 11:34:32 -07:00
Thierry Reding
dc0a393866 pinctrl: Add NVIDIA Tegra XUSB pad controller support
The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads
that lanes can be assigned to in order to support a variety of interface
options: USB 2.0, USB 3.0, PCIe and SATA.

In addition to the pin controller used to assign lanes to pads two PHYs
are exposed to allow the bricks for PCIe and SATA to be powered up and
down by PCIe and SATA drivers.

Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-11 14:41:06 +02:00