Add support for MT7628. The SoC is legacy MIPS and hence has no complex
clock tree. This patch add an extra flag to the SoC specific data
indicating, that no clocks are present.
Signed-off-by: John Crispin <john@phrozen.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
When compile-testing the PWM driver without also enabling the
stm32_timers MFD, we run into a link error:
drivers/pwm/pwm-stm32.o: In function `stm32_pwm_raw_capture.isra.6':
pwm-stm32.c:(.text+0xcb0): undefined reference to `stm32_timers_dma_burst_read'
We don't need the '|| COMPILE_TEST' here, since stm32_timers itself
can be built with CONFIG_COMPILE_TEST on all architectures, so we do
get the coverage through allmodconfig and randconfig builds even
when we make it a hard dependency.
Fixes: 7edf736920 ("pwm: Add driver for STM32 plaftorm")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This set of changes adds support for more generations of the RCar
controller as well as runtime PM support. The JZ4740 driver gains
support for device tree and can now be used on all Ingenic SoCs.
Rounding things off is a random assortment of fixes and cleanups
all across the board.
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlrPJeAZHHRoaWVycnku
cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zoUQvEACaAkXPs3rvvHVF7pDo7SMV
3WMJu1oOiZ7Gy0VAooRyhwI/rNBeF4PYuHuxa2+NeuWX8MBN41dRWAp8Am4kMnOE
Lxp259qQTNGdGQTnSXP/sbYTKzAqF/3G0XtkhGejS3AzYSnhk6sIGcCevS4MD8bV
I/jSigPO4ByizyEJsnAkZPUw5js2CsE2xSnGKRsITZBK7yDi/cwB2cOLm0+psCKu
qYTlOHTc3myRKYESw5rmzB+cRyLGMkaq9SQzLZ8E2PP7zIY1QbrmzufQ1ovbpffl
065dS8+m1ecRMXUfFCLnHZPk/S5W6xZMskVJ0GIKC3xBPefbpCkkcA9A/gXkwH4y
FJ4lCROnB8gE3ITGkqzmZNBt3PKySIubEv1mCzdHVx3j4IEmF/M1Xc4wxz9qD+tD
ay+h1Vv1RbQlYlMqcOkxBpZd6sUnDIlIvIJ35IYUvD80Ap24DIU05NR1xsq6DMaD
c0N13an4gyK1t2O0YRcdmhHhIgwwaGhka5+8+r2hCqSVf/uzgyn26vzyqttrHuVc
CNYeMObuotr72LVHzXHkr4I/h+c7KE1B8RYKLZvUQuIdOvSb7Z9n32n1dBRILDH8
ppb+Y4azLDvAF4SAt5lZhYsMmB8vuCp4TA5LKwBEsylwTwOL9ghL7luYAOF4UroH
qigluQk3Sf5GF1jrp9hTew==
=JiRM
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set of changes adds support for more generations of the RCar
controller as well as runtime PM support. The JZ4740 driver gains
support for device tree and can now be used on all Ingenic SoCs.
Rounding things off is a random assortment of fixes and cleanups all
across the board"
* tag 'pwm/for-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (29 commits)
pwm: rcar: Add suspend/resume support
pwm: rcar: Use PM Runtime to control module clock
dt-bindings: pwm: rcar: Add bindings for R-Car M3N support
pwm: rcar: Fix a condition to prevent mismatch value setting to duty
pwm: sysfs: Use put_device() instead of kfree()
dt-bindings: pwm: sunxi: Add new compatible strings
pwm: sun4i: Simplify controller mapping
pwm: sun4i: Drop unused .has_rdy member
pwm: sun4i: Properly check current state
pwm: Remove depends on AVR32
pwm: stm32: LPTimer: Use 3 cells ->of_xlate()
dt-bindings: pwm-stm32-lp: Add #pwm-cells
pwm: stm32: Protect common prescaler for all channels
pwm: stm32: Remove unused struct device
pwm: mediatek: Improve precision in rate calculation
pwm: mediatek: Remove redundant MODULE_ALIAS entries
pwm: mediatek: Fix up PWM4 and PWM5 malfunction on MT7623
pwm: jz4740: Enable for all Ingenic SoCs
pwm: jz4740: Add support for devicetree
pwm: jz4740: Implement ->set_polarity()
...
AVR32 is gone, so no more need to depend on it.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This driver works perfectly with all the versions of the SoCs from
Ingenic that are supported upstream.
This makes the driver usable on JZ4740, JZ4770 and JZ4780 SoCs.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The blackfin architecture is getting removed, so this driver is now
obsolete as well.
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Aaron Wu <aaron.wu@analog.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A lot of Kconfig symbols have architecture specific dependencies.
In those cases that depend on architectures we have already removed,
they can be omitted.
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The changes for this release include a new driver for the PWM controller
found on SoCs of the ZTX ZX family. Support for an old SH-Mobile SoC has
been dropped and the Rockchip and MediaTek drivers gain support for more
generations.
Other than that there are a bunch of coding style fixes, minor bug fixes
and cleanup as well as documentation patches.
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlm2fWoZHHRoaWVycnku
cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zofXuD/0WP6F9ZMx3FDpc02PJe7KA
H634eZXRxjRBMyJ+fWqBf+VZ9uKyA8Qh+lKzve57vzBah8cnp2fRS6MtNxCqhq9T
kiu9ocsbncF01HuAqBCVZM/TwbPIa8QtDGQ7HlmQ+brdWdXyntjilWmoW+DQuoDT
hsC/AL+Ih0t9LH8zrtv5wtB92+920M9NUe35up3hrc1qQgHCs+1VwRQ0PUlhlkwF
xQVop+t6rAtVVHx+mEw3tBQ913Ciy2sJY/BuGkXzTCj1P3i8HrPWE/laVXrn9Kbe
taTeewCr1IZSnyFY4/0+JPz2/a/kFIa36N0uQop0WGcrKV9cp1Hdjuhqa4joKgdk
rPrNJ3YQ4ji6U/vsy0FYuWPXfQI8sK7i56oJiRVAOIH0OaI6CTx1nDpRr/eXvqSd
fVf/zwUIVdzutREqYHVU8WwfYJO//U1zWymsJsfD1hZu/2hSZryjemhIjrmi66gh
RF+8Q9qrV1KGeLFIEAvRpnZ48yM/NKQxKqf9cBUfQmvELpu3b0ujx1eYmGefPqvu
1jIQbQ96sZI39geF+qt+FE994v7VZnYiMyhWhtpR8inkw9tfcYs+oGr70Jz+SgFf
0xV/M0aC7KWsOD7Avh3vqMH+j3tUf3zfK1/a0Jsr3PYLCDlw2WEnaWr5b3mv4YQA
Ta4B6NVjFz41LD9rZV+68A==
=GUps
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"The changes for this release include a new driver for the PWM
controller found on SoCs of the ZTX ZX family. Support for an old
SH-Mobile SoC has been dropped and the Rockchip and MediaTek drivers
gain support for more generations.
Other than that there are a bunch of coding style fixes, minor bug
fixes and cleanup as well as documentation patches"
* tag 'pwm/for-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (32 commits)
pwm: pwm-samsung: fix suspend/resume support
pwm: samsung: Remove redundant checks from pwm_samsung_config()
pwm: mediatek: Disable clock on PWM configuration failure
dt-bindings: pwm: Add MT2712/MT7622 information
pwm: mediatek: Fix clock control issue
pwm: mediatek: Fix PWM source clock selection
pwm: mediatek: Fix Kconfig description
pwm: tegra: Explicitly request exclusive reset control
pwm: hibvt: Explicitly request exclusive reset control
pwm: tiehrpwm: Set driver data before runtime PM enable
pwm: tiehrpwm: Miscellaneous coding style fixups
pwm: tiecap: Set driver data before runtime PM enable
pwm: tiecap: Miscellaneous coding style fixups
dt-bindings: pwm: tiecap: Add TI 66AK2G SoC specific compatible
pwm: tiehrpwm: fix clock imbalance in probe error path
pwm: tiehrpwm: Fix runtime PM imbalance at unbind
pwm: Kconfig: Enable pwm-tiecap to be built for Keystone
pwm: Add ZTE ZX PWM device driver
dt-bindings: pwm: Add bindings doc for ZTE ZX PWM controller
pwm: bcm2835: Support for polarity setting via DT
...
Add support for single PWM channel on Low-Power Timer, that can be
found on some STM32 platforms.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Fix a copy/paste error that sneaked into the Kconfig description of the
Mediatek PWM driver.
Signed-off-by: Zhi Mao <zhi.mao@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
66AK2G SoC has ECAP subsystem that is used as pwm-backlight provider for
display. Hence, enable pwm-tiecap driver to be built for Keystone
architecture.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
It adds PWM device driver for ZTE ZX family SoCs. The PWM controller
supports 4 devices with polarity configuration.
The driver has been tested with pwm-regulator support to scale core
voltage via cpufreq.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch adds support for the PWM core found on current ARM base SoCs
made by MediaTek. This IP core supports 5 channels and has 2 operational
modes. There is the old mode, which is a classical PWM and the new mode
which allows the user to define bitmasks that get clocked out on the
pins. As the subsystem currently only supports PWM cores with the "old"
mode, we can safely ignore the "new" mode for now.
Signed-off-by: John Crispin <john@phrozen.org>
[thierry.reding@gmail.com: minor cleanups]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This set contains mostly fixes to existing drivers as well as cleanup of
code that's not been in active use for a while.
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAli1+XgZHHRoaWVycnku
cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zoX8LD/4l8MeOgKo+uWsfX7tY1kQ/
gWitT/g+jCl3kXYtmcDTaLbEnNr0b5tGahmYC7rnCLhoq6Sp1VXjm6LChuoIUrMF
r53IlUEEgHhClfCK/vqrp/kZoFndmtLZN2V6K8gpM730nNLYAwH6FhGmUFYp47Sm
Xfdl5PwuSVDNnrBehjXPuAqUpFTp8lzrZsRkFrbX5a6TJ7hjn0TwNdovdGa6pV7k
0LXKBfSGTRS2BxDmAFqXItC2USG7v3WRCDc4jCtykNLyQKU1yCA+AYwgR9+1jj8o
1I07gjbZ+Fp8hzcQw/88MdodtS1xGV75WquhYLYWTgbneEWAcRVM47wklvL5gm7O
70lIAvOveSFGjFoWnB9YACkOoZIxDINLhWwBD0Ytfpu/gaj3VsP/WrdMu6dk5kWq
va4XHCS+dObT3o4fRkxQsQJVhAJmg4000Mupg4DOgaigd1PmFLFjBsmHua4+Ssf5
c+y+SVAg8+c3jqA9mHxPJAJesJ41fXBQCB1Xy8pDOe8iK9fBiZjkq2ssiDerN0kI
Sc4+hZHaGRhJqZUItvKJvNhdvrPkzQsRjrZgVLW/bDEXek3SXEmBAFsuZnr6w4BZ
TVVxTNzg+h4obJZEay/P6oWO6KDfF/RyTK0CUHj/ORHxbqUViiwlSJkTVgp7Etd6
mJj0xObBIwUGnSYvqGcShA==
=J9q4
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set contains mostly fixes to existing drivers as well as cleanup
of code that's not been in active use for a while"
* tag 'pwm/for-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (27 commits)
acpi: lpss: call pwm_add_table() for BSW PWM device
pwm: Try to load modules during pwm_get()
pwm: Don't hold pwm_lookup_lock longer than necessary
pwm: Make the PWM_POLARITY flag in DTB optional
pwm: Print error messages with pr_err() instead of pr_debug()
pwm: imx: Add polarity inversion support to i.MX's PWMv2
pwm: imx: doc: Update imx-pwm.txt documentation entry
pwm: imx: Remove redundant i.MX PWMv2 code
pwm: imx: Provide atomic PWM support for i.MX PWMv2
pwm: imx: Move PWMv2 wait for fifo slot code to a separate function
pwm: imx: Move PWMv2 software reset code to a separate function
pwm: imx: Rewrite v1 code to facilitate switch to atomic PWM
pwm: imx: Add separate set of PWM ops for v1 and v2
pwm: imx: Remove ipg clock and enable per clock when required
pwm: lpss: Add Intel Gemini Lake PCI ID
pwm: lpss: Do not export board infos for different PWM types
pwm: lpss: Avoid reconfiguring while UPDATE bit is still enabled
pwm: lpss: Switch to new atomic API
pwm: lpss: Allow duty cycle to be 0
pwm: lpss: Avoid potential overflow of base_unit
...
This driver adds support for PWM driver on STM32 platform.
The SoC have multiple instances of the hardware IP and each
of them could have small differences: number of channels,
complementary output, auto reload register size...
version 9:
- fix commit message header
- remove one space MODULE_ALIAS
version 8:
- fix comments done by Thierry on version 7
version 6:
- change st,breakinput parameter to make it usuable for stm32f7 too.
version 4:
- detect at probe time hardware capabilities
- fix comments done on v2 and v3
- use PWM atomic ops
version 2:
- only keep one comptatible
- use DT parameters to discover hardware block configuration
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add dependency on COMMON_CLK and allow COMPILE_TEST for broader compile
coverage. Default to Y for IPROC SoCs. This allows the driver to simply
be enabled by selecting PWM.
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
[thierry.reding@gmail.com: reword commit message]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add PWM driver for the PWM controller found on HiSilicon BVT SoCs such
as Hi3519V100, Hi3516CV300, etc. The PWM controller is primarily in
charge of controlling the P-Iris lens.
Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add support for the PWM controller found in the Amlogic SoCs. This
driver supports the Meson8b and GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use the new ChromeOS EC EC_CMD_PWM_{GET,SET}_DUTY commands to control
one or more PWMs attached to the Embedded Controller. Because the EC
allows us to modify the duty cycle (as a percentage, where U16_MAX is
100%) but not the period, we assign the period a fixed value of
EC_PWM_MAX_DUTY and reject all attempts to change it.
This driver supports only device tree at the moment, because that
provides a very flexible way of describing the relationship between PWMs
and their consumer devices (e.g., backlight). On a non-DT system, we'll
probably want to use the non-GENERIC addressing (i.e., we'll need to
make special device instances that will use EC_PWM_TYPE_KB_LIGHT or
EC_PWM_TYPE_DISPLAY_LIGHT), as well as the relatively inflexible
pwm_lookup infrastructure for matching devices. Defer that work for now.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This adds a driver for the PWM block found in chips of the STMPE 24xx
series of multi-purpose I2C expanders. (I think STMPE means ST
Microelectronics Multi-Purpose Expander.) This PWM was designed in
accordance with Nokia specifications and is kind of weird and usually
just switched between max and zero duty cycle. However it is indeed a
PWM so it needs to live in the PWM subsystem.
This PWM is mostly used for white LED backlight.
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add support for the PWM controller present in Broadcom's iProc family of
SoCs. It has been tested on the Northstar+ bcm958625HR board.
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
[thierry.reding@gmail.com: bunch of coding style fixes, cleanups]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a
more appropriate name than SHMOBILE for the majority of Renesas ARM
based SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Ran into this on UML:
drivers/built-in.o: In function `fsl_pwm_probe':
linux/drivers/pwm/pwm-fsl-ftm.c:436: undefined reference to `devm_ioremap_resource'
collect2: error: ld returned 1 exit status
devm_ioremap_resource() is defined only when HAS_IOMEM is selected.
Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com>
Cc: Xiubo Li <Li.Xiubo@freescale.com>
Cc: Alison Wang <b18965@freescale.com>
Cc: Jingchang Lu <b35083@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Yuan Yao <yao.yuan@freescale.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Adds support for using a OMAP dual-mode timer with PWM capability
as a Linux PWM device. The driver controls the timer by using the
dmtimer API.
Add a platform_data structure for each pwm-omap-dmtimer nodes containing
the dmtimers functions in order to get driver not rely on platform
specific functions.
Cc: Grant Erickson <marathon96@gmail.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Joachim Eastwood <manabian@gmail.com>
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[thierry.reding@gmail.com: coding style bikeshed, fix timer leak]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
We have two users of core part right now. Let them to select core part
automatically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
There is a chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via
ACPI ID INT3492.
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add display PWM driver support to modify backlight for MT8173 and
MT6595. The PWM has one channel to control the brightness of the
display. When the (high_width / period) is closer to 1, the screen
is brighter; otherwise, it is darker.
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
TIPWMSS is present on TI's DRA7x and AM437x SoCs. Enable its usage.
Instead of adding each SoC individually, use the more generic symbol
ARCH_OMAP2PLUS instead.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add support for the BCM7038-style PWM controller found in all BCM7xxx STB SoCs.
This controller has a hardcoded 2 channels per controller, and cascades a
variable frequency generator on top of a fixed frequency generator which offers
a range of a 148ns period all the way to ~622ms periods.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This patch adds support for R-Car SoCs PWM Timer. The PWM timer of
R-Car H2 has 7 channels. So, we can use the channels if we describe
device tree nodes.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This set of changes introduces the beginnings of a new API that's based
around the concept of states that can be atomically applied. Drivers go
to various lengths to implement something similar, which indicates that
the core should really be providing the necessary framework.
On top of that, there is a bit of cleanup as well as improved kerneldoc
and integration into the device-drivers DocBook.
Regarding drivers there is a new one for the NXP LPC18xx family of SoCs
and a couple of fixes for existing drivers (pca9685, Broadcom Kona and
Atmel HLCDC).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJV8DLwAAoJEN0jrNd/PrOhSf4P/RYwdDGB/xvI0ifXS5p9znNA
hr6+MUH87+f9NY1jcDye0RrxIkRsckQ3x3fe/nTmODjCSM/cyrWrVAEKbkqE5bZH
LTRT6M6jolSAUGXFTBDuHktYdMU9yaD0PJvm0RgBEC7z2BeBmCgCXTFc4paxw2GA
NvikouXZX9XDlXp598pHPFoL92vTLevQQMBHYW9myY8cjAOG0X8Dn05xQaC2kRvJ
5q+OD1D/kIEMJxONrpef7bwzPgCkuGTHqqIIm6gLVoPBPGWz43kaZ5+x/j2E98E9
fkfcP+21GvZ/tdAUEkrRnpy5Jnn+Nk0m+yzPtRkvj4TLwPd93EjumiPg5sb53pys
ZfoHgnOAArVxEnTYLQk4IyBWcHyyzIxZBKZZpXkMXjY4QVq6wZLAP+vyCAzcm4tV
vHqUN5BYAkwYPUNU58fgFWGHg6rFlb2QSN1bIj5opgygWmRbPgmwVj3trvS2Dkoe
NOv47pp0OyWvTvx+wLql8BUt1zK1M6QldfPF6pR4FB18SLyKYH89ZbjHTyGdsuCv
SiaWrqNB4eRmEKW1MA20Kc4wlF5c2peXVp2EHeddh/oHPES8IVWBPMPwSkJZrpQb
bIUMStKlJ/Y1GPo6Dd7njK/kA3GwwsbYXYHmyPm0IRuAeZKrzGzVSIIljbfpL6Vf
LBuKRMQHY4iWtF8A5SmY
=ymH8
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set of changes introduces the beginnings of a new API that's
based around the concept of states that can be atomically applied.
Drivers go to various lengths to implement something similar, which
indicates that the core should really be providing the necessary
framework.
On top of that, there is a bit of cleanup as well as improved
kerneldoc and integration into the device-drivers DocBook.
Regarding drivers there is a new one for the NXP LPC18xx family of
SoCs and a couple of fixes for existing drivers (pca9685, Broadcom
Kona and Atmel HLCDC)"
* tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errata
pwm: Add NXP LPC18xx PWM/SCT DT binding documentation
pwm: NXP LPC18xx PWM/SCT driver
pwm-pca9685: Support changing the output frequency
pwm-pca9685: Fix several driver bugs
pwm: kona: Modify settings application sequence
pwm: pca9685: Drop owner assignment
pwm: Add to device-drivers documentation
pwm: Clean up kerneldoc
pwm: Remove useless whitespace
pwm: sysfs: Remove unnecessary padding
pwm: sysfs: Properly convert from enum to string
pwm: Make use of pwm_get_xxx() helpers where appropriate
pwm: Add pwm_get_polarity() helper function
pwm: Constify PWM device where possible
pwm: Add the pwm_is_enabled() helper
This commit adds support for NXP LPC18xx PWM/SCT.
NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State
Configurable Timer (SCT) which can be configured as a Pulse Width
Modulator. Other SoCs in that family may share the same hardware.
The PWM supports a total of 16 channels, but only 15 can be simultaneously
requested. There's only one period, global to all the channels, thus PWM
driver will refuse setting different values to it, unless there's only one
channel requested.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
[thierry.reding@gmail.com: remove excessive padding of fields]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The Crystalcove PMIC provides three PWM signals and this driver exports
one of them on the BYT platform which is used to control backlight for
DSI panel. This is platform device implementation of the drivers/mfd
cell device for CRC PMIC.
CC: Samuel Ortiz <sameo@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Varka Bhadram <varkabhadram@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The Pistachio SOC from Imagination Technologies includes a Pulse Width
Modulation DAC which produces 1 to 4 digital bit-outputs which represent
digital waveforms. These PWM outputs are primarily in charge of controlling
backlight LED devices.
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Naidu Tellapati <Naidu.Tellapati@imgtec.com>
Signed-off-by: Sai Masarapu <Sai.Masarapu@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
[thierry.reding: fixup license header as discussed on list]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The include/linux/clk.h header defines dummy implementations for the
various clk_*() functions if HAVE_CLK is not selected to improve build
coverage in randconfig builds.
The dummy implementation of clk_get_rate() returns 0, which causes the
Atmel HLCDC PWM driver's atmel_hlcdc_pwm_config() implementation to end
up calling:
do_div(clk_period_ns, 0)
On x86, do_div(n, base) will end up evaluating to this:
n >>= ilog2(base)
with base = 0, the implementation of ilog2() will call ____ilog2_NaN(),
which is purposely undefined and results in a linker failure:
ERROR: "____ilog2_NaN" [drivers/pwm/pwm-atmel-hlcdc.ko] undefined!
The implementation of do_div() checks that base is a power of 2 before
calling ilog2(). The compiler doesn't optimize this away, presumably
because is_power_of_2() is an inline function and the compiler doesn't
or can't inspect it closely enough. ilog2() being a macro it still ends
up generating the ____ilog2_NaN() because of the constant 0.
The root of the problem is that the driver really should be checking
before possibly dividing by zero. That should eventually be fixed, but
for now just assume that the clock runs at a sensible frequency when
available.
Reported-by: Jim Davis <jim.epost@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
To re-use the existing PWM driver for 64-bit ARM based Exynos7 SoC, make
the driver depend on ARCH_EXYNOS along with PLAT_SAMSUNG.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12
or sama5d3 families for instance) provides a PWM device.
This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
There is no sign of this IP block on non-x86 architectures and rather will not
be. Thus, make this explicit by applying a direct dependency to X86.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The driver consists of core, PCI, and platform parts. It would be better
to split them into separate files.
The platform driver is now called pwm-lpss-platform. Thus, previously
set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe
side since it seems no one from outside Intel is using it for now.
While here, move to use macros module_pci_driver() and
module_platform_driver().
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
[thierry.reding: change select to depends on PWM_LPSS, cleanup]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Commit 42fa98a9c3 ("pwm: fsl-ftm: Convert to direct regmap API usage")
introduced the following error when REGMAP_MMIO=n:
drivers/built-in.o: In function `fsl_pwm_probe':
>> pwm-fsl-ftm.c:(.text+0xd7d7): undefined reference to `devm_regmap_init_mmio_clk'
Select select REGMAP_MMIO in order to fix this error.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The set of changes for this merge window contains two new drivers: one
for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs. The
remainder of the changes are the usual small cleanups such as removing
redundant OOM messages, signalling that a PWM chip's operations can
sleep and removing an unneeded dependency.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT5LH8AAoJEN0jrNd/PrOhm1gQAKZUW7ueTT5Ar9cwBvWwtHSr
qLtTx0GxJ91cH6h2bNkhBLz3A2ps9KPcxWgDxfod4TyOHsqZmbAwVHZzORyxr3Hi
n5iQST0SpH/Qon5iptbJdmdeDOJ2MOvLU6YrlCO5XdGzJjVt1JeCXCuYZn1FG4IJ
rsZbvkp3w0U3BuRwq41FK2RqwlMp+6VkAjMd5gqLL8/AWnLGy+T5pLtADiOyNeBa
f9EDqrVXz0PwuLt7JXR2TktAVEv/vlGWKnmqYWGTEr45BDsxRVdV49QMnMIIjrPA
ohLKqYJgX5bU4XwHfbePLU/Jt8P1Kc+bdh4iTpMJSTEETdnMt0W9GdpwI+hKZThH
hZoALp9KBimIh/To8LnuSLeJ4NItkXelLZzzvGbX4wJSSBtA/CvG+1akyRnhE86m
Z5xp71tIBAQ45KHBz6sN95NTQirCLgbfReE7jo2xfAspqY8yUotorMoYdHz/gWMs
xX/x4BdcfYBd25YDYT6SwNLZ0uGwtwxnRvzNURmpLu6WY177cg50CgL32skxVvIJ
TlsQDVyQj8DcIb0GfevUk1X7EL6lYz2czjgpA2HvyNIXJRGJhm5+1iyTcaGOYQ4F
WsZj8GI8ECF/LYssa4tyrT2WW7MbHpXY1f4Qn3AD+XymtSQ6la8pPEh2YXBPWwvr
ep6Sbib+61h+mIMem25i
=ZE0j
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"The set of changes for this merge window contains two new drivers: one
for Rockchip SoCs and another for STMicroelectronics STiH4xx SoCs.
The remainder of the changes are the usual small cleanups such as
removing redundant OOM messages, signalling that a PWM chip's
operations can sleep and removing an unneeded dependency"
* tag 'pwm/for-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: rockchip: Added to support for RK3288 SoC
pwm: rockchip: document RK3288 SoC compatible
pwm: sti: Remove PWM period table
pwm: sti: Sync between enable/disable calls
pwm: sti: Ensure same period values for all channels
pwm: sti: Fix PWM prescaler handling
pwm: sti: Supply Device Tree binding documentation for ST's PWM IP
pwm: sti: Add new driver for ST's PWM IP
pwm: imx: set can_sleep flag for imx_pwm
pwm: lpss: remove dependency on clk framework
pwm: pwm-tipwmss: remove unnecessary OOM messages
pwm: rockchip: document device tree bindings
pwm: add Rockchip SoC PWM support
This driver supports all current STi platforms' PWM IPs.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[thierry.reding: rename module to pwm-sti, fix build breakage]
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This commit adds a driver for the PWM controller found on Rockchip
RK29, RK30 and RK31 SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The Atmel PWM IP can be found on avr32 chips. This allows selecting and building
the driver on avr32.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add support for the six-channel Kona PWM controller found on Broadcom
mobile SoCs like bcm281xx.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
