Commit Graph

687 Commits

Author SHA1 Message Date
Cyrille Pitchen
15f5533152 mtd: spi-nor: introduce Double Transfer Rate (DTR) SPI protocols
This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
DTR is used only for Fast Read operations.

According to manufacturer datasheets, whatever the number of I/O lines
used during instruction (x) and address/mode/dummy (y) clock cycles, DTR
is used only during data (z) clock cycles of SPI x-y-z protocols.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-05-15 21:56:17 +02:00
Cyrille Pitchen
cfc5604c48 mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols
This patch changes the prototype of spi_nor_scan(): its 3rd parameter
is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
framework about the actual hardware capabilities supported by the SPI
controller and its driver.

Besides, this patch also introduces a new 'struct spi_nor_flash_parameter'
telling the spi-nor framework about the hardware capabilities supported by
the SPI flash memory and the associated settings required to use those
hardware caps.

Then, to improve the readability of spi_nor_scan(), the discovery of the
memory settings and the memory initialization are now split into two
dedicated functions.

1 - spi_nor_init_params()

The spi_nor_init_params() function is responsible for initializing the
'struct spi_nor_flash_parameter'. Currently this structure is filled with
legacy values but further patches will allow to override some parameter
values dynamically, for instance by reading the JESD216 Serial Flash
Discoverable Parameter (SFDP) tables from the SPI memory.
The spi_nor_init_params() function only deals with the hardware
capabilities of the SPI flash memory: especially it doesn't care about
the hardware capabilities supported by the SPI controller.

2 - spi_nor_setup()

The second function is called once the 'struct spi_nor_flash_parameter'
has been initialized by spi_nor_init_params().
With both 'struct spi_nor_flash_parameter' and 'struct spi_nor_hwcaps',
the new argument of spi_nor_scan(), spi_nor_setup() computes the best
match between hardware caps supported by both the (Q)SPI memory and
controller hence selecting the relevant settings for (Fast) Read and Page
Program operations.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-05-15 21:56:17 +02:00
Linus Torvalds
9786e34e0a MTD updates for 4.12-rc1:
NAND, from Boris:
 """
  - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
    davinci, brcmnand, omap)
  - a huge cleanup/rework of the denali driver accompanied with core
    fixes/improvements to simplify the driver code
  - a complete rewrite of the atmel driver to support new DT bindings
    make future evolution easier
  - the addition of per-vendor detection/initialization steps to avoid
    extending the nand_ids table with more extended-id entries
 """
 
 SPI NOR, from Cyrille:
 """
 - fixes in the hisi SPI controller driver.
 - fixes in the intel SPI controller driver.
 - fixes in the Mediatek SPI controller driver.
 - fixes to some SPI flash memories not supported the Chip Erase command.
 - add support to some new memory parts (Winbond, Macronix, Micron, ESMT).
 - add new driver for the STM32 QSPI controller.
 """
 
 And a few fixes for Gemini and Versatile platforms on physmap-of
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Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd

Pull MTD updates from Brian Norris:
 "NAND, from Boris:
   - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
     davinci, brcmnand, omap)
   - a huge cleanup/rework of the denali driver accompanied with core
     fixes/improvements to simplify the driver code
   - a complete rewrite of the atmel driver to support new DT bindings
     make future evolution easier
   - the addition of per-vendor detection/initialization steps to avoid
     extending the nand_ids table with more extended-id entries

  SPI NOR, from Cyrille:
   - fixes in the hisi, intel and Mediatek SPI controller drivers
   - fixes to some SPI flash memories not supporting the Chip Erase
     command.
   - add support to some new memory parts (Winbond, Macronix, Micron,
     ESMT).
   - add new driver for the STM32 QSPI controller

  And a few fixes for Gemini and Versatile platforms on physmap-of"

* tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits)
  MAINTAINERS: Update NAND subsystem git repositories
  mtd: nand: gpio: update binding
  mtd: nand: add ooblayout for old hamming layout
  mtd: oxnas_nand: Allocating more than necessary in probe()
  dt-bindings: mtd: Document the STM32 QSPI bindings
  mtd: mtk-nor: set controller's address width according to nor flash
  mtd: spi-nor: add driver for STM32 quad spi flash controller
  mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program
  mtd: nand: davinci: add comment on NAND subpage write status on keystone
  mtd: nand: omap2: Fix partition creation via cmdline mtdparts
  mtd: nand: NULL terminate a of_device_id table
  mtd: nand: Fix a couple error codes
  mtd: nand: allow drivers to request minimum alignment for passed buffer
  mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
  mtd: nand: denali: allow to override revision number
  mtd: nand: denali_dt: use pdev instead of ofdev for platform_device
  mtd: nand: denali_dt: remove dma-mask DT property
  mtd: nand: denali: support 64bit capable DMA engine
  mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant
  mtd: nand: denali: support HW_ECC_FIXUP capability
  ...
2017-05-11 10:44:22 -07:00
Brian Norris
57e363b8c4 This pull request contains:
- some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
    davinci, brcmnand, omap)
  - a huge cleanup/rework of the denali driver accompanied with core
    fixes/improvements to simplify the driver code
  - a complete rewrite of the atmel driver to support new DT bindings
    make future evolution easier
  - the addition of per-vendor detection/initialization steps to avoid
    extending the nand_ids table with more extended-id entries
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Merge tag 'nand/for-4.12' of github.com:linux-nand/linux into MTD

From Boris:
"""
This pull request contains:

 - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
   davinci, brcmnand, omap)
 - a huge cleanup/rework of the denali driver accompanied with core
   fixes/improvements to simplify the driver code
 - a complete rewrite of the atmel driver to support new DT bindings
   make future evolution easier
 - the addition of per-vendor detection/initialization steps to avoid
   extending the nand_ids table with more extended-id entries
"""
2017-05-01 13:36:44 -07:00
Masahiro Yamada
477544c62a mtd: nand: allow drivers to request minimum alignment for passed buffer
In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf.  Drivers using DMA will be unhappy about unaligned
buffer.

The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer.  If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-04-25 14:18:38 +02:00
Masahiro Yamada
07604686e8 mtd: nand: relax ecc.read_page() return value for uncorrectable ECC
The comment for ecc.read_page() requires that it should return
"0 if bitflips uncorrectable".

Actually, drivers could return positive values when uncorrectable
bitflips occur.  For example, nand_read_page_swecc() is the case.
If ecc.correct() returns -EBADMSG for the first ECC sector, and
a positive value for the second one, nand_read_page_swecc() returns
a positive max_bitflips and increments ecc_stats.failed for the same
page.

The requirement can be relaxed by tweaking nand_do_read_ops().
Move the max_bitflips calculation below the retry.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-04-25 14:18:31 +02:00
Boris Brezillon
f107d7a439 mtd: nand: Remove unused chip->write_page() hook
The last/only user of the chip->write_page() hook (the Atmel NAND
controller driver) has been reworked and is no longer specifying a custom
->write_page() implementation.
Drop this hook before someone else start abusing it.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-04-25 14:18:30 +02:00
Jan Kara
fa06052d63 mtd: Convert to dynamically allocated bdi infrastructure
MTD already allocates backing_dev_info dynamically. Convert it to use
generic infrastructure for this including proper refcounting. We drop
mtd->backing_dev_info as its only use was to pass mtd_bdi pointer from
one file into another and if we wanted to keep that in a clean way, we'd
have to make mtd hold and drop bdi reference as needed which seems
pointless for passing one global pointer...

CC: David Woodhouse <dwmw2@infradead.org>
CC: Brian Norris <computersforpeace@gmail.com>
CC: linux-mtd@lists.infradead.org
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-04-20 12:09:55 -06:00
Rafał Miłecki
4a67c9fde0 mtd: use dev_of_node helper in mtd_get_of_node
This allows better compile-time optimizations with CONFIG_OF disabled.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-04-19 11:38:52 -07:00
Boris Brezillon
3b5206f4be mtd: nand: Move Macronix specific initialization in nand_macronix.c
Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:23 +01:00
Boris Brezillon
229204da53 mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c
Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:22 +01:00
Boris Brezillon
10d4e75c36 mtd: nand: Move Micron specific init logic in nand_micron.c
Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:21 +01:00
Boris Brezillon
9b2d61f80b mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c
Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:21 +01:00
Boris Brezillon
01389b6bd2 mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c
Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:20 +01:00
Boris Brezillon
c51d0ac59f mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c
Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:20 +01:00
Boris Brezillon
abbe26d144 mtd: nand: Add manufacturer specific initialization/detection steps
A lot of NANDs are implementing generic features in a non-generic way,
or are providing advanced auto-detection logic where the NAND ID bytes
meaning changes with the NAND generation.

Providing this vendor specific initialization step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:19 +01:00
Boris Brezillon
bcc678c2d7 mtd: nand: Do not expose the NAND manufacturer table directly
There is no reason to expose the NAND manufacturer table. Provide an
helper function to find manufacturers by their id.

We also turn the nand_manufacturers table into a const array, since its
members are not modified after the initial assignment.

Finally, we remove the sentinel manufacturer entry from the manufacturers
table (we already have the array size information given by ARRAY_SIZE()),
and add the nand_manufacturer_name() helper to handle the "Unknown" case
properly.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:18 +01:00
Boris Brezillon
8cfb9ab68f mtd: nand: Rename the nand_manufacturers struct
Drop the 's' at the end of nand_manufacturers since the struct is actually
describing a single manufacturer, not a manufacturer table.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:17 +01:00
Boris Brezillon
7f501f0a72 mtd: nand: Store nand ID in struct nand_chip
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-03-08 23:21:15 +01:00
Masahiro Yamada
8ab102d60a scripts/spelling.txt: add "partiton" pattern and fix typo instances
Fix typos and add the following to the scripts/spelling.txt:

  partiton||partition

Link: http://lkml.kernel.org/r/1481573103-11329-7-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-02-27 18:43:46 -08:00
Cédric Le Goater
28309572aa mtd: name the mtd device with an optional label property
This can be used to easily identify a specific chip on a system with
multiple chips.

Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-10 10:16:34 -08:00
Brian Norris
398d8739bb This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
 - add support to new memory parts.
 - add support to S3AN memories.
 - add support to the Intel SPI controller.
 - add support to the Aspeed AST2400 and AST2550 controllers.
 - fix max SPI transfer and message sizes in m25p80_read().
 - fix the Candence QSPI driver.
 - fix the Freescale QSPI driver.
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Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linux

From Cyrille:

"""
This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
"""
2017-02-10 10:05:51 -08:00
Cyrille Pitchen
902cc69a08 mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes
This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.

The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.

This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2017-02-10 13:55:03 +01:00
Ricardo Ribalda
e99ca98f1d mtd: spi-nor: Add support for S3AN spi-nor devices
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.

The protocol of this flash follows most of the spi-nor standard. With
the following differences:

- Page size might not be a power of two.
- The address calculation (default addressing mode).
- The spi nor commands used.

Protocol is described on Xilinx User Guide UG333

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10 13:54:16 +01:00
Sascha Hauer
42e9401bd1 mtd: Add partition device node to mtd partition devices
The user visible change here is that mtd partitions get an of_node link
in sysfs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-09 19:19:25 -08:00
Brian Norris
9c8d7ff32a This pull request contains minor fixes/improvements on existing drivers:
- sunxi: avoid busy-waiting for NAND events
 - ifc: fix ECC handling on IFC v1.0
 - OX820: add explicit dependency on ARCH_OXNAS in Kconfig
 - core: add a new manufacture ID and fix a kernel-doc warning
 - fsmc: kill pdata support
 - lpc32xx_slc: remove unneeded NULL check
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Merge tag 'nand/for-4.11' of github.com:linux-nand/linux

From Boris:

"""
This pull request contains minor fixes/improvements on existing drivers:
- sunxi: avoid busy-waiting for NAND events
- ifc: fix ECC handling on IFC v1.0
- OX820: add explicit dependency on ARCH_OXNAS in Kconfig
- core: add a new manufacture ID and fix a kernel-doc warning
- fsmc: kill pdata support
- lpc32xx_slc: remove unneeded NULL check
"""

Conflicts:
	include/linux/mtd/nand.h
[Brian: trivial conflict in the comment section]
2017-02-08 15:00:24 -08:00
Zach Brown
ceb374eb06 mtd: nand: Add max_bb_per_die and blocks_per_die fields to nand_chip
The fields max_bb_per_die and blocks_per_die are useful determining the
number of bad blocks a MTD needs to allocate. How they are set will
depend on if the chip is ONFI, JEDEC or a full-id entry in the nand_ids
table.

Signed-off-by: Zach Brown <zach.brown@ni.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electron.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-08 14:19:42 -08:00
Jeff Westfahl
6080ef6e7c mtd: introduce function max_bad_blocks
If implemented, 'max_bad_blocks' returns the maximum number of bad
blocks to reserve for a MTD. An implementation for NAND is coming soon.

Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com>
Signed-off-by: Zach Brown <zach.brown@ni.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electron.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-08 13:53:52 -08:00
Andrey Jr. Melnikov
a4077ce587 mtd: nand: Add Winbond manufacturer id
Add WINBOND manufacturer id.

Signed-off-by: Andrey Jr. Melnikov <temnota.am@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-02-06 11:42:43 +01:00
Linus Walleij
4404d7d821 mtd: nand: fsmc: remove stale non-DT probe path
The FSMC driver has an execution path and a header file in
<linux/mtd/fsmc.h> that serves to support passing in platform
data through board files, albeit no upstream users of this
mechanism exist.

The header file also contains function headers for functions that
do not exist in the kernel.

Delete this and move the platform data struct, parsing and
handling into the driver, assume we are using OF and make the
driver depend on OF, remove the ifdefs making that optional.

Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-30 11:50:30 +01:00
Randy Dunlap
61babe9439 mtd: nand: fix nand.h kernel-doc warnings
Fix kernel-doc warnings in <linux/mtd/nand.h>:

..//include/linux/mtd/nand.h:658: warning: No description found for parameter 'tCEH_min'
..//include/linux/mtd/nand.h:877: warning: No description found for parameter 'data_interface'

Fixes: eee64b700e ("mtd: nand: Introduce nand_data_interface")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-30 11:50:30 +01:00
Brian Norris
0989b0909c This pull request contains the following notable changes:
- new tango NAND controller driver
 - new ox820 NAND controller driver
 - addition of a new full-ID entry in the nand_ids table
 - rework of the s3c240 driver to support DT
 - extension of the nand_sdr_timings to expose tCCS, tPROG and tR
 - addition of a new flag to ask the core to wait for tCCS when sending
   a RNDIN/RNDOUT command
 - addition of a new flag to ask the core to let the controller driver
   send the READ/PROGPAGE command
 
 This pull request also contains minor fixes/cleanup/cosmetic changes:
 - properly support 512 ECC step size in the sunxi driver
 - improve the error messages in the pxa probe path
 - fix module autoload in the omap2 driver
 - cleanup of several nand drivers to return nand_scan{_tail}() error
   code instead of returning -EIO
 - various cleanups in the denali driver
 - cleanups in the ooblayout handling (MTD core)
 - fix an error check in nandsim
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Merge tag 'nand/for-4.10' of github.com:linux-nand/linux

From Boris Brezillon:

"""
This pull request contains the following notable changes:
- new tango NAND controller driver
- new ox820 NAND controller driver
- addition of a new full-ID entry in the nand_ids table
- rework of the s3c240 driver to support DT
- extension of the nand_sdr_timings to expose tCCS, tPROG and tR
- addition of a new flag to ask the core to wait for tCCS when sending
  a RNDIN/RNDOUT command
- addition of a new flag to ask the core to let the controller driver
  send the READ/PROGPAGE command

This pull request also contains minor fixes/cleanup/cosmetic changes:
- properly support 512 ECC step size in the sunxi driver
- improve the error messages in the pxa probe path
- fix module autoload in the omap2 driver
- cleanup of several nand drivers to return nand_scan{_tail}() error
  code instead of returning -EIO
- various cleanups in the denali driver
- cleanups in the ooblayout handling (MTD core)
- fix an error check in nandsim
"""
2016-11-29 18:28:30 -08:00
Marc Gonzalez
3371d663bb mtd: nand: Support controllers with custom page
If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-11-19 09:43:07 +01:00
Boris Brezillon
6ea40a3ba9 mtd: nand: Wait tCCS after a column change
Drivers implementing ->cmd_ctrl() and relying on the default ->cmdfunc()
implementation usually don't wait tCCS when a column change (RNDIN or
RNDOUT) is requested.
Add an option flag to ask the core to do so (note that we keep this as
an opt-in to avoid breaking existing implementations), and make use of
the ->data_interface information is available (otherwise, wait 500ns).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2016-11-07 14:48:37 +01:00
Boris Brezillon
204e7ecd47 mtd: nand: Add a few more timings to nand_sdr_timings
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2016-11-07 14:48:37 +01:00
Boris Brezillon
73f907fd5f mtd: nand: Fix data interface configuration logic
When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.

One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.

Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.

Also make sure to actually apply the new data interface setting on the
first die.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd83 ("mtd: nand: automate NAND timings selection")
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2016-10-28 09:58:36 +02:00
Brian Norris
69db4aa44f Introduction of the MTD pairing scheme concept.
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Merge tag '4.9/mtd-pairing-scheme' of github.com:linux-nand/linux

Introduction of the MTD pairing scheme concept.
2016-10-08 20:56:54 -07:00
Richard Weinberger
d44154f969 mtd: nand: Provide nand_cleanup() function to free NAND related resources
Provide a nand_cleanup() function to free all nand related resources
without unregistering the mtd device.
This should allow drivers to call mtd_device_unregister() and handle
its return value and still being able to cleanup all nand related
resources.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Daniel Walter <dwalter@sigma-star.at>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Boris Brezillon
ba78ee00e1 mtd: nand: Add an option to maximize the ECC strength
The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.

In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).

Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
2016-09-23 09:35:16 +02:00
Boris Brezillon
d8e725dd83 mtd: nand: automate NAND timings selection
The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers have
to implement the same timings selection dance. Also currently NAND
devices can be resetted at arbitrary places which also resets the timing
for ONFI chips to timing mode 0.

Provide a common logic to select the best timings based on ONFI or
->onfi_timing_mode_default information. Hook this into nand_reset()
to make sure the new timing is applied each time during a reset.

NAND controller willing to support timings adjustment should just
implement the ->setup_data_interface() method.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-09-23 09:35:16 +02:00
Sascha Hauer
6e1f9708db mtd: nand: Expose data interface for ONFI mode 0
The nand layer will need ONFI mode 0 to use it as timing mode
before and right after reset.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
b88730ada9 mtd: nand: Add function to convert ONFI mode to data_interface
onfi_init_data_interface() initializes a data interface with
values from a given ONFI mode.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
eee64b700e mtd: nand: Introduce nand_data_interface
Currently we have no data structure to fully describe a NAND timing.
We only have struct nand_sdr_timings for NAND timings in SDR mode,
but nothing for DDR mode and also no container to store both types
of timing.
This patch adds struct nand_data_interface which stores the timing
type and a union of different timings. This can be used to pass to
drivers in order to configure the timing.
Add kerneldoc for struct nand_sdr_timings while touching it anyway.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
2f94abfe35 mtd: nand: Create a NAND reset function
When NAND devices are resetted some initialization may have to be done,
like for example they have to be configured for the timing mode that
shall be used. To get a common place where this initialization can be
implemented create a nand_reset() function. This currently only issues
a NAND_CMD_RESET to the NAND device. The places issuing this command
manually are replaced with a call to nand_reset().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
7902259183 mtd: nand: remove unnecessary 'extern' from function declarations
'extern' is not necessary for function declarations. To prevent
people from adding the keyword to new declarations remove the
existing ones.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Marc Gonzalez
d45bc58dd3 mtd: nand: import nand_hw_control_init()
The code to initialize a struct nand_hw_control is duplicated across
several drivers. Factorize it using an inline function.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Boris Brezillon
477b0229ac mtd: introduce the mtd_pairing_scheme concept
MLC and TLC NAND devices are using NAND cells exposing more than one bit,
but instead of attaching all the bits in a given cell to a single NAND
page, each bit is usually attached to a different page. This concept is
called 'page pairing', and has significant impacts on the flash storage
usage.
The main problem showed by these devices is that interrupting a page
program operation may not only corrupt the page we are programming
but also the page it is paired with, hence the need to expose to MTD
users the pairing scheme information.

The pairing APIs allows one to query pairing information attached to a
given page (here called wunit), or the other way around (the wunit
pointed by pairing information).
It also provides several helpers to help the conversion between absolute
offsets and wunits, and query the number of pairing groups.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
2016-09-15 16:47:56 +02:00
Brian Norris
1ed106914a This pull request contains only one notable change:
* Addition of the MTK NAND controller driver
 
 And a bunch of specific NAND driver improvements/fixes. Here are the
 changes that are worth mentioning:
 * A few fixes/improvements for the xway NAND controller driver
 * A few fixes for the sunxi NAND controller driver
 * Support for DMA in the sunxi NAND driver
 * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs
 * Addition for bitflips detection in erased pages to the brcmnand driver
 * Support for new brcmnand IPs
 * Update of the OMAP-GPMC binding to support DMA channel description
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Merge tag 'nand/for-4.8' of github.com:linux-nand/linux into mtd

Pull NAND changes from Boris Brezillon:
"""
This pull request contains only one notable change:
* Addition of the MTK NAND controller driver

And a bunch of specific NAND driver improvements/fixes. Here are the
changes that are worth mentioning:
* A few fixes/improvements for the xway NAND controller driver
* A few fixes for the sunxi NAND controller driver
* Support for DMA in the sunxi NAND driver
* Support for the sunxi NAND controller IP embedded in A23/A33 SoCs
* Addition for bitflips detection in erased pages to the brcmnand driver
* Support for new brcmnand IPs
* Update of the OMAP-GPMC binding to support DMA channel description
"""
2016-07-15 17:06:26 -07:00
Rafał Miłecki
1c7fe6b438 mtd: nand: add ESMT manufacturer
I got device with ESMT (Elite Semiconductor Memory Technology Inc)
F59L1G81MA flash that was detected as:
[    0.852034] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xd1
[    0.858402] nand: Unknown NAND 128MiB 3,3V 8-bit
[    0.863031] nand: 128MiB, SLC, page size: 2048, OOB size: 64

According to the F59L1G81MA datasheet (and Read Id documentation) C8h is
a "Maker Code" which should mean ESMT. Add it to fix above "Unknown".

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-06-09 21:23:20 +02:00
Michal Suchanek
2dd087b169 mtd: spi-nor: stop passing around retlen
Do not pass retlen to hardware driver read/write functions. Update it in
spi-nor generic driver instead.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Michal Suchanek <hramrach@gmail.com>
Tested-by: Michal Suchanek <hramrach@gmail.com>
2016-06-01 17:22:52 -07:00